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Dinh Nguyenad51f7c2012-10-04 06:46:02 +00001/*
Pavel Machek5e2d70a2014-09-08 14:08:45 +02002 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
Dinh Nguyenad51f7c2012-10-04 06:46:02 +00003 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Dinh Nguyenad51f7c2012-10-04 06:46:02 +00005 */
Pavel Machek5e2d70a2014-09-08 14:08:45 +02006#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
7#define __CONFIG_SOCFPGA_CYCLONE5_H__
Dinh Nguyenad51f7c2012-10-04 06:46:02 +00008
Dinh Nguyeneca8b5c2015-11-23 17:27:17 -06009#include <asm/arch/base_addr_ac5.h>
Dinh Nguyenad51f7c2012-10-04 06:46:02 +000010
Marek Vasutd4a4db12014-09-08 14:08:45 +020011#define CONFIG_HW_WATCHDOG
Marek Vasutbd279e32014-09-15 01:27:57 +020012
Pavel Machek5e2d70a2014-09-08 14:08:45 +020013/* Memory configurations */
Marek Vasutd4a4db12014-09-08 14:08:45 +020014#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
Dinh Nguyenad51f7c2012-10-04 06:46:02 +000015
Marek Vasutd4a4db12014-09-08 14:08:45 +020016/* Booting Linux */
Marek Vasut2bff5402015-07-22 06:18:19 +020017#define CONFIG_LOADADDR 0x01000000
Marek Vasutd4a4db12014-09-08 14:08:45 +020018#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Dinh Nguyenad51f7c2012-10-04 06:46:02 +000019
Pavel Machek5e2d70a2014-09-08 14:08:45 +020020/* Ethernet on SoC (EMAC) */
Pavel Machekce340e92014-07-14 14:14:17 +020021
Pavel Machek5e2d70a2014-09-08 14:08:45 +020022/* The rest of the configuration is shared */
23#include <configs/socfpga_common.h>
Chin Liang See561c9d42014-06-10 01:11:04 -050024
Pavel Machek5e2d70a2014-09-08 14:08:45 +020025#endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */