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Parthiban Nallathambic4669382019-04-10 16:35:32 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Board configuration file for Phytec phyBOARD-i.MX6ULL-Segin SBC
4 * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
5 *
6 * Based on include/configs/xpress.h:
7 * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
8 */
9#ifndef __PCL063_ULL_H
10#define __PCL063_ULL_H
11
12#include <linux/sizes.h>
13#include "mx6_common.h"
14
15/* SPL options */
16#include "imx6_spl.h"
17
18#define CONFIG_SYS_FSL_USDHC_NUM 2
19
20/* Size of malloc() pool */
21#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
22
23/* Environment settings */
24#define CONFIG_ENV_SIZE (0x4000)
25#define CONFIG_ENV_OFFSET (0x80000)
26#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
27#define CONFIG_ENV_OFFSET_REDUND \
28 (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
29
30/* Environment in SD */
31#define CONFIG_SYS_MMC_ENV_DEV 0
32#define CONFIG_SYS_MMC_ENV_PART 0
33#define MMC_ROOTFS_DEV 0
34#define MMC_ROOTFS_PART 2
35
36/* Console configs */
37#define CONFIG_MXC_UART_BASE UART1_BASE
38
39/* MMC Configs */
Parthiban Nallathambic4669382019-04-10 16:35:32 +020040
41#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
42#define CONFIG_SUPPORT_EMMC_BOOT
43
44/* I2C configs */
45#ifdef CONFIG_CMD_I2C
46#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47#define CONFIG_SYS_I2C_SPEED 100000
48#endif
49
50/* Miscellaneous configurable options */
51#define CONFIG_SYS_MEMTEST_START 0x80000000
52#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
53
54#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
55#define CONFIG_SYS_HZ 1000
56
57/* Physical Memory Map */
58#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
59#define PHYS_SDRAM_SIZE SZ_256M
60
61#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
62#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
63#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
64
65#define CONFIG_SYS_INIT_SP_OFFSET \
66 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
67#define CONFIG_SYS_INIT_SP_ADDR \
68 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
69
70/* NAND */
71#define CONFIG_SYS_MAX_NAND_DEVICE 1
72#define CONFIG_SYS_NAND_BASE 0x40000000
73
74/* USB Configs */
75#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
76#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
77#define CONFIG_MXC_USB_FLAGS 0
78#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
79
80#define CONFIG_IMX_THERMAL
81
82#define ENV_MMC \
83 "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
84 "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
85 "fitpart=1\0" \
86 "bootdelay=3\0" \
87 "silent=1\0" \
88 "optargs=rw rootwait\0" \
89 "mmcautodetect=yes\0" \
90 "mmcrootfstype=ext4\0" \
91 "mmcfit_name=fitImage\0" \
92 "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \
93 "${mmcfit_name}\0" \
94 "mmcargs=setenv bootargs " \
95 "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \
96 "console=${console} rootfstype=${mmcrootfstype}\0" \
97 "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \
98
99/* Default environment */
100#define CONFIG_EXTRA_ENV_SETTINGS \
101 "fdt_high=0xffffffff\0" \
102 "console=ttymxc0,115200n8\0" \
103 "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \
104 "fit_addr=0x82000000\0" \
105 ENV_MMC
106
107#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit"
108
109#define BOOT_TARGET_DEVICES(func) \
110 func(MMC, mmc, 0) \
111 func(MMC, mmc, 1) \
112 func(DHCP, dhcp, na)
113
114#include <config_distro_bootcmd.h>
115
116#endif /* __PCL063_ULL_H */