blob: b9f4c07822eaec3f97b35da7ef09bc2757d380ca [file] [log] [blame]
Lukasz Majewskid9db5902017-02-19 23:24:36 +01001/*
2 * omap_wdt.h
3 *
4 * OMAP Watchdog header file
5 *
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#ifndef __OMAP_WDT_H__
12#define __OMAP_WDT_H__
13
14/*
15 * Watchdog:
16 * Using the prescaler, the OMAP watchdog could go for many
17 * months before firing. These limits work without scaling,
18 * with the 60 second default assumed by most tools and docs.
19 */
20#define TIMER_MARGIN_MAX (24 * 60 * 60) /* 1 day */
21#define TIMER_MARGIN_DEFAULT 60 /* 60 secs */
22#define TIMER_MARGIN_MIN 1
23
24#define PTV 0 /* prescale */
25#define GET_WLDR_VAL(secs) (0xffffffff - ((secs) * (32768/(1<<PTV))) + 1)
26#define WDT_WWPS_PEND_WCLR BIT(0)
27#define WDT_WWPS_PEND_WLDR BIT(2)
28#define WDT_WWPS_PEND_WTGR BIT(3)
29#define WDT_WWPS_PEND_WSPR BIT(4)
30
31#define WDT_WCLR_PRE BIT(5)
32#define WDT_WCLR_PTV_OFF 2
33
34/* Watchdog timer registers */
35struct wd_timer {
36 unsigned int resv1[4];
37 unsigned int wdtwdsc; /* offset 0x010 */
38 unsigned int wdtwdst; /* offset 0x014 */
39 unsigned int wdtwisr; /* offset 0x018 */
40 unsigned int wdtwier; /* offset 0x01C */
41 unsigned int wdtwwer; /* offset 0x020 */
42 unsigned int wdtwclr; /* offset 0x024 */
43 unsigned int wdtwcrr; /* offset 0x028 */
44 unsigned int wdtwldr; /* offset 0x02C */
45 unsigned int wdtwtgr; /* offset 0x030 */
46 unsigned int wdtwwps; /* offset 0x034 */
47 unsigned int resv2[3];
48 unsigned int wdtwdly; /* offset 0x044 */
49 unsigned int wdtwspr; /* offset 0x048 */
50 unsigned int resv3[1];
51 unsigned int wdtwqeoi; /* offset 0x050 */
52 unsigned int wdtwqstar; /* offset 0x054 */
53 unsigned int wdtwqsta; /* offset 0x058 */
54 unsigned int wdtwqens; /* offset 0x05C */
55 unsigned int wdtwqenc; /* offset 0x060 */
56 unsigned int resv4[39];
57 unsigned int wdt_unfr; /* offset 0x100 */
58};
59
60#endif /* __OMAP_WDT_H__ */