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git01.mediatek.com / filogic / uboot / d9db590d4159f50357ff0f8b9e9243ae42b9946d / . / arch / arm / include / asm / arch-am33xx / spl.h
blob: f744ab0782e1846cdb86a06e7f3100d24350266e [file] [log] [blame]
Tom Rini29d69dc2012-08-14 08:50:58 -0700[diff] [blame]1/*
2 * (C) Copyright 2012
3 * Texas Instruments, <www.ti.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
Tom Rini29d69dc2012-08-14 08:50:58 -0700[diff] [blame]6 */
7#ifndef _ASM_ARCH_SPL_H_
Marek Vasut4ad4cef2014-03-19 02:02:55 +0100[diff] [blame]8#define _ASM_ARCH_SPL_H_
Tom Rini29d69dc2012-08-14 08:50:58 -0700[diff] [blame]9
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]10#define BOOT_DEVICE_NONE 0x00
11#define BOOT_DEVICE_MMC2_2 0xFF
12
13#if defined(CONFIG_TI814X)
14#define BOOT_DEVICE_XIP 0x01
15#define BOOT_DEVICE_XIPWAIT 0x02
16#define BOOT_DEVICE_NAND 0x05
17#define BOOT_DEVICE_NAND_I2C 0x06
18#define BOOT_DEVICE_MMC2 0x08 /* ROM only supports 2nd instance. */
19#define BOOT_DEVICE_MMC1 0x09
20#define BOOT_DEVICE_SPI 0x15
21#define BOOT_DEVICE_UART 0x41
22#define BOOT_DEVICE_USBETH 0x44
23#define BOOT_DEVICE_CPGMAC 0x46
24
25#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2
26#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1
27#elif defined(CONFIG_TI816X)
28#define BOOT_DEVICE_XIP 0x01
29#define BOOT_DEVICE_XIPWAIT 0x02
30#define BOOT_DEVICE_NAND 0x03
31#define BOOT_DEVICE_ONENAD 0x04
32#define BOOT_DEVICE_MMC2 0x05 /* ROM only supports 2nd instance. */
33#define BOOT_DEVICE_MMC1 0x06
TENART Antoine35c7e522013-07-02 12:05:59 +0200[diff] [blame]34#define BOOT_DEVICE_UART 0x43
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]35#define BOOT_DEVICE_USB 0x45
Tom Rini46526842013-04-05 06:21:44 +0000[diff] [blame]36
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]37#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2
38#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1
39#elif defined(CONFIG_AM33XX)
40#define BOOT_DEVICE_XIP 0x01
41#define BOOT_DEVICE_XIPWAIT 0x02
42#define BOOT_DEVICE_NAND 0x05
43#define BOOT_DEVICE_NAND_I2C 0x06
44#define BOOT_DEVICE_MMC1 0x08
45#define BOOT_DEVICE_MMC2 0x09
Vogt, Christof5536ddc2016-04-05 10:56:57 +0200[diff] [blame]46#define BOOT_DEVICE_SPI 0x0B
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]47#define BOOT_DEVICE_UART 0x41
48#define BOOT_DEVICE_USBETH 0x44
49#define BOOT_DEVICE_CPGMAC 0x46
50
51#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
52#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
Dan Murphycb367e12014-01-16 11:23:30 -0600[diff] [blame]53#elif defined(CONFIG_AM43XX)
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]54#define BOOT_DEVICE_NOR 0x01
55#define BOOT_DEVICE_NAND 0x05
56#define BOOT_DEVICE_MMC1 0x07
57#define BOOT_DEVICE_MMC2 0x08
58#define BOOT_DEVICE_SPI 0x0A
Lokesh Vutlaf4cc5042016-04-13 09:57:04 +0530[diff] [blame]59#define BOOT_DEVICE_USB 0x0D
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]60#define BOOT_DEVICE_UART 0x41
Lokesh Vutlaf4cc5042016-04-13 09:57:04 +0530[diff] [blame]61#define BOOT_DEVICE_USBETH 0x45
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]62#define BOOT_DEVICE_CPGMAC 0x47
63
64#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
Dan Murphycb367e12014-01-16 11:23:30 -0600[diff] [blame]65#ifdef CONFIG_SPL_USB_SUPPORT
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]66#define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB
Dan Murphycb367e12014-01-16 11:23:30 -0600[diff] [blame]67#else
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]68#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
Dan Murphycb367e12014-01-16 11:23:30 -0600[diff] [blame]69#endif
Tom Rinia2705952013-04-09 11:40:40 -0400[diff] [blame]70#endif
Paul Kocialkowski851c4e72015-07-15 16:02:20 +0200[diff] [blame]71
Tom Rini29d69dc2012-08-14 08:50:58 -0700[diff] [blame]72#endif