| Simon Glass | 144cb55 | 2014-10-20 19:48:30 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Samsung's Exynos4x12 SoCs device tree source |
| 3 | * |
| 4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12 |
| 8 | * based board files can include this file and provide values for board specfic |
| 9 | * bindings. |
| 10 | * |
| 11 | * Note: This file does not include device nodes for all the controllers in |
| 12 | * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional |
| 13 | * nodes can be added to this file. |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License version 2 as |
| 17 | ` * published by the Free Software Foundation. |
| 18 | */ |
| 19 | |
| 20 | #include "exynos4.dtsi" |
| 21 | #include "exynos4x12-pinctrl.dtsi" |
| Simon Glass | 89e5838 | 2014-10-20 19:48:32 -0600 | [diff] [blame] | 22 | #include "exynos4x12-pinctrl-uboot.dtsi" |
| Simon Glass | 144cb55 | 2014-10-20 19:48:30 -0600 | [diff] [blame] | 23 | |
| 24 | / { |
| 25 | aliases { |
| 26 | pinctrl0 = &pinctrl_0; |
| 27 | pinctrl1 = &pinctrl_1; |
| 28 | pinctrl2 = &pinctrl_2; |
| 29 | pinctrl3 = &pinctrl_3; |
| Simon Glass | 144cb55 | 2014-10-20 19:48:30 -0600 | [diff] [blame] | 30 | mshc0 = &mshc_0; |
| 31 | }; |
| 32 | |
| 33 | pd_isp: isp-power-domain@10023CA0 { |
| 34 | compatible = "samsung,exynos4210-pd"; |
| 35 | reg = <0x10023CA0 0x20>; |
| 36 | }; |
| 37 | |
| 38 | clock: clock-controller@10030000 { |
| 39 | compatible = "samsung,exynos4412-clock"; |
| 40 | reg = <0x10030000 0x20000>; |
| 41 | #clock-cells = <1>; |
| 42 | }; |
| 43 | |
| 44 | mct@10050000 { |
| 45 | compatible = "samsung,exynos4412-mct"; |
| 46 | reg = <0x10050000 0x800>; |
| 47 | interrupt-parent = <&mct_map>; |
| 48 | interrupts = <0>, <1>, <2>, <3>, <4>; |
| 49 | clocks = <&clock 3>, <&clock 344>; |
| 50 | clock-names = "fin_pll", "mct"; |
| 51 | |
| 52 | mct_map: mct-map { |
| 53 | #interrupt-cells = <1>; |
| 54 | #address-cells = <0>; |
| 55 | #size-cells = <0>; |
| 56 | interrupt-map = <0 &gic 0 57 0>, |
| 57 | <1 &combiner 12 5>, |
| 58 | <2 &combiner 12 6>, |
| 59 | <3 &combiner 12 7>, |
| 60 | <4 &gic 1 12 0>; |
| 61 | }; |
| 62 | }; |
| 63 | |
| 64 | pinctrl_0: pinctrl@11400000 { |
| 65 | compatible = "samsung,exynos4x12-pinctrl"; |
| 66 | reg = <0x11400000 0x1000>; |
| 67 | interrupts = <0 47 0>; |
| 68 | }; |
| 69 | |
| 70 | pinctrl_1: pinctrl@11000000 { |
| 71 | compatible = "samsung,exynos4x12-pinctrl"; |
| 72 | reg = <0x11000000 0x1000>; |
| 73 | interrupts = <0 46 0>; |
| 74 | |
| 75 | wakup_eint: wakeup-interrupt-controller { |
| 76 | compatible = "samsung,exynos4210-wakeup-eint"; |
| 77 | interrupt-parent = <&gic>; |
| 78 | interrupts = <0 32 0>; |
| 79 | }; |
| 80 | }; |
| 81 | |
| 82 | pinctrl_2: pinctrl@03860000 { |
| 83 | compatible = "samsung,exynos4x12-pinctrl"; |
| 84 | reg = <0x03860000 0x1000>; |
| 85 | interrupt-parent = <&combiner>; |
| 86 | interrupts = <10 0>; |
| 87 | }; |
| 88 | |
| 89 | pinctrl_3: pinctrl@106E0000 { |
| 90 | compatible = "samsung,exynos4x12-pinctrl"; |
| 91 | reg = <0x106E0000 0x1000>; |
| 92 | interrupts = <0 72 0>; |
| 93 | }; |
| 94 | |
| 95 | g2d@10800000 { |
| 96 | compatible = "samsung,exynos4212-g2d"; |
| 97 | reg = <0x10800000 0x1000>; |
| 98 | interrupts = <0 89 0>; |
| 99 | clocks = <&clock 177>, <&clock 277>; |
| 100 | clock-names = "sclk_fimg2d", "fimg2d"; |
| 101 | status = "disabled"; |
| 102 | }; |
| 103 | |
| Simon Glass | 144cb55 | 2014-10-20 19:48:30 -0600 | [diff] [blame] | 104 | mshc_0: mmc@12550000 { |
| 105 | compatible = "samsung,exynos4412-dw-mshc"; |
| 106 | reg = <0x12550000 0x1000>; |
| 107 | interrupts = <0 77 0>; |
| 108 | #address-cells = <1>; |
| 109 | #size-cells = <0>; |
| 110 | fifo-depth = <0x80>; |
| 111 | clocks = <&clock 301>, <&clock 149>; |
| 112 | clock-names = "biu", "ciu"; |
| 113 | status = "disabled"; |
| 114 | }; |
| 115 | }; |