blob: 6e14ebd26d5bcbe6892d2c12aeccee4bff0cda3f [file] [log] [blame]
Pavel Machekc7213802014-09-08 14:08:45 +02001/*
Tien Fong Cheec604b0a2017-09-25 16:40:01 +08002 * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
Pavel Machekc7213802014-09-08 14:08:45 +02003 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#include <common.h>
9#include <asm/io.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090010#include <linux/errno.h>
Pavel Machekc7213802014-09-08 14:08:45 +020011#include <asm/arch/fpga_manager.h>
12#include <asm/arch/reset_manager.h>
13#include <asm/arch/system_manager.h>
14
15DECLARE_GLOBAL_DATA_PTR;
16
17/* Timeout count */
18#define FPGA_TIMEOUT_CNT 0x1000000
19
20static struct socfpga_fpga_manager *fpgamgr_regs =
21 (struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
Pavel Machekc7213802014-09-08 14:08:45 +020022
Tien Fong Chee31e50f42017-07-26 13:05:38 +080023int fpgamgr_dclkcnt_set(unsigned long cnt)
Pavel Machekc7213802014-09-08 14:08:45 +020024{
25 unsigned long i;
26
27 /* Clear any existing done status */
28 if (readl(&fpgamgr_regs->dclkstat))
29 writel(0x1, &fpgamgr_regs->dclkstat);
30
31 /* Write the dclkcnt */
32 writel(cnt, &fpgamgr_regs->dclkcnt);
33
34 /* Wait till the dclkcnt done */
35 for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
36 if (!readl(&fpgamgr_regs->dclkstat))
37 continue;
38
39 writel(0x1, &fpgamgr_regs->dclkstat);
40 return 0;
41 }
42
43 return -ETIMEDOUT;
44}
45
Pavel Machekc7213802014-09-08 14:08:45 +020046/* Write the RBF data to FPGA Manager */
Tien Fong Chee31e50f42017-07-26 13:05:38 +080047void fpgamgr_program_write(const void *rbf_data, size_t rbf_size)
Pavel Machekc7213802014-09-08 14:08:45 +020048{
49 uint32_t src = (uint32_t)rbf_data;
50 uint32_t dst = SOCFPGA_FPGAMGRDATA_ADDRESS;
51
52 /* Number of loops for 32-byte long copying. */
53 uint32_t loops32 = rbf_size / 32;
54 /* Number of loops for 4-byte long copying + trailing bytes */
55 uint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4);
56
57 asm volatile(
Tien Fong Cheec604b0a2017-09-25 16:40:01 +080058 " cmp %2, #0\n"
59 " beq 2f\n"
Pavel Machekc7213802014-09-08 14:08:45 +020060 "1: ldmia %0!, {r0-r7}\n"
61 " stmia %1!, {r0-r7}\n"
62 " sub %1, #32\n"
63 " subs %2, #1\n"
64 " bne 1b\n"
Tien Fong Cheec604b0a2017-09-25 16:40:01 +080065 "2: cmp %3, #0\n"
66 " beq 4f\n"
67 "3: ldr %2, [%0], #4\n"
Pavel Machekc7213802014-09-08 14:08:45 +020068 " str %2, [%1]\n"
69 " subs %3, #1\n"
Tien Fong Cheec604b0a2017-09-25 16:40:01 +080070 " bne 3b\n"
71 "4: nop\n"
Pavel Machekc7213802014-09-08 14:08:45 +020072 : "+r"(src), "+r"(dst), "+r"(loops32), "+r"(loops4) :
73 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "cc");
74}
75