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wdenk6ea1cf02004-02-27 08:20:54 +00001/*
2 * (C) Copyright 2004
3 * Pierre AUBERT, Staubli Faverges, <p.aubert@staubli.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * Init is derived from Linux code.
24 */
25#include <common.h>
26
27#ifdef CFG_CMD_IDE
28#include <mpc5xxx.h>
29
Wolfgang Denk6405a152006-03-31 18:32:53 +020030DECLARE_GLOBAL_DATA_PTR;
31
wdenk6ea1cf02004-02-27 08:20:54 +000032#define CALC_TIMING(t) (t + period - 1) / period
33
wdenkacd9b102004-03-14 00:59:59 +000034#ifdef CONFIG_IDE_RESET
35extern void init_ide_reset (void);
36#endif
wdenk6ea1cf02004-02-27 08:20:54 +000037
38int ide_preinit (void)
39{
wdenk6ea1cf02004-02-27 08:20:54 +000040 long period, t0, t1, t2_8, t2_16, t4, ta;
41 vu_long reg;
42 struct mpc5xxx_sdma *psdma = (struct mpc5xxx_sdma *) MPC5XXX_SDMA;
43
44 reg = *(vu_long *) MPC5XXX_GPS_PORT_CONFIG;
wdenkcc3f8a92004-07-11 19:17:20 +000045#if defined(CONFIG_TOTAL5200)
46 /* ATA cs0/1 on i2c2 clk/io */
47 reg = (reg & ~0x03000000ul) | 0x02000000ul;
48#else
49 /* ATA cs0/1 on Local Plus cs4/5 */
wdenk6ea1cf02004-02-27 08:20:54 +000050 reg = (reg & ~0x03000000ul) | 0x01000000ul;
wdenkcc3f8a92004-07-11 19:17:20 +000051#endif /* CONFIG_TOTAL5200 */
wdenk6ea1cf02004-02-27 08:20:54 +000052 *(vu_long *) MPC5XXX_GPS_PORT_CONFIG = reg;
53
54 /* All sample codes do that... */
55 *(vu_long *) MPC5XXX_ATA_SHARE_COUNT = 0;
56
57 /* Configure and reset host */
58 *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY |
59 MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR;
60 udelay (10);
61 *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY;
62
63 /* Disable prefetch on Commbus */
64 psdma->PtdCntrl |= 1;
65
66 /* Init timings : we use PIO mode 0 timings */
67 period = 1000000000 / gd->ipb_clk; /* period in ns */
68
69 t0 = CALC_TIMING (600);
70 t2_8 = CALC_TIMING (290);
71 t2_16 = CALC_TIMING (165);
72 reg = (t0 << 24) | (t2_8 << 16) | (t2_16 << 8);
73 *(vu_long *) MPC5XXX_ATA_PIO1 = reg;
74
75 t4 = CALC_TIMING (30);
76 t1 = CALC_TIMING (70);
77 ta = CALC_TIMING (35);
78 reg = (t4 << 24) | (t1 << 16) | (ta << 8);
79
80 *(vu_long *) MPC5XXX_ATA_PIO2 = reg;
81
wdenkacd9b102004-03-14 00:59:59 +000082#ifdef CONFIG_IDE_RESET
wdenkc35ba4e2004-03-14 22:25:36 +000083 init_ide_reset ();
wdenkacd9b102004-03-14 00:59:59 +000084#endif /* CONFIG_IDE_RESET */
wdenk6ea1cf02004-02-27 08:20:54 +000085
86 return (0);
87}
wdenk6ea1cf02004-02-27 08:20:54 +000088#endif /* CFG_CMD_IDE */