| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 1 | |
| 2 | config BITBANGMII |
| 3 | bool "Bit-banged ethernet MII management channel support" |
| 4 | |
| 5 | config MV88E6352_SWITCH |
| 6 | bool "Marvell 88E6352 switch support" |
| 7 | |
| 8 | menuconfig PHYLIB |
| 9 | bool "Ethernet PHY (physical media interface) support" |
| Michal Simek | 5647da0 | 2018-02-06 13:23:52 +0100 | [diff] [blame] | 10 | depends on NET |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 11 | help |
| 12 | Enable Ethernet PHY (physical media interface) support. |
| 13 | |
| 14 | if PHYLIB |
| 15 | |
| Joe Hershberger | 46b7bd1 | 2018-03-30 11:52:16 -0500 | [diff] [blame] | 16 | config PHY_ADDR_ENABLE |
| 17 | bool "Limit phy address" |
| 18 | default y if ARCH_SUNXI |
| 19 | help |
| 20 | Select this if you want to control which phy address is used |
| 21 | |
| 22 | if PHY_ADDR_ENABLE |
| Stefan Mavrodiev | e3ee5f5 | 2018-02-02 15:53:38 +0200 | [diff] [blame] | 23 | config PHY_ADDR |
| 24 | int "PHY address" |
| 25 | default 1 if ARCH_SUNXI |
| 26 | default 0 |
| 27 | help |
| 28 | The address of PHY on MII bus. Usually in range of 0 to 31. |
| Joe Hershberger | 46b7bd1 | 2018-03-30 11:52:16 -0500 | [diff] [blame] | 29 | endif |
| Stefan Mavrodiev | e3ee5f5 | 2018-02-02 15:53:38 +0200 | [diff] [blame] | 30 | |
| Florian Fainelli | 01b4ade | 2017-12-09 14:59:54 -0800 | [diff] [blame] | 31 | config B53_SWITCH |
| 32 | bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support." |
| 33 | help |
| 34 | Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches. |
| 35 | This currently supports BCM53125 and similar models. |
| 36 | |
| 37 | if B53_SWITCH |
| 38 | |
| 39 | config B53_CPU_PORT |
| 40 | int "CPU port" |
| 41 | default 8 |
| 42 | |
| 43 | config B53_PHY_PORTS |
| 44 | hex "Bitmask of PHY ports" |
| 45 | |
| 46 | endif # B53_SWITCH |
| 47 | |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 48 | config MV88E61XX_SWITCH |
| 49 | bool "Marvel MV88E61xx Ethernet switch PHY support." |
| 50 | |
| Tim Harvey | c2cc9d4 | 2017-03-17 07:29:51 -0700 | [diff] [blame] | 51 | if MV88E61XX_SWITCH |
| 52 | |
| 53 | config MV88E61XX_CPU_PORT |
| 54 | int "CPU Port" |
| 55 | |
| 56 | config MV88E61XX_PHY_PORTS |
| 57 | hex "Bitmask of PHY Ports" |
| 58 | |
| 59 | config MV88E61XX_FIXED_PORTS |
| 60 | hex "Bitmask of PHYless serdes Ports" |
| 61 | |
| 62 | endif # MV88E61XX_SWITCH |
| 63 | |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 64 | config PHYLIB_10G |
| 65 | bool "Generic 10G PHY support" |
| 66 | |
| Jeremy Gebben | e662c0d | 2018-09-18 15:49:36 -0600 | [diff] [blame] | 67 | menuconfig PHY_AQUANTIA |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 68 | bool "Aquantia Ethernet PHYs support" |
| Jeremy Gebben | abe3edf | 2018-09-18 15:49:35 -0600 | [diff] [blame] | 69 | select PHY_GIGE |
| 70 | select PHYLIB_10G |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 71 | |
| Jeremy Gebben | e662c0d | 2018-09-18 15:49:36 -0600 | [diff] [blame] | 72 | config PHY_AQUANTIA_UPLOAD_FW |
| 73 | bool "Aquantia firmware loading support" |
| 74 | default n |
| 75 | depends on PHY_AQUANTIA |
| 76 | help |
| 77 | Aquantia PHYs use firmware which can be either loaded automatically |
| 78 | from storage directly attached to the phy or loaded by the boot loader |
| 79 | via MDIO commands. The firmware is loaded from a file, specified by |
| 80 | the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options. |
| 81 | |
| 82 | config PHY_AQUANTIA_FW_PART |
| 83 | string "Aquantia firmware partition" |
| 84 | depends on PHY_AQUANTIA_UPLOAD_FW |
| 85 | help |
| 86 | Partition containing the firmware file. |
| 87 | |
| 88 | config PHY_AQUANTIA_FW_NAME |
| 89 | string "Aquantia firmware filename" |
| 90 | depends on PHY_AQUANTIA_UPLOAD_FW |
| 91 | help |
| 92 | Firmware filename. |
| 93 | |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 94 | config PHY_ATHEROS |
| 95 | bool "Atheros Ethernet PHYs support" |
| 96 | |
| 97 | config PHY_BROADCOM |
| 98 | bool "Broadcom Ethernet PHYs support" |
| 99 | |
| 100 | config PHY_CORTINA |
| 101 | bool "Cortina Ethernet PHYs support" |
| 102 | |
| 103 | config PHY_DAVICOM |
| 104 | bool "Davicom Ethernet PHYs support" |
| 105 | |
| 106 | config PHY_ET1011C |
| 107 | bool "LSI TruePHY ET1011C support" |
| 108 | |
| 109 | config PHY_LXT |
| 110 | bool "LXT971 Ethernet PHY support" |
| 111 | |
| 112 | config PHY_MARVELL |
| 113 | bool "Marvell Ethernet PHYs support" |
| 114 | |
| Neil Armstrong | 7a4c90d | 2017-10-18 10:02:10 +0200 | [diff] [blame] | 115 | config PHY_MESON_GXL |
| 116 | bool "Amlogic Meson GXL Internal PHY support" |
| 117 | |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 118 | config PHY_MICREL |
| 119 | bool "Micrel Ethernet PHYs support" |
| Philipp Tomsich | 00c3361 | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 120 | help |
| 121 | Enable support for the GbE PHYs manufactured by Micrel (now |
| 122 | a part of Microchip). This includes drivers for the KSZ804, |
| 123 | KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, KSZ8721 |
| 124 | either/or KSZ9021 (see the "Micrel KSZ9021 family support" |
| 125 | config option for details), and KSZ9031 (if configured). |
| 126 | |
| 127 | if PHY_MICREL |
| 128 | |
| 129 | config PHY_MICREL_KSZ9021 |
| Alexandru Gagniuc | 4c69ccb | 2017-07-07 11:37:00 -0700 | [diff] [blame] | 130 | bool |
| Philipp Tomsich | 00c3361 | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 131 | select PHY_GIGE |
| Alexandru Gagniuc | 757bb67 | 2017-07-07 11:36:57 -0700 | [diff] [blame] | 132 | select PHY_MICREL_KSZ90X1 |
| Alexandru Gagniuc | 757bb67 | 2017-07-07 11:36:57 -0700 | [diff] [blame] | 133 | |
| Philipp Tomsich | 00c3361 | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 134 | config PHY_MICREL_KSZ9031 |
| Alexandru Gagniuc | 4c69ccb | 2017-07-07 11:37:00 -0700 | [diff] [blame] | 135 | bool |
| Philipp Tomsich | 00c3361 | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 136 | select PHY_GIGE |
| Alexandru Gagniuc | 757bb67 | 2017-07-07 11:36:57 -0700 | [diff] [blame] | 137 | select PHY_MICREL_KSZ90X1 |
| Alexandru Gagniuc | 757bb67 | 2017-07-07 11:36:57 -0700 | [diff] [blame] | 138 | |
| 139 | config PHY_MICREL_KSZ90X1 |
| 140 | bool "Micrel KSZ90x1 family support" |
| 141 | select PHY_GIGE |
| 142 | help |
| 143 | Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If |
| 144 | enabled, the extended register read/write for KSZ90x1 PHYs |
| 145 | is supported through the 'mdio' command and any RGMII signal |
| 146 | delays configured in the device tree will be applied to the |
| 147 | PHY during initialization. |
| 148 | |
| 149 | This should not be enabled at the same time with PHY_MICREL_KSZ8XXX |
| 150 | as the KSZ9021 and KS8721 share the same ID. |
| 151 | |
| 152 | config PHY_MICREL_KSZ8XXX |
| 153 | bool "Micrel KSZ8xxx family support" |
| 154 | default y if !PHY_MICREL_KSZ90X1 |
| 155 | help |
| 156 | Enable support for the 8000 series GbE PHYs manufactured by Micrel |
| 157 | (now a part of Microchip). This includes drivers for the KSZ804, |
| 158 | KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721. |
| 159 | |
| 160 | This should not be enabled at the same time with PHY_MICREL_KSZ90X1 |
| 161 | as the KSZ9021 and KS8721 share the same ID. |
| 162 | |
| Philipp Tomsich | 00c3361 | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 163 | endif # PHY_MICREL |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 164 | |
| John Haechten | ee253f9 | 2016-12-09 22:15:17 +0000 | [diff] [blame] | 165 | config PHY_MSCC |
| 166 | bool "Microsemi Corp Ethernet PHYs support" |
| 167 | |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 168 | config PHY_NATSEMI |
| 169 | bool "National Semiconductor Ethernet PHYs support" |
| 170 | |
| 171 | config PHY_REALTEK |
| 172 | bool "Realtek Ethernet PHYs support" |
| 173 | |
| kevans@FreeBSD.org | 7c82401 | 2018-02-14 17:02:15 -0600 | [diff] [blame] | 174 | config RTL8211E_PINE64_GIGABIT_FIX |
| 175 | bool "Fix gigabit throughput on some Pine64+ models" |
| 176 | depends on PHY_REALTEK |
| 177 | help |
| 178 | Configure the Realtek RTL8211E found on some Pine64+ models differently to |
| 179 | fix throughput on Gigabit links, turning off all internal delays in the |
| 180 | process. The settings that this touches are not documented in the CONFREG |
| 181 | section of the RTL8211E datasheet, but come from Realtek by way of the |
| 182 | Pine64 engineering team. |
| 183 | |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 184 | config RTL8211X_PHY_FORCE_MASTER |
| 185 | bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode" |
| 186 | depends on PHY_REALTEK |
| 187 | help |
| 188 | Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F). |
| 189 | This can work around link stability and data corruption issues on gigabit |
| 190 | links which can occur in slave mode on certain PHYs, e.g. on the |
| 191 | RTL8211C(L). |
| 192 | |
| 193 | Please note that two directly connected devices (i.e. via crossover cable) |
| 194 | will not be able to establish a link between each other if they both force |
| 195 | master mode. Multiple devices forcing master mode when connected by a |
| 196 | network switch do not pose a problem as the switch configures its affected |
| 197 | ports into slave mode. |
| 198 | |
| 199 | This option only affects gigabit links. If you must establish a direct |
| 200 | connection between two devices which both force master mode, try forcing |
| 201 | the link speed to 100MBit/s. |
| 202 | |
| 203 | If unsure, say N. |
| 204 | |
| 205 | config PHY_SMSC |
| 206 | bool "Microchip(SMSC) Ethernet PHYs support" |
| 207 | |
| 208 | config PHY_TERANETICS |
| 209 | bool "Teranetics Ethernet PHYs support" |
| 210 | |
| 211 | config PHY_TI |
| 212 | bool "Texas Instruments Ethernet PHYs support" |
| 213 | |
| 214 | config PHY_VITESSE |
| 215 | bool "Vitesse Ethernet PHYs support" |
| 216 | |
| 217 | config PHY_XILINX |
| 218 | bool "Xilinx Ethernet PHYs support" |
| 219 | |
| Hannes Schmelzer | da49460 | 2017-03-23 15:11:43 +0100 | [diff] [blame] | 220 | config PHY_FIXED |
| 221 | bool "Fixed-Link PHY" |
| 222 | depends on DM_ETH |
| 223 | help |
| 224 | Fixed PHY is used for having a 'fixed-link' to another MAC with a direct |
| 225 | connection (MII, RGMII, ...). |
| 226 | There is nothing like autoneogation and so |
| 227 | on, the link is always up with fixed speed and fixed duplex-setting. |
| 228 | More information: doc/device-tree-bindings/net/fixed-link.txt |
| 229 | |
| Alex | 89e50d9 | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 230 | endif #PHYLIB |