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Christophe Leroy069fa832017-07-06 10:23:22 +02001menu "mpc8xx CPU"
Christophe Leroyb3510fb2018-03-16 17:20:41 +01002 depends on MPC8xx
Christophe Leroy069fa832017-07-06 10:23:22 +02003
4config SYS_CPU
5 default "mpc8xx"
6
7choice
8 prompt "Target select"
9 optional
10
Christophe Leroy35982952017-07-07 10:16:42 +020011config TARGET_MCR3000
12 bool "Support MCR3000 board from CSSI"
13
Christophe Leroy1fc46f52022-10-14 12:54:50 +020014config TARGET_CMPC885
15 bool "Support CMPC885 board from CSSI"
16
Christophe Leroy069fa832017-07-06 10:23:22 +020017endchoice
18
Christophe Leroy23da3732017-07-06 10:33:21 +020019choice
20 prompt "CPU select"
21 default MPC866
22
23config MPC866
24 bool "MPC866"
Tom Rini3ef67ae2021-08-26 11:47:59 -040025 select SYS_CACHE_SHIFT_4
Christophe Leroy23da3732017-07-06 10:33:21 +020026
27config MPC885
28 bool "MPC885"
Tom Rini3ef67ae2021-08-26 11:47:59 -040029 select SYS_CACHE_SHIFT_4
Christophe Leroy23da3732017-07-06 10:33:21 +020030
31endchoice
32
Christophe Leroyd8f34da2023-05-03 08:50:55 +020033choice
34 prompt "Microcode patch selection"
35 default NO_UCODE_PATCH
36 help
37 This allows loading of CPM microcode.
38
39 Only one microcode can be loaded at a time.
40
41config NO_UCODE_PATCH
42 bool "None"
43
44config USB_SOF_UCODE_PATCH
45 bool "USB SOF patch"
46 depends on MPC885
47 help
48 This microcode fixes CPM15 errata:
49
50 When the USB controller is configured in Host mode, and the
51 SOF generation (SFTE=1 in USMOD register) is being used,
52 there may be false CRC error indication in other SCCs.
53 Although the data is received correctly, the CRC result
54 will be corrupted.
55
56endchoice
57
Christophe Leroyba4dafb2017-07-06 10:33:09 +020058comment "Specific commands"
59
60config CMD_IMMAP
61 bool "Enable various commands to dump IMMR information"
62 help
63 This enables various commands such as:
64
65 siuinfo - print System Interface Unit (SIU) registers
66 memcinfo - print Memory Controller registers
Christophe Leroy23da3732017-07-06 10:33:21 +020067
68comment "Configuration Registers"
69
70config SYS_SIUMCR
71 hex "SIUMCR register"
72 help
73 SIU Module Configuration (11-6)
74
75config SYS_SYPCR
Christophe Leroy0fe1a202023-04-03 10:27:39 +020076 hex "SYPCR register" if !WDT_MPC8xxx
77 default 0
Christophe Leroy23da3732017-07-06 10:33:21 +020078 help
79 System Protection Control (11-9)
80
81config SYS_TBSCR
82 hex "TBSCR register"
83 help
84 Time Base Status and Control (11-26)
85
86config SYS_PISCR
87 hex "PISCR register"
88 help
89 Periodic Interrupt Status and Control (11-31)
90
91config SYS_PLPRCR_BOOL
92 bool "Customise PLPRCR"
93
94config SYS_PLPRCR
95 hex "PLPRCR register"
96 depends on SYS_PLPRCR_BOOL
97 help
98 PLL, Low-Power, and Reset Control Register (15-30)
99
100config SYS_SCCR
101 hex "SCCR register"
102 help
103 System Clock and reset Control Register (15-27)
104
105config SYS_SCCR_MASK
106 hex "MASK for setting SCCR register"
107
108config SYS_DER
109 hex "DER register"
110 help
111 Debug Event Register (37-47)
112
Christophe Leroy5fb0b632023-01-30 09:11:03 +0100113source "board/cssi/mcr3000/Kconfig"
Christophe Leroy35982952017-07-07 10:16:42 +0200114
Christophe Leroy1fc46f52022-10-14 12:54:50 +0200115source "board/cssi/cmpc885/Kconfig"
Christophe Leroy069fa832017-07-06 10:23:22 +0200116endmenu