wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * arch/ppc/kernel/pci_auto.c |
| 3 | * |
| 4 | * PCI autoconfiguration library |
| 5 | * |
| 6 | * Author: Matt Porter <mporter@mvista.com> |
| 7 | * |
| 8 | * Copyright 2000 MontaVista Software Inc. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your |
| 13 | * option) any later version. |
| 14 | */ |
| 15 | |
| 16 | #include <common.h> |
| 17 | |
| 18 | #ifdef CONFIG_PCI |
| 19 | |
| 20 | #include <pci.h> |
| 21 | |
| 22 | #undef DEBUG |
| 23 | #ifdef DEBUG |
| 24 | #define DEBUGF(x...) printf(x) |
| 25 | #else |
| 26 | #define DEBUGF(x...) |
| 27 | #endif /* DEBUG */ |
| 28 | |
| 29 | #define PCIAUTO_IDE_MODE_MASK 0x05 |
| 30 | |
| 31 | /* |
| 32 | * |
| 33 | */ |
| 34 | |
| 35 | void pciauto_region_init(struct pci_region* res) |
| 36 | { |
Sergei Shtylyov | 9679f4d | 2007-04-23 15:30:39 +0200 | [diff] [blame] | 37 | /* |
| 38 | * Avoid allocating PCI resources from address 0 -- this is illegal |
| 39 | * according to PCI 2.1 and moreover, this is known to cause Linux IDE |
| 40 | * drivers to fail. Use a reasonable starting value of 0x1000 instead. |
| 41 | */ |
| 42 | res->bus_lower = res->bus_start ? res->bus_start : 0x1000; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 43 | } |
| 44 | |
| 45 | void pciauto_region_align(struct pci_region *res, unsigned long size) |
| 46 | { |
| 47 | res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1; |
| 48 | } |
| 49 | |
| 50 | int pciauto_region_allocate(struct pci_region* res, unsigned int size, unsigned int *bar) |
| 51 | { |
| 52 | unsigned long addr; |
| 53 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 54 | if (!res) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 55 | DEBUGF("No resource"); |
| 56 | goto error; |
| 57 | } |
| 58 | |
| 59 | addr = ((res->bus_lower - 1) | (size - 1)) + 1; |
| 60 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 61 | if (addr - res->bus_start + size > res->size) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 62 | DEBUGF("No room in resource"); |
| 63 | goto error; |
| 64 | } |
| 65 | |
| 66 | res->bus_lower = addr + size; |
| 67 | |
| 68 | DEBUGF("address=0x%lx", addr); |
| 69 | |
| 70 | *bar = addr; |
| 71 | return 0; |
| 72 | |
| 73 | error: |
| 74 | *bar = 0xffffffff; |
| 75 | return -1; |
| 76 | } |
| 77 | |
| 78 | /* |
| 79 | * |
| 80 | */ |
| 81 | |
| 82 | void pciauto_setup_device(struct pci_controller *hose, |
| 83 | pci_dev_t dev, int bars_num, |
| 84 | struct pci_region *mem, |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 85 | struct pci_region *prefetch, |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 86 | struct pci_region *io) |
| 87 | { |
| 88 | unsigned int bar_value, bar_response, bar_size; |
| 89 | unsigned int cmdstat = 0; |
| 90 | struct pci_region *bar_res; |
| 91 | int bar, bar_nr = 0; |
| 92 | int found_mem64 = 0; |
| 93 | |
| 94 | pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); |
| 95 | cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER; |
| 96 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 97 | for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 98 | /* Tickle the BAR and get the response */ |
| 99 | pci_hose_write_config_dword(hose, dev, bar, 0xffffffff); |
| 100 | pci_hose_read_config_dword(hose, dev, bar, &bar_response); |
| 101 | |
| 102 | /* If BAR is not implemented go to the next BAR */ |
| 103 | if (!bar_response) |
| 104 | continue; |
| 105 | |
| 106 | found_mem64 = 0; |
| 107 | |
| 108 | /* Check the BAR type and set our address mask */ |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 109 | if (bar_response & PCI_BASE_ADDRESS_SPACE) { |
Jin Zhengxiong-R64188 | f4ff3e8 | 2006-06-27 18:12:02 +0800 | [diff] [blame] | 110 | bar_size = ((~(bar_response & PCI_BASE_ADDRESS_IO_MASK)) |
| 111 | & 0xffff) + 1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 112 | bar_res = io; |
| 113 | |
| 114 | DEBUGF("PCI Autoconfig: BAR %d, I/O, size=0x%x, ", bar_nr, bar_size); |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 115 | } else { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 116 | if ( (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == |
| 117 | PCI_BASE_ADDRESS_MEM_TYPE_64) |
| 118 | found_mem64 = 1; |
| 119 | |
| 120 | bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1; |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 121 | if (prefetch && (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH)) |
| 122 | bar_res = prefetch; |
| 123 | else |
| 124 | bar_res = mem; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 125 | |
| 126 | DEBUGF("PCI Autoconfig: BAR %d, Mem, size=0x%x, ", bar_nr, bar_size); |
| 127 | } |
| 128 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 129 | if (pciauto_region_allocate(bar_res, bar_size, &bar_value) == 0) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 130 | /* Write it out and update our limit */ |
| 131 | pci_hose_write_config_dword(hose, dev, bar, bar_value); |
| 132 | |
| 133 | /* |
| 134 | * If we are a 64-bit decoder then increment to the |
| 135 | * upper 32 bits of the bar and force it to locate |
| 136 | * in the lower 4GB of memory. |
| 137 | */ |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 138 | if (found_mem64) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 139 | bar += 4; |
| 140 | pci_hose_write_config_dword(hose, dev, bar, 0x00000000); |
| 141 | } |
| 142 | |
| 143 | cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ? |
| 144 | PCI_COMMAND_IO : PCI_COMMAND_MEMORY; |
| 145 | } |
| 146 | |
| 147 | DEBUGF("\n"); |
| 148 | |
| 149 | bar_nr++; |
| 150 | } |
| 151 | |
| 152 | pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); |
| 153 | pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); |
| 154 | pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); |
| 155 | } |
| 156 | |
| 157 | static void pciauto_prescan_setup_bridge(struct pci_controller *hose, |
| 158 | pci_dev_t dev, int sub_bus) |
| 159 | { |
| 160 | struct pci_region *pci_mem = hose->pci_mem; |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 161 | struct pci_region *pci_prefetch = hose->pci_prefetch; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 162 | struct pci_region *pci_io = hose->pci_io; |
| 163 | unsigned int cmdstat; |
| 164 | |
| 165 | pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); |
| 166 | |
| 167 | /* Configure bus number registers */ |
| 168 | pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev)); |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 169 | pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 170 | pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff); |
| 171 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 172 | if (pci_mem) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 173 | /* Round memory allocator to 1MB boundary */ |
| 174 | pciauto_region_align(pci_mem, 0x100000); |
| 175 | |
| 176 | /* Set up memory and I/O filter limits, assume 32-bit I/O space */ |
| 177 | pci_hose_write_config_word(hose, dev, PCI_MEMORY_BASE, |
| 178 | (pci_mem->bus_lower & 0xfff00000) >> 16); |
| 179 | |
| 180 | cmdstat |= PCI_COMMAND_MEMORY; |
| 181 | } |
| 182 | |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 183 | if (pci_prefetch) { |
| 184 | /* Round memory allocator to 1MB boundary */ |
| 185 | pciauto_region_align(pci_prefetch, 0x100000); |
| 186 | |
| 187 | /* Set up memory and I/O filter limits, assume 32-bit I/O space */ |
| 188 | pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, |
| 189 | (pci_prefetch->bus_lower & 0xfff00000) >> 16); |
| 190 | |
| 191 | cmdstat |= PCI_COMMAND_MEMORY; |
| 192 | } else { |
| 193 | /* We don't support prefetchable memory for now, so disable */ |
| 194 | pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000); |
Matthew McClintock | 2f43f33 | 2006-06-28 10:44:23 -0500 | [diff] [blame] | 195 | pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x0); |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 196 | } |
| 197 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 198 | if (pci_io) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 199 | /* Round I/O allocator to 4KB boundary */ |
| 200 | pciauto_region_align(pci_io, 0x1000); |
| 201 | |
| 202 | pci_hose_write_config_byte(hose, dev, PCI_IO_BASE, |
| 203 | (pci_io->bus_lower & 0x0000f000) >> 8); |
| 204 | pci_hose_write_config_word(hose, dev, PCI_IO_BASE_UPPER16, |
| 205 | (pci_io->bus_lower & 0xffff0000) >> 16); |
| 206 | |
| 207 | cmdstat |= PCI_COMMAND_IO; |
| 208 | } |
| 209 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 210 | /* Enable memory and I/O accesses, enable bus master */ |
| 211 | pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER); |
| 212 | } |
| 213 | |
| 214 | static void pciauto_postscan_setup_bridge(struct pci_controller *hose, |
| 215 | pci_dev_t dev, int sub_bus) |
| 216 | { |
| 217 | struct pci_region *pci_mem = hose->pci_mem; |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 218 | struct pci_region *pci_prefetch = hose->pci_prefetch; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 219 | struct pci_region *pci_io = hose->pci_io; |
| 220 | |
| 221 | /* Configure bus number registers */ |
| 222 | pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, sub_bus); |
| 223 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 224 | if (pci_mem) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 225 | /* Round memory allocator to 1MB boundary */ |
| 226 | pciauto_region_align(pci_mem, 0x100000); |
| 227 | |
| 228 | pci_hose_write_config_word(hose, dev, PCI_MEMORY_LIMIT, |
| 229 | (pci_mem->bus_lower-1) >> 16); |
| 230 | } |
| 231 | |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 232 | if (pci_prefetch) { |
| 233 | /* Round memory allocator to 1MB boundary */ |
| 234 | pciauto_region_align(pci_prefetch, 0x100000); |
| 235 | |
| 236 | pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, |
| 237 | (pci_prefetch->bus_lower-1) >> 16); |
| 238 | } |
| 239 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 240 | if (pci_io) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 241 | /* Round I/O allocator to 4KB boundary */ |
| 242 | pciauto_region_align(pci_io, 0x1000); |
| 243 | |
| 244 | pci_hose_write_config_byte(hose, dev, PCI_IO_LIMIT, |
| 245 | ((pci_io->bus_lower-1) & 0x0000f000) >> 8); |
| 246 | pci_hose_write_config_word(hose, dev, PCI_IO_LIMIT_UPPER16, |
| 247 | ((pci_io->bus_lower-1) & 0xffff0000) >> 16); |
| 248 | } |
| 249 | } |
| 250 | |
| 251 | /* |
| 252 | * |
| 253 | */ |
| 254 | |
| 255 | void pciauto_config_init(struct pci_controller *hose) |
| 256 | { |
| 257 | int i; |
| 258 | |
| 259 | hose->pci_io = hose->pci_mem = NULL; |
| 260 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 261 | for (i=0; i<hose->region_count; i++) { |
| 262 | switch(hose->regions[i].flags) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 263 | case PCI_REGION_IO: |
| 264 | if (!hose->pci_io || |
| 265 | hose->pci_io->size < hose->regions[i].size) |
| 266 | hose->pci_io = hose->regions + i; |
| 267 | break; |
| 268 | case PCI_REGION_MEM: |
| 269 | if (!hose->pci_mem || |
| 270 | hose->pci_mem->size < hose->regions[i].size) |
| 271 | hose->pci_mem = hose->regions + i; |
| 272 | break; |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 273 | case (PCI_REGION_MEM | PCI_REGION_PREFETCH): |
| 274 | if (!hose->pci_prefetch || |
| 275 | hose->pci_prefetch->size < hose->regions[i].size) |
| 276 | hose->pci_prefetch = hose->regions + i; |
| 277 | break; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 278 | } |
| 279 | } |
| 280 | |
| 281 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 282 | if (hose->pci_mem) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 283 | pciauto_region_init(hose->pci_mem); |
| 284 | |
| 285 | DEBUGF("PCI Autoconfig: Memory region: [%lx-%lx]\n", |
| 286 | hose->pci_mem->bus_start, |
| 287 | hose->pci_mem->bus_start + hose->pci_mem->size - 1); |
| 288 | } |
| 289 | |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 290 | if (hose->pci_prefetch) { |
| 291 | pciauto_region_init(hose->pci_prefetch); |
| 292 | |
| 293 | DEBUGF("PCI Autoconfig: Prefetchable Memory region: [%lx-%lx]\n", |
| 294 | hose->pci_prefetch->bus_start, |
| 295 | hose->pci_prefetch->bus_start + hose->pci_prefetch->size - 1); |
| 296 | } |
| 297 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 298 | if (hose->pci_io) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 299 | pciauto_region_init(hose->pci_io); |
| 300 | |
| 301 | DEBUGF("PCI Autoconfig: I/O region: [%lx-%lx]\n", |
| 302 | hose->pci_io->bus_start, |
| 303 | hose->pci_io->bus_start + hose->pci_io->size - 1); |
| 304 | } |
| 305 | } |
| 306 | |
wdenk | 452cfd6 | 2002-11-19 11:04:11 +0000 | [diff] [blame] | 307 | /* HJF: Changed this to return int. I think this is required |
| 308 | * to get the correct result when scanning bridges |
| 309 | */ |
| 310 | int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 311 | { |
wdenk | 452cfd6 | 2002-11-19 11:04:11 +0000 | [diff] [blame] | 312 | unsigned int sub_bus = PCI_BUS(dev); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 313 | unsigned short class; |
| 314 | unsigned char prg_iface; |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 315 | int n; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 316 | |
| 317 | pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class); |
| 318 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 319 | switch(class) { |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 320 | case PCI_CLASS_BRIDGE_PCI: |
wdenk | b666c8f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 321 | hose->current_busno++; |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 322 | pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_prefetch, hose->pci_io); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 323 | |
wdenk | b666c8f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 324 | DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev)); |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame] | 325 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 326 | /* Passing in current_busno allows for sibling P2P bridges */ |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 327 | pciauto_prescan_setup_bridge(hose, dev, hose->current_busno); |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame] | 328 | /* |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 329 | * need to figure out if this is a subordinate bridge on the bus |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 330 | * to be able to properly set the pri/sec/sub bridge registers. |
| 331 | */ |
| 332 | n = pci_hose_scan_bus(hose, hose->current_busno); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 333 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 334 | /* figure out the deepest we've gone for this leg */ |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 335 | sub_bus = max(n, sub_bus); |
wdenk | b666c8f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 336 | pciauto_postscan_setup_bridge(hose, dev, sub_bus); |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 337 | |
wdenk | b666c8f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 338 | sub_bus = hose->current_busno; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 339 | break; |
| 340 | |
| 341 | case PCI_CLASS_STORAGE_IDE: |
| 342 | pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prg_iface); |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 343 | if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) { |
| 344 | DEBUGF("PCI Autoconfig: Skipping legacy mode IDE controller\n"); |
| 345 | return sub_bus; |
| 346 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 347 | |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 348 | pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 349 | break; |
| 350 | |
wdenk | 1fe2c70 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 351 | case PCI_CLASS_BRIDGE_CARDBUS: |
| 352 | /* just do a minimal setup of the bridge, let the OS take care of the rest */ |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 353 | pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); |
wdenk | 1fe2c70 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 354 | |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 355 | DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n", PCI_DEV(dev)); |
wdenk | 1fe2c70 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 356 | |
| 357 | hose->current_busno++; |
| 358 | break; |
| 359 | |
wdenk | 5d84173 | 2003-08-17 18:55:18 +0000 | [diff] [blame] | 360 | #ifdef CONFIG_MPC5200 |
| 361 | case PCI_CLASS_BRIDGE_OTHER: |
| 362 | DEBUGF("PCI Autoconfig: Skipping bridge device %d\n", |
| 363 | PCI_DEV(dev)); |
| 364 | break; |
| 365 | #endif |
Rafal Jaworowski | 384da5e | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 366 | #ifdef CONFIG_MPC834X |
| 367 | case PCI_CLASS_BRIDGE_OTHER: |
| 368 | /* |
| 369 | * The host/PCI bridge 1 seems broken in 8349 - it presents |
| 370 | * itself as 'PCI_CLASS_BRIDGE_OTHER' and appears as an _agent_ |
| 371 | * device claiming resources io/mem/irq.. we only allow for |
| 372 | * the PIMMR window to be allocated (BAR0 - 1MB size) |
| 373 | */ |
| 374 | DEBUGF("PCI Autoconfig: Broken bridge found, only minimal config\n"); |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 375 | pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); |
Rafal Jaworowski | 384da5e | 2005-10-17 02:39:53 +0200 | [diff] [blame] | 376 | break; |
| 377 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 378 | default: |
Kumar Gala | e5ce420 | 2006-01-11 13:24:15 -0600 | [diff] [blame] | 379 | pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 380 | break; |
| 381 | } |
wdenk | 452cfd6 | 2002-11-19 11:04:11 +0000 | [diff] [blame] | 382 | |
| 383 | return sub_bus; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 384 | } |
| 385 | |
| 386 | #endif /* CONFIG_PCI */ |