Mike Dunn | 54baebe | 2013-04-12 11:59:18 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Mike Dunn <mikedunn@newsguy.com> |
| 3 | * |
| 4 | * This file is released under the terms of GPL v2 and any later version. |
| 5 | * See the file COPYING in the root directory of the source tree for details. |
| 6 | * |
| 7 | */ |
| 8 | |
| 9 | #ifndef __DOCG4_H__ |
| 10 | #define __DOCG4_H__ |
| 11 | |
| 12 | #include <common.h> |
| 13 | #include <linux/mtd/nand.h> |
| 14 | |
| 15 | extern int docg4_nand_init(struct mtd_info *mtd, |
| 16 | struct nand_chip *nand, int devnum); |
| 17 | |
| 18 | /* SPL-related definitions */ |
| 19 | #define DOCG4_IPL_LOAD_BLOCK_COUNT 2 /* number of blocks that IPL loads */ |
| 20 | #define DOCG4_BLOCK_CAPACITY_SPL 0x10000 /* reliable mode; redundant pages */ |
| 21 | |
| 22 | #define DOC_IOSPACE_DATA 0x0800 |
| 23 | |
| 24 | /* register offsets */ |
| 25 | #define DOC_CHIPID 0x1000 |
| 26 | #define DOC_DEVICESELECT 0x100a |
| 27 | #define DOC_ASICMODE 0x100c |
| 28 | #define DOC_DATAEND 0x101e |
| 29 | #define DOC_NOP 0x103e |
| 30 | |
| 31 | #define DOC_FLASHSEQUENCE 0x1032 |
| 32 | #define DOC_FLASHCOMMAND 0x1034 |
| 33 | #define DOC_FLASHADDRESS 0x1036 |
| 34 | #define DOC_FLASHCONTROL 0x1038 |
| 35 | #define DOC_ECCCONF0 0x1040 |
| 36 | #define DOC_ECCCONF1 0x1042 |
| 37 | #define DOC_HAMMINGPARITY 0x1046 |
| 38 | #define DOC_BCH_SYNDROM(idx) (0x1048 + idx) |
| 39 | |
| 40 | #define DOC_ASICMODECONFIRM 0x1072 |
| 41 | #define DOC_CHIPID_INV 0x1074 |
| 42 | #define DOC_POWERMODE 0x107c |
| 43 | |
| 44 | #define DOCG4_MYSTERY_REG 0x1050 |
| 45 | |
| 46 | /* apparently used only to write oob bytes 6 and 7 */ |
| 47 | #define DOCG4_OOB_6_7 0x1052 |
| 48 | |
| 49 | /* DOC_FLASHSEQUENCE register commands */ |
| 50 | #define DOC_SEQ_RESET 0x00 |
| 51 | #define DOCG4_SEQ_PAGE_READ 0x03 |
| 52 | #define DOCG4_SEQ_FLUSH 0x29 |
| 53 | #define DOCG4_SEQ_PAGEWRITE 0x16 |
| 54 | #define DOCG4_SEQ_PAGEPROG 0x1e |
| 55 | #define DOCG4_SEQ_BLOCKERASE 0x24 |
| 56 | |
| 57 | /* DOC_FLASHCOMMAND register commands */ |
| 58 | #define DOCG4_CMD_PAGE_READ 0x00 |
| 59 | #define DOC_CMD_ERASECYCLE2 0xd0 |
| 60 | #define DOCG4_CMD_FLUSH 0x70 |
| 61 | #define DOCG4_CMD_READ2 0x30 |
| 62 | #define DOC_CMD_PROG_BLOCK_ADDR 0x60 |
| 63 | #define DOCG4_CMD_PAGEWRITE 0x80 |
| 64 | #define DOC_CMD_PROG_CYCLE2 0x10 |
| 65 | #define DOC_CMD_RESET 0xff |
| 66 | |
| 67 | /* DOC_POWERMODE register bits */ |
| 68 | #define DOC_POWERDOWN_READY 0x80 |
| 69 | |
| 70 | /* DOC_FLASHCONTROL register bits */ |
| 71 | #define DOC_CTRL_CE 0x10 |
| 72 | #define DOC_CTRL_UNKNOWN 0x40 |
| 73 | #define DOC_CTRL_FLASHREADY 0x01 |
| 74 | |
| 75 | /* DOC_ECCCONF0 register bits */ |
| 76 | #define DOC_ECCCONF0_READ_MODE 0x8000 |
| 77 | #define DOC_ECCCONF0_UNKNOWN 0x2000 |
| 78 | #define DOC_ECCCONF0_ECC_ENABLE 0x1000 |
| 79 | #define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff |
| 80 | |
| 81 | /* DOC_ECCCONF1 register bits */ |
| 82 | #define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80 |
| 83 | #define DOC_ECCCONF1_ECC_ENABLE 0x07 |
| 84 | #define DOC_ECCCONF1_PAGE_IS_WRITTEN 0x20 |
| 85 | |
| 86 | /* DOC_ASICMODE register bits */ |
| 87 | #define DOC_ASICMODE_RESET 0x00 |
| 88 | #define DOC_ASICMODE_NORMAL 0x01 |
| 89 | #define DOC_ASICMODE_POWERDOWN 0x02 |
| 90 | #define DOC_ASICMODE_MDWREN 0x04 |
| 91 | #define DOC_ASICMODE_BDETCT_RESET 0x08 |
| 92 | #define DOC_ASICMODE_RSTIN_RESET 0x10 |
| 93 | #define DOC_ASICMODE_RAM_WE 0x20 |
| 94 | |
| 95 | /* good status values read after read/write/erase operations */ |
| 96 | #define DOCG4_PROGSTATUS_GOOD 0x51 |
| 97 | #define DOCG4_PROGSTATUS_GOOD_2 0xe0 |
| 98 | |
| 99 | /* |
| 100 | * On read operations (page and oob-only), the first byte read from I/O reg is a |
| 101 | * status. On error, it reads 0x73; otherwise, it reads either 0x71 (first read |
| 102 | * after reset only) or 0x51, so bit 1 is presumed to be an error indicator. |
| 103 | */ |
| 104 | #define DOCG4_READ_ERROR 0x02 /* bit 1 indicates read error */ |
| 105 | |
| 106 | /* anatomy of the device */ |
| 107 | #define DOCG4_CHIP_SIZE 0x8000000 |
| 108 | #define DOCG4_PAGE_SIZE 0x200 |
| 109 | #define DOCG4_PAGES_PER_BLOCK 0x200 |
| 110 | #define DOCG4_BLOCK_SIZE (DOCG4_PAGES_PER_BLOCK * DOCG4_PAGE_SIZE) |
| 111 | #define DOCG4_NUMBLOCKS (DOCG4_CHIP_SIZE / DOCG4_BLOCK_SIZE) |
| 112 | #define DOCG4_OOB_SIZE 0x10 |
| 113 | #define DOCG4_CHIP_SHIFT 27 /* log_2(DOCG4_CHIP_SIZE) */ |
| 114 | #define DOCG4_PAGE_SHIFT 9 /* log_2(DOCG4_PAGE_SIZE) */ |
| 115 | #define DOCG4_ERASE_SHIFT 18 /* log_2(DOCG4_BLOCK_SIZE) */ |
| 116 | |
| 117 | /* all but the last byte is included in ecc calculation */ |
| 118 | #define DOCG4_BCH_SIZE (DOCG4_PAGE_SIZE + DOCG4_OOB_SIZE - 1) |
| 119 | |
| 120 | #define DOCG4_USERDATA_LEN 520 /* 512 byte page plus 8 oob avail to user */ |
| 121 | |
| 122 | /* expected values from the ID registers */ |
| 123 | #define DOCG4_IDREG1_VALUE 0x0400 |
| 124 | #define DOCG4_IDREG2_VALUE 0xfbff |
| 125 | |
| 126 | /* primitive polynomial used to build the Galois field used by hw ecc gen */ |
| 127 | #define DOCG4_PRIMITIVE_POLY 0x4443 |
| 128 | |
| 129 | #define DOCG4_M 14 /* Galois field is of order 2^14 */ |
| 130 | #define DOCG4_T 4 /* BCH alg corrects up to 4 bit errors */ |
| 131 | |
| 132 | #define DOCG4_FACTORY_BBT_PAGE 16 /* page where read-only factory bbt lives */ |
| 133 | |
| 134 | #endif /* __DOCG4_H__ */ |