Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Prabhakar Kushwaha | b0b4189 | 2015-05-28 14:53:54 +0530 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2015 Freescale Semiconductor, Inc. |
| 4 | * |
Prabhakar Kushwaha | b0b4189 | 2015-05-28 14:53:54 +0530 | [diff] [blame] | 5 | */ |
| 6 | |
Prabhakar Kushwaha | 7b3a6bc | 2015-06-28 11:03:59 +0530 | [diff] [blame] | 7 | #include <exports.h> |
Bogdan Purcareata | 08bc014 | 2017-05-24 16:40:21 +0000 | [diff] [blame] | 8 | #include <fsl-mc/fsl_mc.h> |
Prabhakar Kushwaha | b0b4189 | 2015-05-28 14:53:54 +0530 | [diff] [blame] | 9 | |
Prabhakar Kushwaha | 7b3a6bc | 2015-06-28 11:03:59 +0530 | [diff] [blame] | 10 | DECLARE_GLOBAL_DATA_PTR; |
| 11 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 12 | int board_eth_init(struct bd_info *bis) |
Prabhakar Kushwaha | b0b4189 | 2015-05-28 14:53:54 +0530 | [diff] [blame] | 13 | { |
Prabhakar Kushwaha | b0b4189 | 2015-05-28 14:53:54 +0530 | [diff] [blame] | 14 | |
Prabhakar Kushwaha | 7b3a6bc | 2015-06-28 11:03:59 +0530 | [diff] [blame] | 15 | #ifdef CONFIG_PHY_AQUANTIA |
| 16 | /* |
| 17 | * Export functions to be used by AQ firmware |
| 18 | * upload application |
| 19 | */ |
| 20 | gd->jt->strcpy = strcpy; |
| 21 | gd->jt->mdelay = mdelay; |
| 22 | gd->jt->mdio_get_current_dev = mdio_get_current_dev; |
| 23 | gd->jt->phy_find_by_mask = phy_find_by_mask; |
| 24 | gd->jt->mdio_phydev_for_ethname = mdio_phydev_for_ethname; |
| 25 | gd->jt->miiphy_set_current_dev = miiphy_set_current_dev; |
| 26 | #endif |
Ioana Ciornei | cfa114a | 2020-03-18 16:47:40 +0200 | [diff] [blame] | 27 | |
Ioana Ciornei | cfa114a | 2020-03-18 16:47:40 +0200 | [diff] [blame] | 28 | return 0; |
Prabhakar Kushwaha | b0b4189 | 2015-05-28 14:53:54 +0530 | [diff] [blame] | 29 | } |
Bogdan Purcareata | 08bc014 | 2017-05-24 16:40:21 +0000 | [diff] [blame] | 30 | |
| 31 | #if defined(CONFIG_RESET_PHY_R) |
| 32 | void reset_phy(void) |
| 33 | { |
| 34 | mc_env_boot(); |
| 35 | } |
| 36 | #endif /* CONFIG_RESET_PHY_R */ |