| Marek Vasut | eaee303 | 2023-09-21 20:44:20 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| 2 | /* |
| 3 | * Copyright (C) 2023 Marek Vasut <marex@denx.de> |
| 4 | */ |
| 5 | /dts-v1/; |
| 6 | /plugin/; |
| 7 | |
| 8 | #include <dt-bindings/gpio/gpio.h> |
| 9 | #include <dt-bindings/interrupt-controller/irq.h> |
| 10 | |
| 11 | #include "imx8mp-pinfunc.h" |
| 12 | |
| 13 | &brcmf { |
| 14 | reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; |
| 15 | }; |
| 16 | |
| 17 | &eeprom0 { /* EEPROM with EQoS MAC address */ |
| 18 | compatible = "atmel,24c02"; |
| 19 | pagesize = <16>; |
| 20 | }; |
| 21 | |
| 22 | &eeprom1 { /* EEPROM with FEC MAC address */ |
| 23 | compatible = "atmel,24c02"; |
| 24 | pagesize = <16>; |
| 25 | }; |
| 26 | |
| 27 | ðphy0f { /* SMSC LAN8740Ai */ |
| 28 | pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; |
| 29 | reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; |
| 30 | }; |
| 31 | |
| 32 | ðphy0g { /* Micrel KSZ9131RNXI */ |
| 33 | pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; |
| 34 | reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; |
| 35 | }; |
| 36 | |
| 37 | &i2c3 { |
| 38 | adc@48 { |
| 39 | compatible = "ti,tla2024"; |
| 40 | interrupts-extended; |
| 41 | }; |
| 42 | }; |
| 43 | |
| 44 | &ioexp { |
| 45 | status = "disabled"; |
| 46 | }; |
| 47 | |
| 48 | ®_eth_vio { |
| 49 | gpio = <&gpio2 10 GPIO_ACTIVE_LOW>; |
| 50 | pinctrl-0 = <&pinctrl_enet_vio>; |
| 51 | pinctrl-names = "default"; |
| 52 | }; |
| 53 | |
| 54 | &rv3032 { |
| 55 | pinctrl-names = "default"; |
| 56 | pinctrl-0 = <&pinctrl_rtc>; |
| 57 | interrupts-extended = <&gpio5 5 IRQ_TYPE_LEVEL_LOW>; |
| 58 | }; |
| 59 | |
| 60 | &uart2 { |
| 61 | bluetooth { |
| 62 | pinctrl-names = "default"; |
| 63 | pinctrl-0 = <&pinctrl_uart2_bt>; |
| 64 | shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; |
| 65 | }; |
| 66 | }; |
| 67 | |
| 68 | &usb_dwc3_0 { |
| 69 | pinctrl-names = "default"; |
| 70 | pinctrl-0 = <&pinctrl_usb0_vbus>; |
| 71 | }; |
| 72 | |
| 73 | &usdhc1 { |
| 74 | pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_usdhc1_wl_reg_en>; |
| 75 | pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_usdhc1_wl_reg_en>; |
| 76 | pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_usdhc1_wl_reg_en>; |
| 77 | }; |
| 78 | |
| 79 | &iomuxc { |
| 80 | pinctrl-0 = <&pinctrl_hog_base |
| 81 | &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c |
| 82 | &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f |
| 83 | &pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_i |
| 84 | &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l |
| 85 | /* GPIO_M is connected to CLKOUT2 */ |
| 86 | &pinctrl_dhcom_int>; |
| 87 | |
| 88 | pinctrl_enet_vio: dhcom-enet-vio-grp { |
| 89 | fsl,pins = < |
| 90 | MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x22 |
| 91 | >; |
| 92 | }; |
| 93 | |
| 94 | pinctrl_rtc: dhcom-rtc-grp { |
| 95 | fsl,pins = < |
| 96 | /* RTC_#INT Interrupt */ |
| 97 | MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x400001c6 |
| 98 | >; |
| 99 | }; |
| 100 | |
| 101 | pinctrl_uart2_bt: dhcom-uart2-bt-grp { |
| 102 | fsl,pins = < |
| 103 | /* BT_REG_EN */ |
| 104 | MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144 |
| 105 | >; |
| 106 | }; |
| 107 | |
| 108 | pinctrl_usb0_vbus: dhcom-usb0-grp { |
| 109 | fsl,pins = < |
| 110 | MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID 0x0 |
| 111 | >; |
| 112 | }; |
| 113 | |
| 114 | pinctrl_usdhc1_wl_reg_en: dhcom-usdhc1-wl-reg-en-grp { |
| 115 | fsl,pins = < |
| 116 | /* WL_REG_EN */ |
| 117 | MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144 |
| 118 | >; |
| 119 | }; |
| 120 | }; |