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Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +09001/*
2 * include/configs/koelsch.h
3 *
4 * Copyright (C) 2013 Renesas Electronics Corporation
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9#ifndef __KOELSCH_H
10#define __KOELSCH_H
11
12#undef DEBUG
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090013#define CONFIG_R8A7791
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090014#define CONFIG_RMOBILE_BOARD_STRING "Koelsch"
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090015
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090016#include "rcar-gen2-common.h"
Nobuhiro Iwamatsu04207bc2014-03-31 15:22:31 +090017
Nobuhiro Iwamatsu25c0dca2014-10-31 16:16:27 +090018#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
19#define CONFIG_SYS_TEXT_BASE 0x70000000
20#else
Nobuhiro Iwamatsu1484dd82014-01-08 10:32:24 +090021#define CONFIG_SYS_TEXT_BASE 0xE6304000
Nobuhiro Iwamatsu25c0dca2014-10-31 16:16:27 +090022#endif
23
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090024/* STACK */
Nobuhiro Iwamatsu25c0dca2014-10-31 16:16:27 +090025#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
26#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
27#else
28#define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC
29#endif
30
31#define STACK_AREA_SIZE 0xC000
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090032#define LOW_LEVEL_MERAM_STACK \
33 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
34
35/* MEMORY */
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090036#define RCAR_GEN2_SDRAM_BASE 0x40000000
37#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
38#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090039
40/* SCIF */
41#define CONFIG_SCIF_CONSOLE
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090042
43/* FLASH */
Nobuhiro Iwamatsu1484dd82014-01-08 10:32:24 +090044#define CONFIG_SYS_NO_FLASH
45#define CONFIG_SPI
46#define CONFIG_SH_QSPI
Nobuhiro Iwamatsu1484dd82014-01-08 10:32:24 +090047#define CONFIG_SPI_FLASH_BAR
48#define CONFIG_SPI_FLASH_SPANSION
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090049
Nobuhiro Iwamatsu157585e2013-10-20 20:37:17 +090050/* SH Ether */
Nobuhiro Iwamatsu157585e2013-10-20 20:37:17 +090051#define CONFIG_SH_ETHER
52#define CONFIG_SH_ETHER_USE_PORT 0
53#define CONFIG_SH_ETHER_PHY_ADDR 0x1
54#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
55#define CONFIG_SH_ETHER_CACHE_WRITEBACK
56#define CONFIG_SH_ETHER_CACHE_INVALIDATE
57#define CONFIG_PHYLIB
58#define CONFIG_PHY_MICREL
59#define CONFIG_BITBANGMII
60#define CONFIG_BITBANGMII_MULTI
61#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
62
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090063/* Board Clock */
Nobuhiro Iwamatsuc7922f32014-03-31 11:06:46 +090064#define RMOBILE_XTAL_CLK 20000000u
65#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
66#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090067#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090068
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090069/* i2c */
70#define CONFIG_CMD_I2C
71#define CONFIG_SYS_I2C
72#define CONFIG_SYS_I2C_SH
73#define CONFIG_SYS_I2C_SLAVE 0x7F
74#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090075#define CONFIG_SYS_I2C_SH_SPEED0 400000
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090076#define CONFIG_SYS_I2C_SH_SPEED1 400000
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090077#define CONFIG_SYS_I2C_SH_SPEED2 400000
78#define CONFIG_SH_I2C_DATA_HIGH 4
79#define CONFIG_SH_I2C_DATA_LOW 5
80#define CONFIG_SH_I2C_CLOCK 10000000
81
Nobuhiro Iwamatsu6c57c162013-10-10 10:48:20 +090082#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
83
Nobuhiro Iwamatsue7c981e2014-03-27 14:13:06 +090084/* USB */
85#define CONFIG_USB_EHCI
86#define CONFIG_USB_EHCI_RMOBILE
Nobuhiro Iwamatsua9c085f2014-07-28 15:29:31 +090087#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Nobuhiro Iwamatsue7c981e2014-03-27 14:13:06 +090088#define CONFIG_USB_STORAGE
89
Nobuhiro Iwamatsue02f1742014-12-02 16:52:24 +090090/* Module stop status bits */
91/* INTC-RT */
92#define CONFIG_SMSTP0_ENA 0x00400000
93/* MSIF*/
94#define CONFIG_SMSTP2_ENA 0x00002000
95/* INTC-SYS, IRQC */
96#define CONFIG_SMSTP4_ENA 0x00000180
97/* SCIF0 */
98#define CONFIG_SMSTP7_ENA 0x00200000
99
Nobuhiro Iwamatsuaf33ae72014-11-12 13:03:54 +0900100/* SD */
101#define CONFIG_MMC
102#define CONFIG_CMD_MMC
103#define CONFIG_GENERIC_MMC
104#define CONFIG_SH_SDHI_FREQ 97500000
105
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +0900106#endif /* __KOELSCH_H */