John Rigby | 25a3362 | 2011-04-19 10:42:42 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) ST-Ericsson SA 2009 |
| 3 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
John Rigby | 25a3362 | 2011-04-19 10:42:42 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
| 9 | |
| 10 | /* |
| 11 | * High Level Configuration Options |
| 12 | * (easy to change) |
| 13 | */ |
| 14 | #define CONFIG_U8500 |
| 15 | #define CONFIG_L2_OFF |
| 16 | |
| 17 | #define CONFIG_SYS_MEMTEST_START 0x00000000 |
| 18 | #define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF |
| 19 | #define CONFIG_SYS_HZ 1000 /* must be 1000 */ |
| 20 | |
| 21 | #define CONFIG_BOARD_EARLY_INIT_F |
Helmut Raiger | d5a184b | 2011-10-20 04:19:47 +0000 | [diff] [blame] | 22 | #define CONFIG_BOARD_LATE_INIT |
John Rigby | 25a3362 | 2011-04-19 10:42:42 +0000 | [diff] [blame] | 23 | |
| 24 | /* |
| 25 | * Size of malloc() pool |
| 26 | */ |
| 27 | #ifdef CONFIG_BOOT_SRAM |
| 28 | #define CONFIG_ENV_SIZE (32*1024) |
| 29 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 64*1024) |
| 30 | #else |
| 31 | #define CONFIG_ENV_SIZE (128*1024) |
| 32 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) |
| 33 | #endif |
| 34 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ |
| 35 | |
| 36 | /* |
| 37 | * PL011 Configuration |
| 38 | */ |
| 39 | #define CONFIG_PL011_SERIAL |
| 40 | #define CONFIG_PL011_SERIAL_RLCR |
| 41 | #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT |
| 42 | |
| 43 | /* |
| 44 | * U8500 UART registers base for 3 serial devices |
| 45 | */ |
| 46 | #define CFG_UART0_BASE 0x80120000 |
| 47 | #define CFG_UART1_BASE 0x80121000 |
| 48 | #define CFG_UART2_BASE 0x80007000 |
| 49 | #define CFG_SERIAL0 CFG_UART0_BASE |
| 50 | #define CFG_SERIAL1 CFG_UART1_BASE |
| 51 | #define CFG_SERIAL2 CFG_UART2_BASE |
| 52 | #define CONFIG_PL011_CLOCK 38400000 |
| 53 | #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \ |
| 54 | (void *)CFG_SERIAL2 } |
| 55 | #define CONFIG_CONS_INDEX 2 |
| 56 | #define CONFIG_BAUDRATE 115200 |
John Rigby | 25a3362 | 2011-04-19 10:42:42 +0000 | [diff] [blame] | 57 | |
| 58 | /* |
| 59 | * Devices and file systems |
| 60 | */ |
| 61 | #define CONFIG_MMC |
| 62 | #define CONFIG_GENERIC_MMC |
| 63 | #define CONFIG_DOS_PARTITION |
| 64 | |
| 65 | /* |
| 66 | * Commands |
| 67 | */ |
| 68 | #define CONFIG_CMD_MEMORY |
| 69 | #define CONFIG_CMD_BOOTD |
| 70 | #define CONFIG_CMD_BDI |
| 71 | #define CONFIG_CMD_IMI |
| 72 | #define CONFIG_CMD_MISC |
| 73 | #define CONFIG_CMD_RUN |
| 74 | #define CONFIG_CMD_ECHO |
| 75 | #define CONFIG_CMD_CONSOLE |
| 76 | #define CONFIG_CMD_LOADS |
| 77 | #define CONFIG_CMD_LOADB |
| 78 | #define CONFIG_CMD_MMC |
| 79 | #define CONFIG_CMD_FAT |
| 80 | #define CONFIG_CMD_EXT2 |
John Rigby | 25a3362 | 2011-04-19 10:42:42 +0000 | [diff] [blame] | 81 | #define CONFIG_CMD_SOURCE |
| 82 | #define CONFIG_CMD_I2C |
| 83 | |
| 84 | #ifndef CONFIG_BOOTDELAY |
| 85 | #define CONFIG_BOOTDELAY 1 |
| 86 | #endif |
| 87 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
| 88 | |
| 89 | #undef CONFIG_BOOTARGS |
| 90 | #define CONFIG_BOOTCOMMAND "run emmcboot" |
| 91 | |
| 92 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 93 | "verify=n\0" \ |
| 94 | "loadaddr=0x00100000\0" \ |
| 95 | "console=ttyAMA2,115200n8\0" \ |
| 96 | "memargs256=mem=96M@0 mem_modem=32M@96M mem=30M@128M " \ |
| 97 | "pmem=22M@158M pmem_hwb=44M@180M mem_mali=32@224M\0" \ |
| 98 | "memargs512=mem=96M@0 mem_modem=32M@96M mem=44M@128M " \ |
| 99 | "pmem=22M@172M mem=30M@194M mem_mali=32M@224M " \ |
| 100 | "pmem_hwb=54M@256M mem=202M@310M\0" \ |
| 101 | "commonargs=setenv bootargs cachepolicy=writealloc noinitrd " \ |
| 102 | "init=init " \ |
| 103 | "board_id=${board_id} " \ |
| 104 | "logo.${logo} " \ |
| 105 | "startup_graphics=${startup_graphics}\0" \ |
| 106 | "emmcargs=setenv bootargs ${bootargs} " \ |
| 107 | "root=/dev/mmcblk0p2 " \ |
| 108 | "rootdelay=1\0" \ |
| 109 | "addcons=setenv bootargs ${bootargs} " \ |
| 110 | "console=${console}\0" \ |
| 111 | "emmcboot=echo Booting from eMMC ...; " \ |
| 112 | "run commonargs emmcargs addcons memargs;" \ |
| 113 | "mmc read 0 ${loadaddr} 0xA0000 0x4000;" \ |
| 114 | "bootm ${loadaddr}\0" \ |
| 115 | "flash=mmc init 1;fatload mmc 1 ${loadaddr} flash.scr;" \ |
| 116 | "source ${loadaddr}\0" \ |
| 117 | "loaduimage=mmc init 1;fatload mmc 1 ${loadaddr} uImage\0" \ |
| 118 | "usbtty=cdc_acm\0" \ |
| 119 | "stdout=serial,usbtty\0" \ |
| 120 | "stdin=serial,usbtty\0" \ |
| 121 | "stderr=serial,usbtty\0" |
| 122 | |
| 123 | /* |
| 124 | * Miscellaneous configurable options |
| 125 | */ |
| 126 | |
| 127 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 128 | #define CONFIG_SYS_PROMPT "U8500 $ " /* Monitor Command Prompt */ |
| 129 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 130 | |
| 131 | /* Print Buffer Size */ |
| 132 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ |
| 133 | + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 134 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| 135 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */ |
| 136 | |
| 137 | #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
| 138 | #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */ |
| 139 | #define CONFIG_SYS_LOADS_BAUD_CHANGE |
| 140 | |
| 141 | #define CONFIG_SYS_HUSH_PARSER |
John Rigby | 25a3362 | 2011-04-19 10:42:42 +0000 | [diff] [blame] | 142 | #define CONFIG_CMDLINE_EDITING |
| 143 | |
| 144 | #define CONFIG_SETUP_MEMORY_TAGS 2 |
| 145 | #define CONFIG_INITRD_TAG |
| 146 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 147 | |
| 148 | /* |
| 149 | * I2C |
| 150 | */ |
| 151 | #define CONFIG_U8500_I2C |
| 152 | #undef CONFIG_HARD_I2C /* I2C with hardware support */ |
| 153 | #undef CONFIG_SOFT_I2C /* I2C bit-banged */ |
| 154 | #define CONFIG_I2C_MULTI_BUS |
| 155 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 156 | #define CONFIG_SYS_I2C_SLAVE 0 /* slave addr of controller */ |
| 157 | #define CONFIG_SYS_U8500_I2C0_BASE 0x80004000 |
| 158 | #define CONFIG_SYS_U8500_I2C1_BASE 0x80122000 |
| 159 | #define CONFIG_SYS_U8500_I2C2_BASE 0x80128000 |
| 160 | #define CONFIG_SYS_U8500_I2C3_BASE 0x80110000 |
| 161 | #define CONFIG_SYS_U8500_I2C_BUS_MAX 4 |
| 162 | |
| 163 | #define CONFIG_SYS_I2C_GPIOE_ADDR 0x42 /* GPIO expander chip addr */ |
| 164 | #define CONFIG_TC35892_GPIO |
John Rigby | 25a3362 | 2011-04-19 10:42:42 +0000 | [diff] [blame] | 165 | |
| 166 | /* |
| 167 | * Physical Memory Map |
| 168 | */ |
| 169 | #define CONFIG_NR_DRAM_BANKS 1 |
| 170 | #define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */ |
| 171 | #define PHYS_SDRAM_SIZE_1 0x20000000 /* 512 MB */ |
| 172 | |
| 173 | /* |
| 174 | * additions for new relocation code |
| 175 | */ |
| 176 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 177 | #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 |
| 178 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ |
| 179 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 180 | GENERATED_GBL_DATA_SIZE) |
| 181 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET |
| 182 | |
| 183 | /* landing address before relocation */ |
| 184 | #ifndef CONFIG_SYS_TEXT_BASE |
| 185 | #define CONFIG_SYS_TEXT_BASE 0x0 |
| 186 | #endif |
| 187 | |
| 188 | /* |
| 189 | * MMC related configs |
| 190 | * NB Only externa SD slot is currently supported |
| 191 | */ |
| 192 | #define MMC_BLOCK_SIZE 512 |
| 193 | #define CONFIG_ARM_PL180_MMCI |
| 194 | #define CONFIG_ARM_PL180_MMCI_BASE 0x80126000 /* MMC base for 8500 */ |
| 195 | #define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000 |
| 196 | #define CONFIG_MMC_DEV_NUM 1 |
| 197 | |
| 198 | #define CONFIG_CMD_ENV |
| 199 | #define CONFIG_CMD_SAVEENV /* CMD_ENV is obsolete but used in env_emmc.c */ |
| 200 | #define CONFIG_ENV_IS_IN_MMC |
| 201 | #define CONFIG_ENV_OFFSET 0x13F80000 |
| 202 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */ |
| 203 | |
| 204 | /* |
| 205 | * FLASH and environment organization |
| 206 | */ |
| 207 | #define CONFIG_SYS_NO_FLASH |
| 208 | |
| 209 | /* |
| 210 | * base register values for U8500 |
| 211 | */ |
| 212 | #define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock |
| 213 | management unit */ |
| 214 | #define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */ |
| 215 | |
| 216 | #endif /* __CONFIG_H */ |