Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2005 |
| 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef NPE_H |
| 9 | #define NPE_H |
| 10 | |
| 11 | /* |
| 12 | * defines... |
| 13 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 14 | #define CONFIG_SYS_NPE_NUMS 1 |
Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 15 | #ifdef CONFIG_HAS_ETH1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 16 | #undef CONFIG_SYS_NPE_NUMS |
| 17 | #define CONFIG_SYS_NPE_NUMS 2 |
Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 18 | #endif |
| 19 | |
| 20 | #define NPE_NUM_PORTS 3 |
| 21 | #define ACTIVE_PORTS 1 |
| 22 | |
| 23 | #define NPE_PKT_SIZE 1600 |
| 24 | |
| 25 | #define CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS 64 |
| 26 | #define CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS 2 |
| 27 | |
| 28 | #define NPE_MBUF_POOL_SIZE \ |
| 29 | ((CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS + \ |
| 30 | CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS) * \ |
| 31 | sizeof(IX_OSAL_MBUF) * ACTIVE_PORTS) |
| 32 | |
| 33 | #define NPE_PKT_POOL_SIZE \ |
| 34 | ((CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS + \ |
| 35 | CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS) * \ |
| 36 | NPE_PKT_SIZE * ACTIVE_PORTS) |
| 37 | |
| 38 | #define NPE_MEM_POOL_SIZE (NPE_MBUF_POOL_SIZE + NPE_PKT_POOL_SIZE) |
| 39 | |
| 40 | #define PHY_AUTONEGOTIATE_TIMEOUT 4000 /* 4000 ms autonegotiate timeout */ |
| 41 | |
| 42 | /* |
| 43 | * structs... |
| 44 | */ |
| 45 | struct npe { |
| 46 | u8 active; /* NPE active */ |
| 47 | u8 eth_id; /* IX_ETH_PORT_1 or IX_ETH_PORT_2 */ |
| 48 | u8 phy_no; /* which PHY (0 - 31) */ |
| 49 | u8 mac_address[6]; |
| 50 | |
| 51 | IX_OSAL_MBUF *rxQHead; |
| 52 | IX_OSAL_MBUF *txQHead; |
| 53 | |
| 54 | u8 *tx_pkts; |
| 55 | u8 *rx_pkts; |
| 56 | IX_OSAL_MBUF *rx_mbufs; |
| 57 | IX_OSAL_MBUF *tx_mbufs; |
| 58 | |
| 59 | int print_speed; |
| 60 | |
| 61 | int rx_read; |
| 62 | int rx_write; |
| 63 | int rx_len[PKTBUFSRX]; |
| 64 | }; |
| 65 | |
| 66 | /* |
| 67 | * prototypes... |
| 68 | */ |
Mike Frysinger | 5ff5fdb | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 69 | extern int npe_miiphy_read (const char *devname, unsigned char addr, |
Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 70 | unsigned char reg, unsigned short *value); |
Mike Frysinger | 5ff5fdb | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 71 | extern int npe_miiphy_write (const char *devname, unsigned char addr, |
Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 72 | unsigned char reg, unsigned short value); |
| 73 | |
| 74 | #endif /* ifndef NPE_H */ |