Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / d79de1d950d4779583a97be8eaab135d2bca3565 / . / drivers / block / sata_dwc.h
blob: e2d9e0c1fce8556690552d706bf07478bf607a71 [file] [log] [blame]
Kazuaki Ichinohecc558142009-06-12 18:10:12 +0900[diff] [blame]1/*
2 * sata_dwc.h
3 *
4 * Synopsys DesignWare Cores (DWC) SATA host driver
5 *
6 * Author: Mark Miesfeld <mmiesfeld@amcc.com>
7 *
8 * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese <sr@denx.de>
9 * Copyright 2008 DENX Software Engineering
10 *
11 * Based on versions provided by AMCC and Synopsys which are:
12 * Copyright 2006 Applied Micro Circuits Corporation
13 * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
14 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame^]15 * SPDX-License-Identifier: GPL-2.0+
Kazuaki Ichinohecc558142009-06-12 18:10:12 +0900[diff] [blame]16 */
17/*
18 * SATA support based on the chip canyonlands.
19 *
20 * 04-17-2009
21 * The local version of this driver for the canyonlands board
22 * does not use interrupts but polls the chip instead.
23 */
24
25
26#ifndef _SATA_DWC_H_
27#define _SATA_DWC_H_
28
29#define __U_BOOT__
30
31#define HZ 100
32#define READ 0
33#define WRITE 1
34
35enum {
36 ATA_READID_POSTRESET = (1 << 0),
37
38 ATA_DNXFER_PIO = 0,
39 ATA_DNXFER_DMA = 1,
40 ATA_DNXFER_40C = 2,
41 ATA_DNXFER_FORCE_PIO = 3,
42 ATA_DNXFER_FORCE_PIO0 = 4,
43
44 ATA_DNXFER_QUIET = (1 << 31),
45};
46
47enum hsm_task_states {
48 HSM_ST_IDLE,
49 HSM_ST_FIRST,
50 HSM_ST,
51 HSM_ST_LAST,
52 HSM_ST_ERR,
53};
54
55#define ATA_SHORT_PAUSE ((HZ >> 6) + 1)
56
57struct ata_queued_cmd {
58 struct ata_port *ap;
59 struct ata_device *dev;
60
61 struct ata_taskfile tf;
62 u8 cdb[ATAPI_CDB_LEN];
63 unsigned long flags;
64 unsigned int tag;
65 unsigned int n_elem;
66
67 int dma_dir;
68 unsigned int sect_size;
69
70 unsigned int nbytes;
71 unsigned int extrabytes;
72 unsigned int curbytes;
73
74 unsigned int err_mask;
75 struct ata_taskfile result_tf;
76
77 void *private_data;
78#ifndef __U_BOOT__
79 void *lldd_task;
80#endif
81 unsigned char *pdata;
82};
83
84typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
85
86#define ATA_TAG_POISON 0xfafbfcfdU
87
88enum {
89 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
90 LIBATA_DUMB_MAX_PRD = ATA_MAX_PRD / 4,
91 ATA_MAX_PORTS = 8,
92 ATA_DEF_QUEUE = 1,
93 ATA_MAX_QUEUE = 32,
94 ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1,
95 ATA_MAX_BUS = 2,
96 ATA_DEF_BUSY_WAIT = 10000,
97
98 ATAPI_MAX_DRAIN = 16 << 10,
99
100 ATA_SHT_EMULATED = 1,
101 ATA_SHT_CMD_PER_LUN = 1,
102 ATA_SHT_THIS_ID = -1,
103 ATA_SHT_USE_CLUSTERING = 1,
104
105 ATA_DFLAG_LBA = (1 << 0),
106 ATA_DFLAG_LBA48 = (1 << 1),
107 ATA_DFLAG_CDB_INTR = (1 << 2),
108 ATA_DFLAG_NCQ = (1 << 3),
109 ATA_DFLAG_FLUSH_EXT = (1 << 4),
110 ATA_DFLAG_ACPI_PENDING = (1 << 5),
111 ATA_DFLAG_ACPI_FAILED = (1 << 6),
112 ATA_DFLAG_AN = (1 << 7),
113 ATA_DFLAG_HIPM = (1 << 8),
114 ATA_DFLAG_DIPM = (1 << 9),
115 ATA_DFLAG_DMADIR = (1 << 10),
116 ATA_DFLAG_CFG_MASK = (1 << 12) - 1,
117
118 ATA_DFLAG_PIO = (1 << 12),
119 ATA_DFLAG_NCQ_OFF = (1 << 13),
120 ATA_DFLAG_SPUNDOWN = (1 << 14),
121 ATA_DFLAG_SLEEPING = (1 << 15),
122 ATA_DFLAG_DUBIOUS_XFER = (1 << 16),
123 ATA_DFLAG_INIT_MASK = (1 << 24) - 1,
124
125 ATA_DFLAG_DETACH = (1 << 24),
126 ATA_DFLAG_DETACHED = (1 << 25),
127
128 ATA_LFLAG_HRST_TO_RESUME = (1 << 0),
129 ATA_LFLAG_SKIP_D2H_BSY = (1 << 1),
130 ATA_LFLAG_NO_SRST = (1 << 2),
131 ATA_LFLAG_ASSUME_ATA = (1 << 3),
132 ATA_LFLAG_ASSUME_SEMB = (1 << 4),
133 ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB,
134 ATA_LFLAG_NO_RETRY = (1 << 5),
135 ATA_LFLAG_DISABLED = (1 << 6),
136
137 ATA_FLAG_SLAVE_POSS = (1 << 0),
138 ATA_FLAG_SATA = (1 << 1),
139 ATA_FLAG_NO_LEGACY = (1 << 2),
140 ATA_FLAG_MMIO = (1 << 3),
141 ATA_FLAG_SRST = (1 << 4),
142 ATA_FLAG_SATA_RESET = (1 << 5),
143 ATA_FLAG_NO_ATAPI = (1 << 6),
144 ATA_FLAG_PIO_DMA = (1 << 7),
145 ATA_FLAG_PIO_LBA48 = (1 << 8),
146 ATA_FLAG_PIO_POLLING = (1 << 9),
147 ATA_FLAG_NCQ = (1 << 10),
148 ATA_FLAG_DEBUGMSG = (1 << 13),
149 ATA_FLAG_IGN_SIMPLEX = (1 << 15),
150 ATA_FLAG_NO_IORDY = (1 << 16),
151 ATA_FLAG_ACPI_SATA = (1 << 17),
152 ATA_FLAG_AN = (1 << 18),
153 ATA_FLAG_PMP = (1 << 19),
154 ATA_FLAG_IPM = (1 << 20),
155
156 ATA_FLAG_DISABLED = (1 << 23),
157
158 ATA_PFLAG_EH_PENDING = (1 << 0),
159 ATA_PFLAG_EH_IN_PROGRESS = (1 << 1),
160 ATA_PFLAG_FROZEN = (1 << 2),
161 ATA_PFLAG_RECOVERED = (1 << 3),
162 ATA_PFLAG_LOADING = (1 << 4),
163 ATA_PFLAG_UNLOADING = (1 << 5),
164 ATA_PFLAG_SCSI_HOTPLUG = (1 << 6),
165 ATA_PFLAG_INITIALIZING = (1 << 7),
166 ATA_PFLAG_RESETTING = (1 << 8),
167 ATA_PFLAG_SUSPENDED = (1 << 17),
168 ATA_PFLAG_PM_PENDING = (1 << 18),
169
170 ATA_QCFLAG_ACTIVE = (1 << 0),
171 ATA_QCFLAG_DMAMAP = (1 << 1),
172 ATA_QCFLAG_IO = (1 << 3),
173 ATA_QCFLAG_RESULT_TF = (1 << 4),
174 ATA_QCFLAG_CLEAR_EXCL = (1 << 5),
175 ATA_QCFLAG_QUIET = (1 << 6),
176
177 ATA_QCFLAG_FAILED = (1 << 16),
178 ATA_QCFLAG_SENSE_VALID = (1 << 17),
179 ATA_QCFLAG_EH_SCHEDULED = (1 << 18),
180
181 ATA_HOST_SIMPLEX = (1 << 0),
182 ATA_HOST_STARTED = (1 << 1),
183
184 ATA_TMOUT_BOOT = 30 * 100,
185 ATA_TMOUT_BOOT_QUICK = 7 * 100,
186 ATA_TMOUT_INTERNAL = 30 * 100,
187 ATA_TMOUT_INTERNAL_QUICK = 5 * 100,
188
189 /* FIXME: GoVault needs 2s but we can't afford that without
190 * parallel probing. 800ms is enough for iVDR disk
191 * HHD424020F7SV00. Increase to 2secs when parallel probing
192 * is in place.
193 */
194 ATA_TMOUT_FF_WAIT = 4 * 100 / 5,
195
196 BUS_UNKNOWN = 0,
197 BUS_DMA = 1,
198 BUS_IDLE = 2,
199 BUS_NOINTR = 3,
200 BUS_NODATA = 4,
201 BUS_TIMER = 5,
202 BUS_PIO = 6,
203 BUS_EDD = 7,
204 BUS_IDENTIFY = 8,
205 BUS_PACKET = 9,
206
207 PORT_UNKNOWN = 0,
208 PORT_ENABLED = 1,
209 PORT_DISABLED = 2,
210
211 /* encoding various smaller bitmaps into a single
212 * unsigned long bitmap
213 */
214 ATA_NR_PIO_MODES = 7,
215 ATA_NR_MWDMA_MODES = 5,
216 ATA_NR_UDMA_MODES = 8,
217
218 ATA_SHIFT_PIO = 0,
219 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_NR_PIO_MODES,
220 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES,
221
222 ATA_DMA_PAD_SZ = 4,
223
224 ATA_ERING_SIZE = 32,
225
226 ATA_DEFER_LINK = 1,
227 ATA_DEFER_PORT = 2,
228
229 ATA_EH_DESC_LEN = 80,
230
231 ATA_EH_REVALIDATE = (1 << 0),
232 ATA_EH_SOFTRESET = (1 << 1),
233 ATA_EH_HARDRESET = (1 << 2),
234 ATA_EH_ENABLE_LINK = (1 << 3),
235 ATA_EH_LPM = (1 << 4),
236
237 ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
238 ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE,
239
240 ATA_EHI_HOTPLUGGED = (1 << 0),
241 ATA_EHI_RESUME_LINK = (1 << 1),
242 ATA_EHI_NO_AUTOPSY = (1 << 2),
243 ATA_EHI_QUIET = (1 << 3),
244
245 ATA_EHI_DID_SOFTRESET = (1 << 16),
246 ATA_EHI_DID_HARDRESET = (1 << 17),
247 ATA_EHI_PRINTINFO = (1 << 18),
248 ATA_EHI_SETMODE = (1 << 19),
249 ATA_EHI_POST_SETMODE = (1 << 20),
250
251 ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,
252 ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,
253
254 ATA_EH_MAX_TRIES = 5,
255
256 ATA_PROBE_MAX_TRIES = 3,
257 ATA_EH_DEV_TRIES = 3,
258 ATA_EH_PMP_TRIES = 5,
259 ATA_EH_PMP_LINK_TRIES = 3,
260
261 SATA_PMP_SCR_TIMEOUT = 250,
262
263 /* Horkage types. May be set by libata or controller on drives
264 (some horkage may be drive/controller pair dependant */
265
266 ATA_HORKAGE_DIAGNOSTIC = (1 << 0),
267 ATA_HORKAGE_NODMA = (1 << 1),
268 ATA_HORKAGE_NONCQ = (1 << 2),
269 ATA_HORKAGE_MAX_SEC_128 = (1 << 3),
270 ATA_HORKAGE_BROKEN_HPA = (1 << 4),
271 ATA_HORKAGE_SKIP_PM = (1 << 5),
272 ATA_HORKAGE_HPA_SIZE = (1 << 6),
273 ATA_HORKAGE_IPM = (1 << 7),
274 ATA_HORKAGE_IVB = (1 << 8),
275 ATA_HORKAGE_STUCK_ERR = (1 << 9),
276
277 ATA_DMA_MASK_ATA = (1 << 0),
278 ATA_DMA_MASK_ATAPI = (1 << 1),
279 ATA_DMA_MASK_CFA = (1 << 2),
280
281 ATAPI_READ = 0,
282 ATAPI_WRITE = 1,
283 ATAPI_READ_CD = 2,
284 ATAPI_PASS_THRU = 3,
285 ATAPI_MISC = 4,
286};
287
288enum ata_completion_errors {
289 AC_ERR_DEV = (1 << 0),
290 AC_ERR_HSM = (1 << 1),
291 AC_ERR_TIMEOUT = (1 << 2),
292 AC_ERR_MEDIA = (1 << 3),
293 AC_ERR_ATA_BUS = (1 << 4),
294 AC_ERR_HOST_BUS = (1 << 5),
295 AC_ERR_SYSTEM = (1 << 6),
296 AC_ERR_INVALID = (1 << 7),
297 AC_ERR_OTHER = (1 << 8),
298 AC_ERR_NODEV_HINT = (1 << 9),
299 AC_ERR_NCQ = (1 << 10),
300};
301
302enum ata_xfer_mask {
303 ATA_MASK_PIO = ((1LU << ATA_NR_PIO_MODES) - 1) << ATA_SHIFT_PIO,
304 ATA_MASK_MWDMA = ((1LU << ATA_NR_MWDMA_MODES) - 1) << ATA_SHIFT_MWDMA,
305 ATA_MASK_UDMA = ((1LU << ATA_NR_UDMA_MODES) - 1) << ATA_SHIFT_UDMA,
306};
307
308struct ata_port_info {
309#ifndef __U_BOOT__
310 struct scsi_host_template *sht;
311#endif
312 unsigned long flags;
313 unsigned long link_flags;
314 unsigned long pio_mask;
315 unsigned long mwdma_mask;
316 unsigned long udma_mask;
317#ifndef __U_BOOT__
318 const struct ata_port_operations *port_ops;
319 void *private_data;
320#endif
321};
322
323struct ata_ioports {
324 void __iomem *cmd_addr;
325 void __iomem *data_addr;
326 void __iomem *error_addr;
327 void __iomem *feature_addr;
328 void __iomem *nsect_addr;
329 void __iomem *lbal_addr;
330 void __iomem *lbam_addr;
331 void __iomem *lbah_addr;
332 void __iomem *device_addr;
333 void __iomem *status_addr;
334 void __iomem *command_addr;
335 void __iomem *altstatus_addr;
336 void __iomem *ctl_addr;
337#ifndef __U_BOOT__
338 void __iomem *bmdma_addr;
339#endif
340 void __iomem *scr_addr;
341};
342
343struct ata_host {
344#ifndef __U_BOOT__
345 void __iomem * const *iomap;
346 void *private_data;
347 const struct ata_port_operations *ops;
348 unsigned long flags;
349 struct ata_port *simplex_claimed;
350#endif
351 unsigned int n_ports;
352 struct ata_port *ports[0];
353};
354
355#ifndef __U_BOOT__
356struct ata_port_stats {
357 unsigned long unhandled_irq;
358 unsigned long idle_irq;
359 unsigned long rw_reqbuf;
360};
361#endif
362
363struct ata_device {
364 struct ata_link *link;
365 unsigned int devno;
366 unsigned long flags;
367 unsigned int horkage;
368#ifndef __U_BOOT__
369 struct scsi_device *sdev;
370#ifdef CONFIG_ATA_ACPI
371 acpi_handle acpi_handle;
372 union acpi_object *gtf_cache;
373#endif
374#endif
375 u64 n_sectors;
376 unsigned int class;
377
378 union {
379 u16 id[ATA_ID_WORDS];
380 u32 gscr[SATA_PMP_GSCR_DWORDS];
381 };
382#ifndef __U_BOOT__
383 u8 pio_mode;
384 u8 dma_mode;
385 u8 xfer_mode;
386 unsigned int xfer_shift;
387#endif
388 unsigned int multi_count;
389 unsigned int max_sectors;
390 unsigned int cdb_len;
391#ifndef __U_BOOT__
392 unsigned long pio_mask;
393 unsigned long mwdma_mask;
394#endif
395 unsigned long udma_mask;
396 u16 cylinders;
397 u16 heads;
398 u16 sectors;
399#ifndef __U_BOOT__
400 int spdn_cnt;
401#endif
402};
403
404enum dma_data_direction {
405 DMA_BIDIRECTIONAL = 0,
406 DMA_TO_DEVICE = 1,
407 DMA_FROM_DEVICE = 2,
408 DMA_NONE = 3,
409};
410
411struct ata_link {
412 struct ata_port *ap;
413 int pmp;
414 unsigned int active_tag;
415 u32 sactive;
416 unsigned int flags;
417 unsigned int hw_sata_spd_limit;
418#ifndef __U_BOOT__
419 unsigned int sata_spd_limit;
420 unsigned int sata_spd;
421 struct ata_device device[2];
422#endif
423};
424
425struct ata_port {
426 unsigned long flags;
427 unsigned int pflags;
428 unsigned int print_id;
429 unsigned int port_no;
430
431 struct ata_ioports ioaddr;
432
433 u8 ctl;
434 u8 last_ctl;
435 unsigned int pio_mask;
436 unsigned int mwdma_mask;
437 unsigned int udma_mask;
438 unsigned int cbl;
439
440 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
441 unsigned long qc_allocated;
442 unsigned int qc_active;
443 int nr_active_links;
444
445 struct ata_link link;
446#ifndef __U_BOOT__
447 int nr_pmp_links;
448 struct ata_link *pmp_link;
449#endif
450 struct ata_link *excl_link;
451 int nr_pmp_links;
452#ifndef __U_BOOT__
453 struct ata_port_stats stats;
454 struct device *dev;
455 u32 msg_enable;
456#endif
457 struct ata_host *host;
458 void *port_task_data;
459
460 unsigned int hsm_task_state;
461 void *private_data;
462 unsigned char *pdata;
463};
464
Kazuaki Ichinohecc558142009-06-12 18:10:12 +0900[diff] [blame]465#endif