Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <miiphy.h> |
| 10 | |
| 11 | #include <asm/io.h> |
| 12 | |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 13 | struct io_bb_pinset { |
| 14 | int mdio; |
| 15 | int mdc; |
| 16 | }; |
| 17 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 18 | static int io_bb_mii_init(struct bb_miiphy_bus *bus) |
| 19 | { |
| 20 | return 0; |
| 21 | } |
| 22 | |
| 23 | static int io_bb_mdio_active(struct bb_miiphy_bus *bus) |
| 24 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 25 | struct io_bb_pinset *pins = bus->priv; |
| 26 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 27 | out_be32((void *)GPIO0_TCR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 28 | in_be32((void *)GPIO0_TCR) | pins->mdio); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 29 | |
| 30 | return 0; |
| 31 | } |
| 32 | |
| 33 | static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus) |
| 34 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 35 | struct io_bb_pinset *pins = bus->priv; |
| 36 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 37 | out_be32((void *)GPIO0_TCR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 38 | in_be32((void *)GPIO0_TCR) & ~pins->mdio); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 39 | |
| 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v) |
| 44 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 45 | struct io_bb_pinset *pins = bus->priv; |
| 46 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 47 | if (v) |
| 48 | out_be32((void *)GPIO0_OR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 49 | in_be32((void *)GPIO0_OR) | pins->mdio); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 50 | else |
| 51 | out_be32((void *)GPIO0_OR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 52 | in_be32((void *)GPIO0_OR) & ~pins->mdio); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
| 57 | static int io_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) |
| 58 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 59 | struct io_bb_pinset *pins = bus->priv; |
| 60 | |
| 61 | *v = ((in_be32((void *)GPIO0_IR) & pins->mdio) != 0); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 62 | |
| 63 | return 0; |
| 64 | } |
| 65 | |
| 66 | static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v) |
| 67 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 68 | struct io_bb_pinset *pins = bus->priv; |
| 69 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 70 | if (v) |
| 71 | out_be32((void *)GPIO0_OR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 72 | in_be32((void *)GPIO0_OR) | pins->mdc); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 73 | else |
| 74 | out_be32((void *)GPIO0_OR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 75 | in_be32((void *)GPIO0_OR) & ~pins->mdc); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 76 | |
| 77 | return 0; |
| 78 | } |
| 79 | |
| 80 | static int io_bb_delay(struct bb_miiphy_bus *bus) |
| 81 | { |
| 82 | udelay(1); |
| 83 | |
| 84 | return 0; |
| 85 | } |
| 86 | |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 87 | struct io_bb_pinset io_bb_pinsets[] = { |
| 88 | { |
| 89 | .mdio = CONFIG_SYS_MDIO_PIN, |
| 90 | .mdc = CONFIG_SYS_MDC_PIN, |
| 91 | }, |
| 92 | #ifdef CONFIG_SYS_GBIT_MII1_BUSNAME |
| 93 | { |
| 94 | .mdio = CONFIG_SYS_MDIO1_PIN, |
| 95 | .mdc = CONFIG_SYS_MDC1_PIN, |
| 96 | }, |
| 97 | #endif |
| 98 | }; |
| 99 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 100 | struct bb_miiphy_bus bb_miiphy_buses[] = { |
| 101 | { |
| 102 | .name = CONFIG_SYS_GBIT_MII_BUSNAME, |
| 103 | .init = io_bb_mii_init, |
| 104 | .mdio_active = io_bb_mdio_active, |
| 105 | .mdio_tristate = io_bb_mdio_tristate, |
| 106 | .set_mdio = io_bb_set_mdio, |
| 107 | .get_mdio = io_bb_get_mdio, |
| 108 | .set_mdc = io_bb_set_mdc, |
| 109 | .delay = io_bb_delay, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 110 | .priv = &io_bb_pinsets[0], |
| 111 | }, |
| 112 | #ifdef CONFIG_SYS_GBIT_MII1_BUSNAME |
| 113 | { |
| 114 | .name = CONFIG_SYS_GBIT_MII1_BUSNAME, |
| 115 | .init = io_bb_mii_init, |
| 116 | .mdio_active = io_bb_mdio_active, |
| 117 | .mdio_tristate = io_bb_mdio_tristate, |
| 118 | .set_mdio = io_bb_set_mdio, |
| 119 | .get_mdio = io_bb_get_mdio, |
| 120 | .set_mdc = io_bb_set_mdc, |
| 121 | .delay = io_bb_delay, |
| 122 | .priv = &io_bb_pinsets[1], |
| 123 | }, |
| 124 | #endif |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 125 | }; |
| 126 | |
| 127 | int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / |
| 128 | sizeof(bb_miiphy_buses[0]); |