Stefan Roese | ef28e73 | 2009-10-19 16:19:36 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 |
| 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Stefan Roese | ef28e73 | 2009-10-19 16:19:36 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/ppc4xx_config.h> |
| 10 | |
| 11 | struct ppc4xx_config ppc4xx_config_val[] = { |
| 12 | { |
| 13 | "333-133-nor", "NOR CPU: 333 PLB: 133 OPB: 66 EBC: 66", |
| 14 | { |
| 15 | 0x84, 0x70, 0xa2, 0xa6, 0x05, 0x57, 0xa0, 0x10, |
| 16 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 17 | } |
| 18 | }, |
| 19 | { |
| 20 | "333-166-nor", "NOR CPU: 333 PLB: 166 OPB: 83 EBC: 55", |
| 21 | { |
| 22 | 0xc7, 0x78, 0xf3, 0x4e, 0x05, 0xd7, 0xa0, 0x30, |
| 23 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 24 | } |
| 25 | }, |
| 26 | { |
| 27 | "333-166-nand", "NAND CPU: 333 PLB: 166 OPB: 83 EBC: 55", |
| 28 | { |
| 29 | 0xc7, 0x78, 0xf3, 0x4e, 0x05, 0xd7, 0xd0, 0x30, |
| 30 | 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 |
| 31 | } |
| 32 | }, |
| 33 | { |
| 34 | "400-133-nor", "NOR CPU: 400 PLB: 133 OPB: 66 EBC: 66", |
| 35 | { |
| 36 | 0x86, 0x78, 0xc2, 0xc6, 0x05, 0x57, 0xa0, 0x30, |
| 37 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 38 | } |
| 39 | }, |
| 40 | { |
| 41 | "400-160-nor", "NOR CPU: 400 PLB: 160 OPB: 80 EBC: 53", |
| 42 | { |
| 43 | 0x86, 0x78, 0xc2, 0xa6, 0x05, 0xd7, 0xa0, 0x10, |
| 44 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 45 | } |
| 46 | }, |
| 47 | { |
| 48 | "416-166-nor", "NOR CPU: 416 PLB: 166 OPB: 83 EBC: 55", |
| 49 | { |
| 50 | 0xc6, 0x78, 0x52, 0xa6, 0x05, 0xd7, 0xa0, 0x10, |
| 51 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 52 | } |
| 53 | }, |
| 54 | { |
| 55 | "416-166-nand", "NAND CPU: 416 PLB: 166 OPB: 83 EBC: 55", |
| 56 | { |
| 57 | 0xc6, 0x78, 0x52, 0xa6, 0x05, 0xd7, 0xd0, 0x10, |
| 58 | 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 |
| 59 | } |
| 60 | }, |
| 61 | { |
| 62 | "500-166-nor", "NOR CPU: 500 PLB: 166 OPB: 83 EBC: 55", |
| 63 | { |
| 64 | 0xc7, 0x78, 0x52, 0xc6, 0x05, 0xd7, 0xa0, 0x30, |
| 65 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 66 | } |
| 67 | }, |
| 68 | { |
| 69 | "500-166-nand", "NAND CPU: 500 PLB: 166 OPB: 83 EBC: 55", |
| 70 | { |
| 71 | 0xc7, 0x78, 0x52, 0xc6, 0x05, 0xd7, 0xd0, 0x30, |
| 72 | 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 |
| 73 | } |
| 74 | }, |
| 75 | { |
| 76 | "533-133-nor", "NOR CPU: 533 PLB: 133 OPB: 66 EBC: 66", |
| 77 | { |
| 78 | 0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, |
| 79 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 80 | } |
| 81 | }, |
| 82 | { |
| 83 | "667-133-nor", "NOR CPU: 667 PLB: 133 OPB: 66 EBC: 66", |
| 84 | { |
| 85 | 0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, |
| 86 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 87 | } |
| 88 | }, |
| 89 | { |
| 90 | "667-166-nor", "NOR CPU: 667 PLB: 166 OPB: 83 EBC: 55", |
| 91 | { |
| 92 | 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, |
| 93 | 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 |
| 94 | } |
| 95 | }, |
| 96 | { |
| 97 | "667-166-nand", "NAND CPU: 667 PLB: 166 OPB: 83 EBC: 55", |
| 98 | { |
| 99 | 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xd0, 0x30, |
| 100 | 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 |
| 101 | } |
| 102 | }, |
| 103 | }; |
| 104 | |
| 105 | int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val); |