blob: 9fdaa9dc07024392debc16f2cdff42114f7cb927 [file] [log] [blame]
John Rigby9c146032010-01-25 23:12:56 -07001/*
2 *
3 * (c) 2009 Ilya Yanok, Emcraft Systems <yanok@emcraft.com>
4 *
5 * Modified for mx25 by John Rigby <jrigby@gmail.com>
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
John Rigby9c146032010-01-25 23:12:56 -07008 */
9
10#ifndef __ASM_ARCH_CLOCK_H
11#define __ASM_ARCH_CLOCK_H
12
Benoît Thébaudeaud2dd29d2012-08-21 11:05:12 +000013#include <common.h>
14
15#ifdef CONFIG_MX25_HCLK_FREQ
16#define MXC_HCLK CONFIG_MX25_HCLK_FREQ
17#else
18#define MXC_HCLK 24000000
19#endif
20
21#ifdef CONFIG_MX25_CLK32
22#define MXC_CLK32 CONFIG_MX25_CLK32
23#else
24#define MXC_CLK32 32768
25#endif
26
Timo Ketola738fa8d2012-04-18 22:55:28 +000027enum mxc_clock {
Benoît Thébaudeau05dd78f2012-09-27 10:27:28 +000028 /* PER clocks (do not change order) */
Timo Ketola738fa8d2012-04-18 22:55:28 +000029 MXC_CSI_CLK,
30 MXC_EPIT_CLK,
31 MXC_ESAI_CLK,
32 MXC_ESDHC1_CLK,
33 MXC_ESDHC2_CLK,
34 MXC_GPT_CLK,
35 MXC_I2C_CLK,
36 MXC_LCDC_CLK,
37 MXC_NFC_CLK,
38 MXC_OWIRE_CLK,
39 MXC_PWM_CLK,
40 MXC_SIM1_CLK,
41 MXC_SIM2_CLK,
42 MXC_SSI1_CLK,
43 MXC_SSI2_CLK,
44 MXC_UART_CLK,
Benoît Thébaudeau05dd78f2012-09-27 10:27:28 +000045 /* Other clocks */
Timo Ketola738fa8d2012-04-18 22:55:28 +000046 MXC_ARM_CLK,
Benoît Thébaudeau05dd78f2012-09-27 10:27:28 +000047 MXC_AHB_CLK,
48 MXC_IPG_CLK,
49 MXC_CSPI_CLK,
Timo Ketola738fa8d2012-04-18 22:55:28 +000050 MXC_FEC_CLK,
51 MXC_CLK_NUM
52};
53
Timo Ketola738fa8d2012-04-18 22:55:28 +000054unsigned int mxc_get_clock(enum mxc_clock clk);
John Rigby9c146032010-01-25 23:12:56 -070055
Benoît Thébaudeaub3ab1392012-09-27 10:27:57 +000056#define imx_get_uartclk() mxc_get_clock(MXC_UART_CLK)
57#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
58
John Rigby9c146032010-01-25 23:12:56 -070059#endif /* __ASM_ARCH_CLOCK_H */