blob: e370853e969132fbb12eccd1f6b84eac00fba348 [file] [log] [blame]
Kumar Galab2343422008-01-16 09:05:27 -06001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/fsl_law.h>
28#include <asm/mmu.h>
29
30/* LAW(Local Access Window) configuration:
31 * 0000_0000-0800_0000: DDR(512M) -or- larger
32 * c000_0000-cfff_ffff: PCI(256M)
33 * d000_0000-dfff_ffff: RapidIO(256M)
34 * e000_0000-ffff_ffff: localbus(512M)
35 * e000_0000-e3ff_ffff: LBC 64M, 32-bit flash on CS6
36 * e400_0000-e7ff_ffff: LBC 64M, 32-bit flash on CS1
37 * e800_0000-efff_ffff: LBC 128M, nothing here
38 * f000_0000-f3ff_ffff: LBC 64M, SDRAM on CS3
39 * f400_0000-f7ff_ffff: LBC 64M, SDRAM on CS4
40 * f800_0000-fdff_ffff: LBC 64M, nothing here
41 * fc00_0000-fcff_ffff: LBC 16M, CSR,RTC,UART,etc on CS5
42 * fd00_0000-fdff_ffff: LBC 16M, nothing here
43 * fe00_0000-feff_ffff: LBC 16M, nothing here
44 * ff00_0000-ff6f_ffff: LBC 7M, nothing here
45 * ff70_0000-ff7f_ffff: CCSRBAR 1M
46 * ff80_0000-ffff_ffff: LBC 8M, 8-bit flash on CS0
47 * Note: CCSRBAR and L2-as-SRAM don't need configure Local Access
48 * Window.
49 * Note: If flash is 8M at default position(last 8M),no LAW needed.
50 */
51
52struct law_entry law_table[] = {
53#ifndef CONFIG_SPD_EEPROM
54 SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR),
55#endif
Kumar Gala9116b7c2008-01-16 10:04:42 -060056 SET_LAW_ENTRY(2, CFG_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI),
Kumar Galab2343422008-01-16 09:05:27 -060057 SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_LBC),
58};
59
60int num_law_entries = ARRAY_SIZE(law_table);