Matthias Kaehlcke | 195dbd1 | 2010-02-01 21:29:39 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Cirrus Logic EP93xx CPU-specific support. |
| 3 | * |
| 4 | * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> |
| 5 | * |
| 6 | * Copyright (C) 2004, 2005 |
| 7 | * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com> |
| 8 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 9 | * SPDX-License-Identifier: GPL-2.0+ |
Matthias Kaehlcke | 195dbd1 | 2010-02-01 21:29:39 +0100 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #include <common.h> |
| 13 | #include <asm/arch/ep93xx.h> |
| 14 | #include <asm/io.h> |
| 15 | |
| 16 | /* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */ |
| 17 | extern void reset_cpu(ulong addr) |
| 18 | { |
| 19 | struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; |
| 20 | uint32_t value; |
| 21 | |
| 22 | /* Unlock DeviceCfg and set SWRST */ |
| 23 | writel(0xAA, &syscon->sysswlock); |
| 24 | value = readl(&syscon->devicecfg); |
| 25 | value |= SYSCON_DEVICECFG_SWRST; |
| 26 | writel(value, &syscon->devicecfg); |
| 27 | |
| 28 | /* Unlock DeviceCfg and clear SWRST */ |
| 29 | writel(0xAA, &syscon->sysswlock); |
| 30 | value = readl(&syscon->devicecfg); |
| 31 | value &= ~SYSCON_DEVICECFG_SWRST; |
| 32 | writel(value, &syscon->devicecfg); |
| 33 | |
| 34 | /* Dying... */ |
| 35 | while (1) |
| 36 | ; /* noop */ |
| 37 | } |