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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Chander Kashyap0e7ab682011-08-18 22:37:19 +00002/*
3 * Copyright (C) 2011 Samsung Electronics
4 *
Chander Kashyap4131a772011-12-06 23:34:12 +00005 * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
Chander Kashyap0e7ab682011-08-18 22:37:19 +00006 */
7
Piotr Wilczekeb68f442014-03-07 14:59:46 +01008#ifndef __CONFIG_ORIGEN_H
9#define __CONFIG_ORIGEN_H
10
Simon Glassbe165002014-10-07 22:01:44 -060011#include <configs/exynos4-common.h>
Piotr Wilczekeb68f442014-03-07 14:59:46 +010012
Chander Kashyap0e7ab682011-08-18 22:37:19 +000013/* High Level Configuration Options */
Chander Kashyap4131a772011-12-06 23:34:12 +000014#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000015#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
16
Piotr Wilczekeb68f442014-03-07 14:59:46 +010017/* ORIGEN has 4 bank of DRAM */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000018#define CONFIG_SYS_SDRAM_BASE 0x40000000
Piotr Wilczekeb68f442014-03-07 14:59:46 +010019#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
20#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000021
Piotr Wilczekeb68f442014-03-07 14:59:46 +010022#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000023
Piotr Wilczekeb68f442014-03-07 14:59:46 +010024#define CONFIG_SYS_MONITOR_BASE 0x00000000
Chander Kashyap0e7ab682011-08-18 22:37:19 +000025
Piotr Wilczekeb68f442014-03-07 14:59:46 +010026/* Power Down Modes */
27#define S5P_CHECK_SLEEP 0x00000BAD
28#define S5P_CHECK_DIDLE 0xBAD00000
29#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyap0e7ab682011-08-18 22:37:19 +000030
Chander Kashyap488ef1a2011-08-18 22:37:20 +000031/* MMC SPL */
Chander Kashyap488ef1a2011-08-18 22:37:20 +000032#define COPY_BL2_FNPTR_ADDR 0x02020030
Inderpal Singh4a699c72013-04-04 23:09:21 +000033
Guillaume GARDET0df3a9d2014-10-08 15:04:38 +020034#define CONFIG_EXTRA_ENV_SETTINGS \
35 "loadaddr=0x40007000\0" \
36 "rdaddr=0x48000000\0" \
37 "kerneladdr=0x40007000\0" \
38 "ramdiskaddr=0x48000000\0" \
39 "console=ttySAC2,115200n8\0" \
40 "mmcdev=0\0" \
41 "bootenv=uEnv.txt\0" \
42 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
43 "importbootenv=echo Importing environment from mmc ...; " \
44 "env import -t $loadaddr $filesize\0" \
45 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
46 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
47 "source ${loadaddr}\0"
Chander Kashyap0e7ab682011-08-18 22:37:19 +000048
Chander Kashyap0e7ab682011-08-18 22:37:19 +000049#define CONFIG_CLK_1000_400_200
50
51/* MIU (Memory Interleaving Unit) */
52#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
53
Chander Kashyap0e7ab682011-08-18 22:37:19 +000054#define RESERVE_BLOCK_SIZE (512)
55#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
Chander Kashyap0e7ab682011-08-18 22:37:19 +000056
Rajeshwari Shindebed24422013-07-04 12:29:17 +053057#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
58
59#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyap488ef1a2011-08-18 22:37:20 +000060
Bin Meng75574052016-02-05 19:30:11 -080061/* U-Boot copy size from boot Media to DRAM.*/
Chander Kashyap488ef1a2011-08-18 22:37:20 +000062#define COPY_BL2_SIZE 0x80000
63#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
64#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
Angus Ainslie54932fe2011-09-09 12:02:02 +000065
Chander Kashyap0e7ab682011-08-18 22:37:19 +000066#endif /* __CONFIG_H */