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git01.mediatek.com / filogic / uboot / d6d0082e0b7f044e2f4a56eb2b828c309079d47d / . / drivers / gpio / Kconfig
blob: 4d2cc500bfaf906d2b33394c3605c2974fdbc8cb [file] [log] [blame]
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900[diff] [blame]1#
2# GPIO infrastructure and drivers
3#
4
5menu "GPIO Support"
6
Masahiro Yamada57ad8ee2014-10-23 22:26:09 +0900[diff] [blame]7config DM_GPIO
8 bool "Enable Driver Model for GPIO drivers"
9 depends on DM
10 help
Simon Glassd8b771d2015-02-05 21:41:35 -0700[diff] [blame]11 Enable driver model for GPIO access. The standard GPIO
12 interface (gpio_get_value(), etc.) is then implemented by
13 the GPIO uclass. Drivers provide methods to query the
14 particular GPIOs that they provide. The uclass interface
15 is defined in include/asm-generic/gpio.h.
Albert ARIBAUD \(3ADEV\)eb135ad2015-03-31 11:40:46 +0200[diff] [blame]16
Thomas Choufb1a4bf2015-10-21 21:33:45 +0800[diff] [blame]17config ALTERA_PIO
18 bool "Altera PIO driver"
19 depends on DM_GPIO
20 help
21 Select this to enable PIO for Altera devices. Please find
22 details on the "Embedded Peripherals IP User Guide" of Altera.
23
Marek Vasut12a8d792015-06-23 15:54:19 +0200[diff] [blame]24config DWAPB_GPIO
25 bool "DWAPB GPIO driver"
26 depends on DM && DM_GPIO
27 default n
28 help
29 Support for the Designware APB GPIO driver.
30
Wenyou Yang5a09d132015-11-04 14:25:13 +0800[diff] [blame]31config ATMEL_PIO4
32 bool "ATMEL PIO4 driver"
33 depends on DM
34 default n
35 help
36 Say yes here to support the Atmel PIO4 driver.
37 The PIO4 is new version of Atmel PIO controller, which manages
38 up to 128 fully programmable input/output lines. Each I/O line
39 may be dedicated as a general purpose I/O or be assigned to
40 a function of an embedded peripheral.
41
Simon Glass52c365f2016-03-11 22:07:27 -0700[diff] [blame]42config INTEL_BROADWELL_GPIO
43 bool "Intel Broadwell GPIO driver"
44 depends on DM
45 help
46 This driver supports Broadwell U devices which have an expanded
47 GPIO feature set. The difference is large enough to merit a separate
48 driver from the common Intel ICH6 driver. It supports a total of
49 95 GPIOs which can be configured from the device tree.
50
Albert ARIBAUD \(3ADEV\)eb135ad2015-03-31 11:40:46 +0200[diff] [blame]51config LPC32XX_GPIO
52 bool "LPC32XX GPIO driver"
53 depends on DM
54 default n
55 help
56 Support for the LPC32XX GPIO driver.
Simon Glass084a3fe2015-03-06 13:19:01 -0700[diff] [blame]57
Mateusz Kulikowskia1b3ae92016-03-31 23:12:15 +0200[diff] [blame]58config MSM_GPIO
59 bool "Qualcomm GPIO driver"
60 depends on DM_GPIO
61 default n
62 help
63 Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
64 This controller have single bank (default name "soc"), every
65 gpio has it's own set of registers.
66 Only simple GPIO operations are supported (get/set, change of
67 direction and checking pin function).
68 Supported devices:
69 - APQ8016
70 - MSM8916
71
Mateusz Kulikowski15a58532016-03-31 23:12:31 +0200[diff] [blame]72config PM8916_GPIO
73 bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
74 depends on DM_GPIO && PMIC_PM8916
75 help
76 Support for GPIO pins and power/reset buttons found on
77 Qualcomm PM8916 PMIC.
78 Default name for GPIO bank is "pm8916".
79 Power and reset buttons are placed in "pm8916_key" bank and
80 have gpio numbers 0 and 1 respectively.
81
Simon Glass8fa4d5a2015-08-30 16:55:27 -0600[diff] [blame]82config ROCKCHIP_GPIO
83 bool "Rockchip GPIO driver"
84 depends on DM_GPIO
85 help
86 Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
87 a number of banks (different for each SoC type) each with 32 GPIOs.
88 The GPIOs for a device are defined in the device tree with one node
89 for each bank.
90
Simon Glass084a3fe2015-03-06 13:19:01 -0700[diff] [blame]91config SANDBOX_GPIO
92 bool "Enable sandbox GPIO driver"
93 depends on SANDBOX && DM && DM_GPIO
94 help
95 This driver supports some simulated GPIOs which can be adjusted
96 using 'back door' functions like sandbox_gpio_set_value(). Then the
97 GPIOs can be inspected through the normal get_get_value()
98 interface. The purpose of this is to allow GPIOs to be used as
99 normal in sandbox, perhaps with test code actually driving the
100 behaviour of those GPIOs.
101
102config SANDBOX_GPIO_COUNT
103 int "Number of sandbox GPIOs"
104 depends on SANDBOX_GPIO
105 default 128
106 help
107 The sandbox driver can support any number of GPIOs. Generally these
108 are specified using the device tree. But you can also have a number
109 of 'anonymous' GPIOs that do not belong to any device or bank.
110 Select a suitable value depending on your needs.
Bhuvanchandra DV6d236aa2015-06-01 18:37:16 +0530[diff] [blame]111
Masahiro Yamada2dbca982016-02-16 17:03:48 +0900[diff] [blame]112config GPIO_UNIPHIER
113 bool "UniPhier GPIO"
114 depends on ARCH_UNIPHIER
115 help
116 Say yes here to support UniPhier GPIOs.
117
Bhuvanchandra DV6d236aa2015-06-01 18:37:16 +0530[diff] [blame]118config VYBRID_GPIO
119 bool "Vybrid GPIO driver"
120 depends on DM
121 default n
122 help
123 Say yes here to support Vybrid vf610 GPIOs.
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900[diff] [blame]124
Purna Chandra Mandal0ee99ca2016-01-28 15:30:13 +0530[diff] [blame]125config PIC32_GPIO
126 bool "Microchip PIC32 GPIO driver"
127 depends on DM_GPIO && MACH_PIC32
128 default y
129 help
130 Say yes here to support Microchip PIC32 GPIOs.
131
Stefan Roesee0e70422016-02-12 13:46:50 +0100[diff] [blame]132config MVEBU_GPIO
133 bool "Marvell MVEBU GPIO driver"
134 depends on DM_GPIO && ARCH_MVEBU
135 default y
136 help
137 Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs.
138
Siva Durga Prasad Paladugud6d00822016-03-10 16:27:39 +0530[diff] [blame^]139config ZYNQ_GPIO
140 bool "Zynq GPIO driver"
141 depends on DM_GPIO && ARCH_ZYNQ
142 default y
143 help
144 Supports GPIO access on Zynq SoC.
145
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900[diff] [blame]146endmenu