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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
Tom Rini6b642ac2024-10-01 12:20:28 -06004$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml#
Tom Rini53633a82024-02-29 12:33:36 -05005$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller
8
9maintainers:
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
12
13description: |
14 Qualcomm global clock control module provides the clocks, resets and power
15 domains.
16
17 See also::
Tom Rini6b642ac2024-10-01 12:20:28 -060018 include/dt-bindings/clock/qcom,gcc-mdm9615.h
Tom Rini53633a82024-02-29 12:33:36 -050019
20allOf:
21 - $ref: qcom,gcc.yaml#
22
23properties:
24 compatible:
25 enum:
Tom Rini6b642ac2024-10-01 12:20:28 -060026 - qcom,gcc-mdm9615
27
28 clocks:
29 items:
30 - description: CXO clock
31 - description: PLL4 from LLC
32
33 '#power-domain-cells': false
Tom Rini53633a82024-02-29 12:33:36 -050034
35required:
36 - compatible
37
38unevaluatedProperties: false
39
40examples:
41 - |
42 clock-controller@900000 {
Tom Rini6b642ac2024-10-01 12:20:28 -060043 compatible = "qcom,gcc-mdm9615";
Tom Rini53633a82024-02-29 12:33:36 -050044 reg = <0x900000 0x4000>;
45 #clock-cells = <1>;
46 #reset-cells = <1>;
Tom Rini6b642ac2024-10-01 12:20:28 -060047 clocks = <&cxo_board>,
48 <&lcc_pll4>;
Tom Rini53633a82024-02-29 12:33:36 -050049 };
50...