| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * Copyright 2011-2012 Calxeda, Inc. |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | /* First 4KB has pen for secondary cores. */ |
| 9 | /memreserve/ 0x00000000 0x0001000; |
| 10 | |
| 11 | / { |
| 12 | model = "Calxeda ECX-2000"; |
| 13 | compatible = "calxeda,ecx-2000"; |
| 14 | #address-cells = <2>; |
| 15 | #size-cells = <2>; |
| 16 | |
| 17 | cpus { |
| 18 | #address-cells = <1>; |
| 19 | #size-cells = <0>; |
| 20 | |
| 21 | cpu@0 { |
| 22 | compatible = "arm,cortex-a15"; |
| 23 | device_type = "cpu"; |
| 24 | reg = <0>; |
| 25 | clocks = <&a9pll>; |
| 26 | clock-names = "cpu"; |
| 27 | }; |
| 28 | |
| 29 | cpu@1 { |
| 30 | compatible = "arm,cortex-a15"; |
| 31 | device_type = "cpu"; |
| 32 | reg = <1>; |
| 33 | clocks = <&a9pll>; |
| 34 | clock-names = "cpu"; |
| 35 | }; |
| 36 | |
| 37 | cpu@2 { |
| 38 | compatible = "arm,cortex-a15"; |
| 39 | device_type = "cpu"; |
| 40 | reg = <2>; |
| 41 | clocks = <&a9pll>; |
| 42 | clock-names = "cpu"; |
| 43 | }; |
| 44 | |
| 45 | cpu@3 { |
| 46 | compatible = "arm,cortex-a15"; |
| 47 | device_type = "cpu"; |
| 48 | reg = <3>; |
| 49 | clocks = <&a9pll>; |
| 50 | clock-names = "cpu"; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | memory@0 { |
| 55 | name = "memory"; |
| 56 | device_type = "memory"; |
| 57 | reg = <0x00000000 0x00000000 0x00000000 0xff800000>; |
| 58 | }; |
| 59 | |
| 60 | memory@200000000 { |
| 61 | name = "memory"; |
| 62 | device_type = "memory"; |
| 63 | reg = <0x00000002 0x00000000 0x00000003 0x00000000>; |
| 64 | }; |
| 65 | |
| 66 | soc { |
| 67 | ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; |
| 68 | |
| 69 | timer { |
| 70 | compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, |
| 71 | <1 14 0xf08>, |
| 72 | <1 11 0xf08>, |
| 73 | <1 10 0xf08>; |
| 74 | }; |
| 75 | |
| 76 | memory-controller@fff00000 { |
| 77 | compatible = "calxeda,ecx-2000-ddr-ctrl"; |
| 78 | reg = <0xfff00000 0x1000>; |
| 79 | interrupts = <0 91 4>; |
| 80 | }; |
| 81 | |
| 82 | intc: interrupt-controller@fff11000 { |
| 83 | compatible = "arm,cortex-a15-gic"; |
| 84 | #interrupt-cells = <3>; |
| 85 | #address-cells = <0>; |
| 86 | interrupt-controller; |
| 87 | interrupts = <1 9 0xf04>; |
| 88 | reg = <0xfff11000 0x1000>, |
| 89 | <0xfff12000 0x2000>, |
| 90 | <0xfff14000 0x2000>, |
| 91 | <0xfff16000 0x2000>; |
| 92 | }; |
| 93 | |
| 94 | pmu { |
| 95 | compatible = "arm,cortex-a9-pmu"; |
| 96 | interrupts = <0 76 4>, <0 75 4>, <0 74 4>, <0 73 4>; |
| 97 | }; |
| 98 | }; |
| 99 | }; |
| 100 | |
| 101 | /include/ "ecx-common.dtsi" |