blob: 67ed90cd389ae37bca0e47a3588c5318ef638091 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -07002/*
3 * Copyright (C) 2014 Freescale Semiconductor
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -07004 */
5
6#include "qbman_private.h"
7#include <fsl-mc/fsl_qbman_portal.h>
8#include <fsl-mc/fsl_dpaa_fd.h>
9
10/* All QBMan command and result structures use this "valid bit" encoding */
11#define QB_VALID_BIT ((uint32_t)0x80)
12
13/* Management command result codes */
14#define QBMAN_MC_RSLT_OK 0xf0
15
Priyanka Jain9de71602016-12-07 12:04:05 +053016#define QBMAN_VER_4_0_DQRR_SIZE 4
17#define QBMAN_VER_4_1_DQRR_SIZE 8
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +053018
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070019/* --------------------- */
20/* portal data structure */
21/* --------------------- */
22
23struct qbman_swp {
24 const struct qbman_swp_desc *desc;
25 /* The qbman_sys (ie. arch/OS-specific) support code can put anything it
26 * needs in here. */
27 struct qbman_swp_sys sys;
28 /* Management commands */
29 struct {
30#ifdef QBMAN_CHECKING
31 enum swp_mc_check {
32 swp_mc_can_start, /* call __qbman_swp_mc_start() */
33 swp_mc_can_submit, /* call __qbman_swp_mc_submit() */
34 swp_mc_can_poll, /* call __qbman_swp_mc_result() */
35 } check;
36#endif
37 uint32_t valid_bit; /* 0x00 or 0x80 */
38 } mc;
39 /* Push dequeues */
40 uint32_t sdq;
41 /* Volatile dequeues */
42 struct {
43 /* VDQCR supports a "1 deep pipeline", meaning that if you know
44 * the last-submitted command is already executing in the
45 * hardware (as evidenced by at least 1 valid dequeue result),
46 * you can write another dequeue command to the register, the
47 * hardware will start executing it as soon as the
48 * already-executing command terminates. (This minimises latency
49 * and stalls.) With that in mind, this "busy" variable refers
50 * to whether or not a command can be submitted, not whether or
51 * not a previously-submitted command is still executing. In
52 * other words, once proof is seen that the previously-submitted
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +053053 * command is executing, "vdq" is no longer "busy".
54 */
55 atomic_t busy;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070056 uint32_t valid_bit; /* 0x00 or 0x80 */
57 /* We need to determine when vdq is no longer busy. This depends
58 * on whether the "busy" (last-submitted) dequeue command is
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +053059 * targeting DQRR or main-memory, and detected is based on the
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070060 * presence of the dequeue command's "token" showing up in
61 * dequeue entries in DQRR or main-memory (respectively). Debug
62 * builds will, when submitting vdq commands, verify that the
63 * dequeue result location is not already equal to the command's
64 * token value. */
65 struct ldpaa_dq *storage; /* NULL if DQRR */
66 uint32_t token;
67 } vdq;
68 /* DQRR */
69 struct {
70 uint32_t next_idx;
71 uint32_t valid_bit;
Priyanka Jain9de71602016-12-07 12:04:05 +053072 uint8_t dqrr_size;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070073 } dqrr;
74};
75
76/* -------------------------- */
77/* portal management commands */
78/* -------------------------- */
79
80/* Different management commands all use this common base layer of code to issue
81 * commands and poll for results. The first function returns a pointer to where
82 * the caller should fill in their MC command (though they should ignore the
83 * verb byte), the second function commits merges in the caller-supplied command
84 * verb (which should not include the valid-bit) and submits the command to
85 * hardware, and the third function checks for a completed response (returns
86 * non-NULL if only if the response is complete). */
87void *qbman_swp_mc_start(struct qbman_swp *p);
88void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb);
89void *qbman_swp_mc_result(struct qbman_swp *p);
90
91/* Wraps up submit + poll-for-result */
92static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
93 uint32_t cmd_verb)
94{
95 int loopvar;
96
97 qbman_swp_mc_submit(swp, cmd, cmd_verb);
98 DBG_POLL_START(loopvar);
99 do {
100 DBG_POLL_CHECK(loopvar);
101 cmd = qbman_swp_mc_result(swp);
102 } while (!cmd);
103 return cmd;
104}
105
106/* ------------ */
107/* qb_attr_code */
108/* ------------ */
109
110/* This struct locates a sub-field within a QBMan portal (CENA) cacheline which
111 * is either serving as a configuration command or a query result. The
112 * representation is inherently little-endian, as the indexing of the words is
113 * itself little-endian in nature and layerscape is little endian for anything
114 * that crosses a word boundary too (64-bit fields are the obvious examples).
115 */
116struct qb_attr_code {
117 unsigned int word; /* which uint32_t[] array member encodes the field */
118 unsigned int lsoffset; /* encoding offset from ls-bit */
119 unsigned int width; /* encoding width. (bool must be 1.) */
120};
121
122/* Macros to define codes */
123#define QB_CODE(a, b, c) { a, b, c}
124
125/* decode a field from a cacheline */
126static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code,
127 const uint32_t *cacheline)
128{
129 return d32_uint32_t(code->lsoffset, code->width, cacheline[code->word]);
130}
131
132/* encode a field to a cacheline */
133static inline void qb_attr_code_encode(const struct qb_attr_code *code,
134 uint32_t *cacheline, uint32_t val)
135{
136 cacheline[code->word] =
137 r32_uint32_t(code->lsoffset, code->width, cacheline[code->word])
138 | e32_uint32_t(code->lsoffset, code->width, val);
139}
140
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530141static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,
142 uint64_t *cacheline, uint64_t val)
143{
144 cacheline[code->word / 2] = val;
145}
146
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700147/* ---------------------- */
148/* Descriptors/cachelines */
149/* ---------------------- */
150
151/* To avoid needless dynamic allocation, the driver API often gives the caller
152 * a "descriptor" type that the caller can instantiate however they like.
153 * Ultimately though, it is just a cacheline of binary storage (or something
154 * smaller when it is known that the descriptor doesn't need all 64 bytes) for
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530155 * holding pre-formatted pieces of hardware commands. The performance-critical
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700156 * code can then copy these descriptors directly into hardware command
157 * registers more efficiently than trying to construct/format commands
158 * on-the-fly. The API user sees the descriptor as an array of 32-bit words in
159 * order for the compiler to know its size, but the internal details are not
160 * exposed. The following macro is used within the driver for converting *any*
161 * descriptor pointer to a usable array pointer. The use of a macro (instead of
162 * an inline) is necessary to work with different descriptor types and to work
163 * correctly with const and non-const inputs (and similarly-qualified outputs).
164 */
165#define qb_cl(d) (&(d)->dont_manipulate_directly[0])