blob: c8e064347adad0956b7b66ab396c210583bca501 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Tim Harveydcf40662014-06-02 16:13:18 -07002/*
3 * Copyright (C) 2014 Gateworks Corporation
Ye Licf639232020-05-04 22:08:55 +08004 * Copyright 2019 NXP
Tim Harveydcf40662014-06-02 16:13:18 -07005 * Author: Tim Harvey <tharvey@gateworks.com>
Tim Harveydcf40662014-06-02 16:13:18 -07006 */
Simon Glass0f2af882020-05-10 11:40:05 -06007#include <log.h>
Tim Harveydcf40662014-06-02 16:13:18 -07008#include <nand.h>
9#include <malloc.h>
Shyam Sainif63ef492019-06-14 13:05:33 +053010#include <mxs_nand.h>
Simon Glass274e0b02020-05-10 11:39:56 -060011#include <asm/cache.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060012#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060013#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070014#include <linux/err.h>
Tom Rini3bde7e22021-09-22 14:50:35 -040015#include <linux/mtd/rawnand.h>
Tim Harveydcf40662014-06-02 16:13:18 -070016
Scott Wood2c1b7e12016-05-30 13:57:55 -050017static struct mtd_info *mtd;
Tim Harveydcf40662014-06-02 16:13:18 -070018static struct nand_chip nand_chip;
19
20static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
21 int column, int page_addr)
22{
Scott Wood17fed142016-05-30 13:57:56 -050023 register struct nand_chip *chip = mtd_to_nand(mtd);
Tim Harveydcf40662014-06-02 16:13:18 -070024 u32 timeo, time_start;
25
26 /* write out the command to the device */
27 chip->cmd_ctrl(mtd, command, NAND_CLE);
28
29 /* Serially input address */
30 if (column != -1) {
Andrea Sciand2f7d072022-06-21 22:05:10 +020031 /* Adjust columns for 16 bit buswidth */
32 if (chip->options & NAND_BUSWIDTH_16 &&
33 !nand_opcode_8bits(command))
34 column >>= 1;
Tim Harveydcf40662014-06-02 16:13:18 -070035 chip->cmd_ctrl(mtd, column, NAND_ALE);
Andrea Sciand2f7d072022-06-21 22:05:10 +020036
37 /*
38 * Assume LP NAND here, so use two bytes column address
39 * but not for CMD_READID and CMD_PARAM, which require
40 * only one byte column address
41 */
42 if (command != NAND_CMD_READID &&
43 command != NAND_CMD_PARAM)
44 chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
Tim Harveydcf40662014-06-02 16:13:18 -070045 }
46 if (page_addr != -1) {
47 chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
48 chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE);
49 /* One more address cycle for devices > 128MiB */
50 if (chip->chipsize > (128 << 20))
51 chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE);
52 }
53 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
54
55 if (command == NAND_CMD_READ0) {
56 chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE);
57 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
Ye Licf639232020-05-04 22:08:55 +080058 } else if (command == NAND_CMD_RNDOUT) {
59 /* No ready / busy check necessary */
60 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
61 NAND_NCE | NAND_CLE);
62 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
63 NAND_NCE);
Tim Harveydcf40662014-06-02 16:13:18 -070064 }
65
66 /* wait for nand ready */
67 ndelay(100);
68 timeo = (CONFIG_SYS_HZ * 20) / 1000;
69 time_start = get_timer(0);
70 while (get_timer(time_start) < timeo) {
71 if (chip->dev_ready(mtd))
72 break;
73 }
74}
75
Jörg Krause7440e4b2018-01-14 19:26:40 +010076#if defined (CONFIG_SPL_NAND_IDENT)
77
78/* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */
79static int mxs_flash_full_ident(struct mtd_info *mtd)
80{
81 int nand_maf_id, nand_dev_id;
82 struct nand_chip *chip = mtd_to_nand(mtd);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +020083 int ret;
Jörg Krause7440e4b2018-01-14 19:26:40 +010084
Michael Trimarchif20a6f02022-07-25 10:18:51 +020085 ret = nand_detect(chip, &nand_maf_id, &nand_dev_id, NULL);
Jörg Krause7440e4b2018-01-14 19:26:40 +010086
Michael Trimarchi4d4862d92022-07-25 10:06:06 +020087 if (ret) {
Jörg Krause7440e4b2018-01-14 19:26:40 +010088 chip->select_chip(mtd, -1);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +020089 return ret;
Jörg Krause7440e4b2018-01-14 19:26:40 +010090 }
91
92 return 0;
93}
94
95#else
96
97/* Trying to detect the NAND flash using ONFi only */
Jörg Krause404a9db2018-01-14 19:26:39 +010098static int mxs_flash_onfi_ident(struct mtd_info *mtd)
Tim Harveydcf40662014-06-02 16:13:18 -070099{
Scott Wood17fed142016-05-30 13:57:56 -0500100 register struct nand_chip *chip = mtd_to_nand(mtd);
Tim Harveydcf40662014-06-02 16:13:18 -0700101 int i;
102 u8 mfg_id, dev_id;
103 u8 id_data[8];
104 struct nand_onfi_params *p = &chip->onfi_params;
105
106 /* Reset the chip */
107 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
108
109 /* Send the command for reading device ID */
110 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
111
112 /* Read manufacturer and device IDs */
113 mfg_id = chip->read_byte(mtd);
114 dev_id = chip->read_byte(mtd);
115
116 /* Try again to make sure */
117 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
118 for (i = 0; i < 8; i++)
119 id_data[i] = chip->read_byte(mtd);
120 if (id_data[0] != mfg_id || id_data[1] != dev_id) {
121 printf("second ID read did not match");
122 return -1;
123 }
124 debug("0x%02x:0x%02x ", mfg_id, dev_id);
125
126 /* read ONFI */
127 chip->onfi_version = 0;
128 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
129 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
130 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') {
131 return -2;
132 }
133
134 /* we have ONFI, probe it */
135 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
136 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
137 mtd->name = p->model;
138 mtd->writesize = le32_to_cpu(p->byte_per_page);
139 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
140 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
141 chip->chipsize = le32_to_cpu(p->blocks_per_lun);
142 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
143 /* Calculate the address shift from the page size */
144 chip->page_shift = ffs(mtd->writesize) - 1;
145 chip->phys_erase_shift = ffs(mtd->erasesize) - 1;
146 /* Convert chipsize to number of pages per chip -1 */
147 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
148 chip->badblockbits = 8;
149
150 debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift);
151 debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift);
152 debug("oobsize=%d\n", mtd->oobsize);
153 debug("chipsize=%lld\n", chip->chipsize);
154
155 return 0;
156}
157
Jörg Krause7440e4b2018-01-14 19:26:40 +0100158#endif /* CONFIG_SPL_NAND_IDENT */
159
Jörg Krause404a9db2018-01-14 19:26:39 +0100160static int mxs_flash_ident(struct mtd_info *mtd)
161{
162 int ret;
Jörg Krause7440e4b2018-01-14 19:26:40 +0100163#if defined (CONFIG_SPL_NAND_IDENT)
164 ret = mxs_flash_full_ident(mtd);
165#else
Jörg Krause404a9db2018-01-14 19:26:39 +0100166 ret = mxs_flash_onfi_ident(mtd);
Jörg Krause7440e4b2018-01-14 19:26:40 +0100167#endif
Jörg Krause404a9db2018-01-14 19:26:39 +0100168 return ret;
169}
170
Tim Harveydcf40662014-06-02 16:13:18 -0700171static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page)
172{
Scott Wood17fed142016-05-30 13:57:56 -0500173 register struct nand_chip *chip = mtd_to_nand(mtd);
Tim Harveydcf40662014-06-02 16:13:18 -0700174 int ret;
175
176 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page);
177 ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page);
178 if (ret < 0) {
179 printf("read_page failed %d\n", ret);
180 return -1;
181 }
182 return 0;
183}
184
185static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)
186{
Scott Wood17fed142016-05-30 13:57:56 -0500187 register struct nand_chip *chip = mtd_to_nand(mtd);
Tim Harveydcf40662014-06-02 16:13:18 -0700188 unsigned int block = offs >> chip->phys_erase_shift;
189 unsigned int page = offs >> chip->page_shift;
190
191 debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block,
192 page);
193 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
194 memset(chip->oob_poi, 0, mtd->oobsize);
195 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
196
197 return chip->oob_poi[0] != 0xff;
198}
199
200/* setup mtd and nand structs and init mxs_nand driver */
Adam Ford858dd272019-02-18 17:58:17 -0600201void nand_init(void)
Tim Harveydcf40662014-06-02 16:13:18 -0700202{
203 /* return if already initalized */
204 if (nand_chip.numchips)
Adam Ford858dd272019-02-18 17:58:17 -0600205 return;
Tim Harveydcf40662014-06-02 16:13:18 -0700206
207 /* init mxs nand driver */
Stefan Agner7152f342018-06-22 17:19:46 +0200208 mxs_nand_init_spl(&nand_chip);
Boris Brezillon3b5f8842016-06-15 20:56:10 +0200209 mtd = nand_to_mtd(&nand_chip);
Tim Harveydcf40662014-06-02 16:13:18 -0700210 /* set mtd functions */
211 nand_chip.cmdfunc = mxs_nand_command;
Adam Fordcf873712018-12-30 10:11:16 -0600212 nand_chip.scan_bbt = nand_default_bbt;
Tim Harveydcf40662014-06-02 16:13:18 -0700213 nand_chip.numchips = 1;
214
215 /* identify flash device */
Scott Wood2c1b7e12016-05-30 13:57:55 -0500216 if (mxs_flash_ident(mtd)) {
Tim Harveydcf40662014-06-02 16:13:18 -0700217 printf("Failed to identify\n");
Adam Ford858dd272019-02-18 17:58:17 -0600218 nand_chip.numchips = 0; /* If fail, don't use nand */
219 return;
Tim Harveydcf40662014-06-02 16:13:18 -0700220 }
221
222 /* allocate and initialize buffers */
223 nand_chip.buffers = memalign(ARCH_DMA_MINALIGN,
224 sizeof(*nand_chip.buffers));
Scott Wood2c1b7e12016-05-30 13:57:55 -0500225 nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize;
Tim Harveydcf40662014-06-02 16:13:18 -0700226 /* setup flash layout (does not scan as we override that) */
Scott Wood2c1b7e12016-05-30 13:57:55 -0500227 mtd->size = nand_chip.chipsize;
228 nand_chip.scan_bbt(mtd);
Adam Ford10210732019-01-02 20:36:52 -0600229 mxs_nand_setup_ecc(mtd);
Tim Harveydcf40662014-06-02 16:13:18 -0700230}
231
Michael Trimarchi95f42382022-05-15 11:35:31 +0200232int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
Tim Harveydcf40662014-06-02 16:13:18 -0700233{
Michael Trimarchi95f42382022-05-15 11:35:31 +0200234 unsigned int sz;
235 unsigned int block, lastblock;
236 unsigned int page, page_offset;
Tim Harveydcf40662014-06-02 16:13:18 -0700237 unsigned int nand_page_per_block;
Michael Trimarchi95f42382022-05-15 11:35:31 +0200238 struct nand_chip *chip;
Ye Licf639232020-05-04 22:08:55 +0800239 u8 *page_buf = NULL;
Tim Harveydcf40662014-06-02 16:13:18 -0700240
Scott Wood17fed142016-05-30 13:57:56 -0500241 chip = mtd_to_nand(mtd);
Adam Ford858dd272019-02-18 17:58:17 -0600242 if (!chip->numchips)
243 return -ENODEV;
Ye Licf639232020-05-04 22:08:55 +0800244
245 page_buf = malloc(mtd->writesize);
246 if (!page_buf)
247 return -ENOMEM;
248
Michael Trimarchi95f42382022-05-15 11:35:31 +0200249 /* offs has to be aligned to a page address! */
250 block = offs / mtd->erasesize;
251 lastblock = (offs + size - 1) / mtd->erasesize;
252 page = (offs % mtd->erasesize) / mtd->writesize;
253 page_offset = offs % mtd->writesize;
Scott Wood2c1b7e12016-05-30 13:57:55 -0500254 nand_page_per_block = mtd->erasesize / mtd->writesize;
Tim Harveydcf40662014-06-02 16:13:18 -0700255
Michael Trimarchi95f42382022-05-15 11:35:31 +0200256 while (block <= lastblock && size > 0) {
257 if (!is_badblock(mtd, mtd->erasesize * block, 1)) {
258 /* Skip bad blocks */
Dario Binacchid0a0dd22022-11-20 10:57:04 +0100259 while (page < nand_page_per_block && size) {
Michael Trimarchi95f42382022-05-15 11:35:31 +0200260 int curr_page = nand_page_per_block * block + page;
Ye Licf639232020-05-04 22:08:55 +0800261
Michael Trimarchi95f42382022-05-15 11:35:31 +0200262 if (mxs_read_page_ecc(mtd, page_buf, curr_page) < 0) {
Ye Licf639232020-05-04 22:08:55 +0800263 free(page_buf);
Michael Trimarchi95f42382022-05-15 11:35:31 +0200264 return -EIO;
Ye Licf639232020-05-04 22:08:55 +0800265 }
Michael Trimarchi95f42382022-05-15 11:35:31 +0200266
267 if (size > (mtd->writesize - page_offset))
268 sz = (mtd->writesize - page_offset);
269 else
270 sz = size;
271
272 memcpy(dst, page_buf + page_offset, sz);
273 dst += sz;
274 size -= sz;
275 page_offset = 0;
276 page++;
Tim Harveydcf40662014-06-02 16:13:18 -0700277 }
Michael Trimarchi95f42382022-05-15 11:35:31 +0200278
279 page = 0;
280 } else {
281 lastblock++;
Tim Harveydcf40662014-06-02 16:13:18 -0700282 }
Michael Trimarchi95f42382022-05-15 11:35:31 +0200283
284 block++;
Tim Harveydcf40662014-06-02 16:13:18 -0700285 }
286
Ye Licf639232020-05-04 22:08:55 +0800287 free(page_buf);
288
Tim Harveydcf40662014-06-02 16:13:18 -0700289 return 0;
290}
291
292int nand_default_bbt(struct mtd_info *mtd)
293{
294 return 0;
295}
296
Sean Anderson8805f9d2023-11-04 16:37:44 -0400297unsigned int nand_page_size(void)
298{
299 return nand_to_mtd(&nand_chip)->writesize;
300}
301
Tim Harveydcf40662014-06-02 16:13:18 -0700302void nand_deselect(void)
303{
304}
Ye Li9caf9512021-08-17 17:24:47 +0800305
306u32 nand_spl_adjust_offset(u32 sector, u32 offs)
307{
Michael Trimarchi95f42382022-05-15 11:35:31 +0200308 unsigned int block, lastblock;
309
310 block = sector / mtd->erasesize;
311 lastblock = (sector + offs) / mtd->erasesize;
312
313 while (block <= lastblock) {
314 if (is_badblock(mtd, block * mtd->erasesize, 1)) {
315 offs += mtd->erasesize;
316 lastblock++;
317 }
318
319 block++;
320 }
321
Ye Li9caf9512021-08-17 17:24:47 +0800322 return offs;
323}