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git01.mediatek.com / filogic / uboot / d611708e8041f9d8e24b6322d0206aad08a0f5e3 / . / configs / mvebu_db-88f3720_defconfig
blob: f6bc97f5ab8df68e6b0a8e860171a5d068abcf1d [file] [log] [blame]
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]3CONFIG_ARCH_MVEBU=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x00000000
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0x2000
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]6CONFIG_TARGET_MVEBU_ARMADA_37XX=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]8CONFIG_DEBUG_UART_BASE=0xd0012000
9CONFIG_DEBUG_UART_CLOCK=25804800
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]10CONFIG_DEBUG_UART=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]11CONFIG_AHCI=y
Tom Rini6c3798f2018-02-10 20:27:45 -0500[diff] [blame]12CONFIG_DISTRO_DEFAULTS=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]13# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]14CONFIG_USE_PREBOOT=y
Simon Glassbd5618d2016-10-17 20:13:00 -0600[diff] [blame]15CONFIG_SYS_CONSOLE_INFO_QUIET=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]16# CONFIG_DISPLAY_CPUINFO is not set
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]17# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]18CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Glass62adede2017-01-23 13:31:19 -0700[diff] [blame]19CONFIG_ARCH_EARLY_INIT_R=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]20CONFIG_BOARD_EARLY_INIT_F=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]21# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]22CONFIG_CMD_GPIO=y
23CONFIG_CMD_I2C=y
Stefan Roeseb27d35e2016-12-09 15:13:35 +0100[diff] [blame]24CONFIG_CMD_MMC=y
Ken Ma71c37bc2018-03-26 15:57:32 +0800[diff] [blame]25CONFIG_CMD_PCI=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]26CONFIG_CMD_SF=y
27CONFIG_CMD_SPI=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]28CONFIG_CMD_USB=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]29# CONFIG_CMD_SETEXPR is not set
30CONFIG_CMD_TFTPPUT=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]31CONFIG_CMD_CACHE=y
32CONFIG_CMD_TIME=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]33CONFIG_CMD_MVEBU_BUBT=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]34CONFIG_CMD_EXT4_WRITE=y
Patrick Delaunayc4bbbec2017-01-27 11:00:36 +0100[diff] [blame]35CONFIG_MAC_PARTITION=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]36CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]37CONFIG_ENV_IS_IN_SPI_FLASH=y
Ken Ma1eeac422018-05-25 15:49:27 +0800[diff] [blame]38CONFIG_AHCI_MVEBU=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]39CONFIG_CLK=y
40CONFIG_CLK_MVEBU=y
Stefan Roese0b57ab12017-05-17 17:05:38 +0200[diff] [blame]41CONFIG_DM_GPIO=y
42# CONFIG_MVEBU_GPIO is not set
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]43CONFIG_DM_I2C=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]44CONFIG_MISC=y
Stefan Roeseb27d35e2016-12-09 15:13:35 +0100[diff] [blame]45CONFIG_DM_MMC=y
46CONFIG_MMC_SDHCI=y
47CONFIG_MMC_SDHCI_SDMA=y
48CONFIG_MMC_SDHCI_XENON=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]49CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]50CONFIG_SF_DEFAULT_MODE=0
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]51CONFIG_SPI_FLASH_MACRONIX=y
52CONFIG_SPI_FLASH_SPANSION=y
53CONFIG_SPI_FLASH_STMICRO=y
54CONFIG_PHYLIB=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]55CONFIG_PHY_MARVELL=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]56CONFIG_PHY_GIGE=y
Ken Ma71c37bc2018-03-26 15:57:32 +0800[diff] [blame]57CONFIG_E1000=y
Wilson Ding945f6062018-03-26 15:57:30 +0800[diff] [blame]58CONFIG_PCI=y
59CONFIG_DM_PCI=y
60CONFIG_PCI_AARDVARK=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]61CONFIG_MVEBU_COMPHY_SUPPORT=y
Stefan Roese0b57ab12017-05-17 17:05:38 +0200[diff] [blame]62CONFIG_PINCTRL=y
63CONFIG_PINCTRL_ARMADA_37XX=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]64CONFIG_DEBUG_MVEBU_A3700_UART=y
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]65CONFIG_DEBUG_UART_SHIFT=2
66CONFIG_DEBUG_UART_ANNOUNCE=y
67CONFIG_MVEBU_A3700_UART=y
68CONFIG_MVEBU_A3700_SPI=y
69CONFIG_USB=y
70CONFIG_DM_USB=y
71CONFIG_USB_XHCI_HCD=y
72CONFIG_USB_EHCI_HCD=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]73CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]74CONFIG_USB_ETHER_ASIX=y
75CONFIG_USB_ETHER_MCS7830=y
76CONFIG_USB_ETHER_RTL8152=y
77CONFIG_USB_ETHER_SMSC95XX=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]78CONFIG_SHA1=y
79CONFIG_SHA256=y