| Andre Przywara | 47b3cab | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SUNXI=y | ||||
| Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 3 | CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" |
| Tom Rini | 9bd0962 | 2018-04-07 20:27:54 -0400 | [diff] [blame] | 4 | CONFIG_SPL=y |
| Andre Przywara | 47b3cab | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 5 | CONFIG_MACH_SUN50I_H5=y |
| Andre Przywara | 47b3cab | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 6 | CONFIG_DRAM_CLK=672 |
| 7 | CONFIG_DRAM_ZQ=3881977 | ||||
| Icenowy Zheng | 1516a6e | 2017-07-04 18:43:11 +0800 | [diff] [blame] | 8 | CONFIG_MACPWR="PD6" |
| Tom Rini | 9bd0962 | 2018-04-07 20:27:54 -0400 | [diff] [blame] | 9 | CONFIG_SPL_SPI_SUNXI=y |
| Tom Rini | 8461027 | 2020-07-28 08:46:52 -0400 | [diff] [blame] | 10 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| Simon Glass | bccfc2e | 2021-07-10 21:14:36 -0600 | [diff] [blame] | 11 | CONFIG_SPL_I2C=y |
| Tom Rini | 52b2e26 | 2021-08-18 23:12:24 -0400 | [diff] [blame] | 12 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| Tom Rini | 8825ec4 | 2021-08-17 17:59:47 -0400 | [diff] [blame] | 13 | CONFIG_SYS_I2C_MVTWSI=y |
| Andre Przywara | 87afc08 | 2022-01-11 12:46:06 +0000 | [diff] [blame] | 14 | CONFIG_SPI_FLASH_MACRONIX=y |
| Andre Przywara | 47b3cab | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 15 | CONFIG_SUN8I_EMAC=y |
| Jernej Skrabec | 2c2c2e6 | 2021-06-07 19:42:45 +0200 | [diff] [blame] | 16 | CONFIG_SY8106A_POWER=y |
| 17 | CONFIG_SY8106A_VOUT1_VOLT=1100 | ||||
| Andre Przywara | 87afc08 | 2022-01-11 12:46:06 +0000 | [diff] [blame] | 18 | CONFIG_SPI=y |
| Andre Przywara | 47b3cab | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 19 | CONFIG_USB_EHCI_HCD=y |
| Tom Rini | 7fc96ef | 2019-02-07 14:53:03 -0500 | [diff] [blame] | 20 | CONFIG_USB_OHCI_HCD=y |
| Jagan Teki | 3ab57ec | 2018-05-07 13:03:49 +0530 | [diff] [blame] | 21 | CONFIG_USB_MUSB_GADGET=y |