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git01.mediatek.com / filogic / uboot / d5ea994bffe9efeb180741364851ae618388114b / . / configs / am65x_evm_r5_defconfig
blob: 57f3300380f17ebe8d8d7a1b6f6c09f553b0a0d7 [file] [log] [blame]
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_K3=y
3CONFIG_SPL_GPIO_SUPPORT=y
4CONFIG_SPL_LIBCOMMON_SUPPORT=y
5CONFIG_SPL_LIBGENERIC_SUPPORT=y
Andreas Dannenbergf595cac2019-06-04 17:55:51 -0500[diff] [blame]6CONFIG_SYS_MALLOC_F_LEN=0x55000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=2
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]8CONFIG_SOC_K3_AM6=y
Andreas Dannenberg1a9dbdc2019-08-15 15:55:31 -0500[diff] [blame]9CONFIG_K3_EARLY_CONS=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]10CONFIG_TARGET_AM654_R5_EVM=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]11CONFIG_ENV_SIZE=0x20000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]12CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]13CONFIG_DM_GPIO=y
Tom Rini6c75e632020-06-16 19:06:29 -0400[diff] [blame]14CONFIG_SPL_DM_SPI=y
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]15CONFIG_SPL_TEXT_BASE=0x41c00000
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]16CONFIG_SPL_MMC_SUPPORT=y
17CONFIG_SPL_SERIAL_SUPPORT=y
18CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
19CONFIG_SPL_STACK_R_ADDR=0x82000000
Lokesh Vutla7ecde562021-03-09 23:32:45 +0530[diff] [blame]20CONFIG_SPL_SIZE_LIMIT=0x7ec00
21CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000
Tien Fong Chee6fd0a712019-01-23 14:20:03 +0800[diff] [blame]22CONFIG_SPL_FS_FAT=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]23CONFIG_SPL_LIBDISK_SUPPORT=y
Vignesh Raghavendra0242ba22020-02-04 11:09:56 +0530[diff] [blame]24CONFIG_SPL_SPI_FLASH_SUPPORT=y
25CONFIG_SPL_SPI_SUPPORT=y
Tom Rini90fa4e92020-07-06 15:46:38 -0400[diff] [blame]26CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]27# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
28CONFIG_SPL_LOAD_FIT=y
Simon Glass5d144112020-07-19 13:56:10 -0600[diff] [blame]29# CONFIG_USE_SPL_FIT_GENERATOR is not set
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]30CONFIG_USE_BOOTCOMMAND=y
31# CONFIG_DISPLAY_CPUINFO is not set
Lokesh Vutla7ecde562021-03-09 23:32:45 +0530[diff] [blame]32CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
33CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
34CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]35CONFIG_SPL_STACK_R=y
36CONFIG_SPL_SEPARATE_BSS=y
Andreas Dannenbergf595cac2019-06-04 17:55:51 -0500[diff] [blame]37CONFIG_SPL_EARLY_BSS=y
Faiz Abbasc7f33212019-06-04 17:55:53 -0500[diff] [blame]38CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
39CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
Vignesh Raghavendra0242ba22020-02-04 11:09:56 +0530[diff] [blame]40CONFIG_SPL_DMA=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]41CONFIG_SPL_I2C_SUPPORT=y
42CONFIG_SPL_DM_MAILBOX=y
Lukasz Majewski76f442982020-06-04 23:11:53 +0800[diff] [blame]43CONFIG_SPL_DM_SPI_FLASH=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]44CONFIG_SPL_DM_RESET=y
45CONFIG_SPL_POWER_SUPPORT=y
46CONFIG_SPL_POWER_DOMAIN=y
47CONFIG_SPL_RAM_SUPPORT=y
48CONFIG_SPL_RAM_DEVICE=y
49CONFIG_SPL_REMOTEPROC=y
Vignesh Raghavendra0242ba22020-02-04 11:09:56 +0530[diff] [blame]50# CONFIG_SPL_SPI_FLASH_TINY is not set
51CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
52CONFIG_SPL_SPI_LOAD=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]53CONFIG_SPL_YMODEM_SUPPORT=y
54CONFIG_HUSH_PARSER=y
55CONFIG_CMD_BOOTZ=y
56CONFIG_CMD_ASKENV=y
Andrew F. Davis43ff9522019-02-01 15:04:56 -0600[diff] [blame]57CONFIG_CMD_GPT=y
Andreas Dannenbergcc2b3112019-06-04 18:08:16 -0500[diff] [blame]58CONFIG_CMD_I2C=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]59CONFIG_CMD_MMC=y
60CONFIG_CMD_REMOTEPROC=y
61# CONFIG_CMD_SETEXPR is not set
62CONFIG_CMD_TIME=y
63CONFIG_CMD_FAT=y
64CONFIG_OF_CONTROL=y
65CONFIG_SPL_OF_CONTROL=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]66CONFIG_SPL_MULTI_DTB_FIT=y
67CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]68CONFIG_ENV_OVERWRITE=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]69CONFIG_ENV_IS_IN_FAT=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]70CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]71CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]72CONFIG_DM=y
73CONFIG_SPL_DM=y
74CONFIG_SPL_DM_SEQ_ALIAS=y
Faiz Abbas8c10b822019-06-11 00:43:39 +0530[diff] [blame]75CONFIG_REGMAP=y
76CONFIG_SPL_REGMAP=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]77CONFIG_SPL_OF_TRANSLATE=y
78CONFIG_CLK=y
79CONFIG_SPL_CLK=y
80CONFIG_CLK_TI_SCI=y
Vignesh Raghavendra0242ba22020-02-04 11:09:56 +0530[diff] [blame]81CONFIG_DMA_CHANNELS=y
82CONFIG_TI_K3_NAVSS_UDMA=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]83CONFIG_TI_SCI_PROTOCOL=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]84CONFIG_DA8XX_GPIO=y
Andreas Dannenbergcc2b3112019-06-04 18:08:16 -0500[diff] [blame]85CONFIG_DM_I2C=y
86CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
87CONFIG_SYS_I2C_OMAP24XX=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]88CONFIG_DM_MAILBOX=y
89CONFIG_K3_SEC_PROXY=y
Tom Rinifdc7e362019-11-11 20:04:24 -0500[diff] [blame]90CONFIG_K3_AVS0=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]91CONFIG_DM_MMC=y
Faiz Abbas259412b2020-02-26 13:44:38 +0530[diff] [blame]92CONFIG_SUPPORT_EMMC_BOOT=y
Faiz Abbasa5848012021-02-04 15:11:05 +0530[diff] [blame]93CONFIG_MMC_HS200_SUPPORT=y
94CONFIG_SPL_MMC_HS200_SUPPORT=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]95CONFIG_MMC_SDHCI=y
Faiz Abbas20e675b2019-11-19 14:06:41 +0530[diff] [blame]96CONFIG_SPL_MMC_SDHCI_ADMA=y
Faiz Abbasd8fb3092019-06-11 00:43:31 +0530[diff] [blame]97CONFIG_MMC_SDHCI_AM654=y
Vignesh Raghavendra0242ba22020-02-04 11:09:56 +0530[diff] [blame]98CONFIG_DM_SPI_FLASH=y
99CONFIG_SPI_FLASH_SFDP_SUPPORT=y
100CONFIG_SPI_FLASH_STMICRO=y
101# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]102CONFIG_PINCTRL=y
103# CONFIG_PINCTRL_GENERIC is not set
104CONFIG_SPL_PINCTRL=y
105# CONFIG_SPL_PINCTRL_GENERIC is not set
106CONFIG_PINCTRL_SINGLE=y
107CONFIG_POWER_DOMAIN=y
108CONFIG_TI_SCI_POWER_DOMAIN=y
109CONFIG_DM_REGULATOR=y
110CONFIG_SPL_DM_REGULATOR=y
111CONFIG_DM_REGULATOR_GPIO=y
112CONFIG_SPL_DM_REGULATOR_GPIO=y
Tero Kristo5acf5012019-10-24 15:01:01 +0530[diff] [blame]113CONFIG_DM_REGULATOR_TPS62360=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]114CONFIG_RAM=y
115CONFIG_SPL_RAM=y
116CONFIG_K3_SYSTEM_CONTROLLER=y
Lokesh Vutla247418b2019-06-07 19:25:59 +0530[diff] [blame]117CONFIG_REMOTEPROC_TI_K3_ARM64=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]118CONFIG_DM_RESET=y
119CONFIG_RESET_TI_SCI=y
120CONFIG_DM_SERIAL=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]121CONFIG_SOC_DEVICE=y
122CONFIG_SOC_DEVICE_TI_K3=y
Vignesh Raghavendra0242ba22020-02-04 11:09:56 +0530[diff] [blame]123CONFIG_SOC_TI=y
124CONFIG_SPI=y
125CONFIG_DM_SPI=y
126CONFIG_CADENCE_QSPI=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]127CONFIG_SYSRESET=y
Kever Yang525ea472019-04-02 20:41:25 +0800[diff] [blame]128CONFIG_SPL_SYSRESET=y
Lokesh Vutlade5de2a2018-11-02 19:51:10 +0530[diff] [blame]129CONFIG_SYSRESET_TI_SCI=y
130CONFIG_TIMER=y
131CONFIG_SPL_TIMER=y
132CONFIG_OMAP_TIMER=y
Andreas Dannenbergf595cac2019-06-04 17:55:51 -0500[diff] [blame]133CONFIG_FS_FAT_MAX_CLUSTSIZE=16384