Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 1 | Introduction |
| 2 | ============ |
| 3 | |
| 4 | HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has: - |
| 5 | * HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz. |
| 6 | * ARM Mali 450-MP4 GPU |
| 7 | * 1GB 800MHz LPDDR3 DRAM |
| 8 | * 4GB eMMC Flash Storage |
| 9 | * microSD |
| 10 | * 802.11a/b/g/n WiFi, Bluetooth |
| 11 | |
| 12 | The HiKey schematic can be found here: - |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 13 | https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/HiKey_schematics_LeMaker_version_Rev_A1.pdf |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 14 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 15 | The SoC datasheet can be found here: - |
| 16 | https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 17 | |
| 18 | Currently the u-boot port supports: - |
| 19 | * USB |
| 20 | * eMMC |
| 21 | * SD card |
| 22 | * GPIO |
| 23 | |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 24 | The HiKey U-Boot port has been tested with l-loader, booting ATF, which then boots |
| 25 | U-Boot as the bl33.bin executable. |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 26 | |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 27 | Compile from source |
| 28 | =================== |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 29 | |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 30 | First get all the sources |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 31 | |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 32 | > mkdir -p ~/hikey/src ~/hikey/bin |
| 33 | > cd ~/hikey/src |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 34 | > git clone https://github.com/96boards-hikey/edk2 -b testing/hikey960_v2.5 |
| 35 | > git clone https://github.com/ARM-software/arm-trusted-firmware |
| 36 | > git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2 |
| 37 | > git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4 |
| 38 | > git clone https://github.com/96boards-hikey/atf-fastboot |
| 39 | > wget https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/hisi-idt.py |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 40 | |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 41 | Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source. |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 42 | The latest version can be obtained from the OpenPlatformPkg repo. |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 43 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 44 | > cp OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin ~/hikey/bin/ |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 45 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 46 | Get nvme.img binary |
| 47 | > wget -P ~/hikey/bin https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/nvme.img |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 48 | |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 49 | Compile U-Boot |
| 50 | ============== |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 51 | |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 52 | > cd ~/hikey/src/u-boot |
| 53 | > make CROSS_COMPILE=aarch64-linux-gnu- hikey_config |
| 54 | > make CROSS_COMPILE=aarch64-linux-gnu- |
| 55 | > cp u-boot.bin ~/hikey/bin |
| 56 | |
| 57 | Compile ARM Trusted Firmware (ATF) |
| 58 | ================================== |
| 59 | |
Michal Simek | 9067567 | 2017-05-31 11:28:30 +0200 | [diff] [blame] | 60 | > cd ~/hikey/src/arm-trusted-firmware |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 61 | > make CROSS_COMPILE=aarch64-linux-gnu- all fip \ |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 62 | SCP_BL2=~/hikey/bin/mcuimage.bin \ |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 63 | BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 64 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 65 | Copy the resulting FIP binary |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 66 | > cp build/hikey/debug/fip.bin ~/hikey/bin |
| 67 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 68 | Compile ATF Fastboot |
| 69 | ==================== |
| 70 | |
| 71 | > cd ~/hikey/src/atf-fastboot |
| 72 | > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=hikey DEBUG=1 |
| 73 | |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 74 | Compile l-loader |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 75 | ================ |
Michal Simek | 9067567 | 2017-05-31 11:28:30 +0200 | [diff] [blame] | 76 | > cd ~/hikey/src/l-loader |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 77 | > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl1.bin |
| 78 | > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl2.bin |
| 79 | > ln -sf ~/hikey/src/atf-fastboot/build/hikey/debug/bl1.bin fastboot.bin |
| 80 | > make hikey PTABLE_LST=aosp-8g |
| 81 | |
| 82 | Copy the resulting binaries |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 83 | > cp *.img ~/hikey/bin |
Michal Simek | 9067567 | 2017-05-31 11:28:30 +0200 | [diff] [blame] | 84 | > cp l-loader.bin ~/hikey/bin |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 85 | > cp recovery.bin ~/hikey/bin |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 86 | |
| 87 | These instructions are adapted from |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 88 | https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey.rst |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 89 | |
| 90 | FLASHING |
| 91 | ======== |
| 92 | |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 93 | 1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 94 | the hisi-idt.py utility. Then connect a USB A to B mini cable from your PC to the USB OTG port of HiKey and execute the below command. |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 95 | |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 96 | The command below assumes HiKey enumerated as the first USB serial port |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 97 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 98 | > sudo python ~/hikey/src/hisi-idt.py -d /dev/ttyUSB0 --img1 ~/hikey/bin/recovery.bin |
| 99 | |
| 100 | 2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device. |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 101 | |
| 102 | > sudo fastboot devices |
| 103 | |
| 104 | 0123456789ABCDEF fastboot |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 105 | |
| 106 | 3. Flash the images |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 107 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 108 | > sudo fastboot flash ptable ~/hikey/bin/prm_ptable.img |
| 109 | > sudo fastboot flash loader ~/hikey/bin/l-loader.bin |
Peter Griffin | b956d98 | 2016-04-20 17:14:03 +0100 | [diff] [blame] | 110 | > sudo fastboot flash fastboot ~/hikey/bin/fip.bin |
| 111 | > sudo fastboot flash nvme ~/hikey/bin/nvme.img |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 112 | |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 113 | 4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully) |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 114 | have ATF, booting u-boot from eMMC. |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 115 | |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 116 | Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you |
| 117 | will get 'dwc_otg_core_host_init: Timeout!' errors. |
| 118 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 119 | See working boot trace below on UART3 available at Low Speed Expansion header: - |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 120 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 121 | NOTICE: BL2: v1.5(debug):v1.5-694-g6d4f6aea |
| 122 | NOTICE: BL2: Built : 09:21:42, Aug 29 2018 |
| 123 | INFO: BL2: Doing platform setup |
| 124 | INFO: ddr3 rank1 init pass |
| 125 | INFO: succeed to set ddrc 150mhz |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 126 | INFO: ddr3 rank1 init pass |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 127 | INFO: succeed to set ddrc 266mhz |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 128 | INFO: ddr3 rank1 init pass |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 129 | INFO: succeed to set ddrc 400mhz |
| 130 | INFO: ddr3 rank1 init pass |
| 131 | INFO: succeed to set ddrc 533mhz |
| 132 | INFO: ddr3 rank1 init pass |
| 133 | INFO: succeed to set ddrc 800mhz |
| 134 | INFO: Samsung DDR |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 135 | INFO: ddr test value:0xa5a55a5a |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 136 | INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000 |
| 137 | INFO: BL2: TrustZone: protecting 4194304 bytes of memory at 0x3e800000 |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 138 | INFO: [BDID] [fff91c18] midr: 0x410fd033 |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 139 | INFO: init_acpu_dvfs: pmic version 17 |
| 140 | INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00. |
| 141 | INFO: acpu_dvfs_volt_init: success! |
| 142 | INFO: acpu_dvfs_set_freq: support freq num is 5 |
| 143 | INFO: acpu_dvfs_set_freq: start prof is 0x4 |
| 144 | INFO: acpu_dvfs_set_freq: magic is 0x5a5ac5c5 |
| 145 | INFO: acpu_dvfs_set_freq: voltage: |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 146 | INFO: - 0: 0x49 |
| 147 | INFO: - 1: 0x49 |
| 148 | INFO: - 2: 0x50 |
| 149 | INFO: - 3: 0x60 |
| 150 | INFO: - 4: 0x78 |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 151 | NOTICE: acpu_dvfs_set_freq: set acpu freq success!INFO: BL2: Loading image id 2 |
| 152 | INFO: Loading image id=2 at address 0x1000000 |
| 153 | INFO: Image id=2 loaded: 0x1000000 - 0x1023d00 |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 154 | INFO: hisi_mcu_load_image: mcu sections 0: |
| 155 | INFO: hisi_mcu_load_image: src = 0x1000200 |
| 156 | INFO: hisi_mcu_load_image: dst = 0xf6000000 |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 157 | INFO: hisi_mcu_load_image: size = 31184 |
| 158 | INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x8000 0x3701 0x7695 0x7689 |
| 159 | INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689 |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 160 | INFO: hisi_mcu_load_image: mcu sections 1: |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 161 | INFO: hisi_mcu_load_image: src = 0x1007bd0 |
| 162 | INFO: hisi_mcu_load_image: dst = 0x5e00000 |
| 163 | INFO: hisi_mcu_load_image: size = 93828 |
| 164 | INFO: hisi_mcu_load_image: [SRC 0x1007bd0] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57 |
| 165 | INFO: hisi_mcu_load_image: [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57 |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 166 | INFO: hisi_mcu_load_image: mcu sections 2: |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 167 | INFO: hisi_mcu_load_image: src = 0x101ea54 |
| 168 | INFO: hisi_mcu_load_image: dst = 0x5e16e84 |
| 169 | INFO: hisi_mcu_load_image: size = 15428 |
| 170 | INFO: hisi_mcu_load_image: [SRC 0x101ea54] 0x9 0x1020640 0x10001 0x8f0d180 |
| 171 | INFO: hisi_mcu_load_image: [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180 |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 172 | INFO: hisi_mcu_load_image: mcu sections 3: |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 173 | INFO: hisi_mcu_load_image: src = 0x1022698 |
| 174 | INFO: hisi_mcu_load_image: dst = 0x5e22a10 |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 175 | INFO: hisi_mcu_load_image: size = 3060 |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 176 | INFO: hisi_mcu_load_image: [SRC 0x1022698] 0x0 0x0 0x0 0x0 |
| 177 | INFO: hisi_mcu_load_image: [DST 0x5e22a10] 0x0 0x0 0x0 0x0 |
| 178 | INFO: hisi_mcu_load_image: mcu sections 4: |
| 179 | INFO: hisi_mcu_load_image: src = 0x102328c |
| 180 | INFO: hisi_mcu_load_image: dst = 0x5e23604 |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 181 | INFO: hisi_mcu_load_image: size = 2616 |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 182 | INFO: hisi_mcu_load_image: [SRC 0x102328c] 0xf80000a0 0x0 0xf80000ac 0x0 |
| 183 | INFO: hisi_mcu_load_image: [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0 |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 184 | INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0 |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 185 | INFO: plat_hikey_bl2_handle_scp_bl2: MCU PC is at 0x42933301 |
| 186 | INFO: plat_hikey_bl2_handle_scp_bl2: AO_SC_PERIPH_CLKSTAT4 is 0x3b018f09 |
| 187 | WARNING: BL2: Platform setup already done!! |
| 188 | INFO: BL2: Loading image id 3 |
| 189 | INFO: Loading image id=3 at address 0xf9858000 |
| 190 | INFO: Image id=3 loaded: 0xf9858000 - 0xf9860058 |
| 191 | INFO: BL2: Loading image id 5 |
| 192 | INFO: Loading image id=5 at address 0x35000000 |
| 193 | INFO: Image id=5 loaded: 0x35000000 - 0x35061cd2 |
| 194 | NOTICE: BL2: Booting BL31 |
| 195 | INFO: Entry point address = 0xf9858000 |
| 196 | INFO: SPSR = 0x3cd |
| 197 | NOTICE: BL31: v1.5(debug):v1.5-694-g6d4f6aea |
| 198 | NOTICE: BL31: Built : 09:21:44, Aug 29 2018 |
| 199 | WARNING: Using deprecated integer interrupt array in gicv2_driver_data_t |
| 200 | WARNING: Please migrate to using an interrupt_prop_t array |
| 201 | INFO: ARM GICv2 driver initialized |
| 202 | INFO: BL31: Initializing runtime services |
| 203 | INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied |
| 204 | INFO: BL31: cortex_a53: CPU workaround for 843419 was applied |
| 205 | INFO: BL31: cortex_a53: CPU workaround for 855873 was applied |
| 206 | INFO: BL31: Preparing for EL3 exit to normal world |
| 207 | INFO: Entry point address = 0x35000000 |
| 208 | INFO: SPSR = 0x3c9 |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 209 | |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 210 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 211 | U-Boot 2018.09-rc1 (Aug 22 2018 - 14:55:49 +0530)hikey |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 212 | |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 213 | DRAM: 990 MiB |
| 214 | HI6553 PMIC init |
| 215 | MMC: config_sd_carddetect: SD card present |
| 216 | Hisilicon DWMMC: 0, Hisilicon DWMMC: 1 |
| 217 | Loading Environment from FAT... Unable to use mmc 1:1... Failed (-5) |
| 218 | In: uart@f7113000 |
| 219 | Out: uart@f7113000 |
| 220 | Err: uart@f7113000 |
Peter Griffin | 6de280f | 2015-07-30 18:55:24 +0100 | [diff] [blame] | 221 | Net: Net Initialization Skipped |
| 222 | No ethernet found. |
| 223 | Hit any key to stop autoboot: 0 |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 224 | starting USB... |
Manivannan Sadhasivam | 2284641 | 2018-08-29 10:07:36 +0530 | [diff] [blame] | 225 | USB0: scanning bus 0 for devices... 2 USB Device(s) found |
Peter Griffin | 8afec9a | 2015-09-10 21:55:11 +0100 | [diff] [blame] | 226 | scanning usb for storage devices... 0 Storage Device(s) found |
| 227 | scanning usb for ethernet devices... 0 Ethernet Device(s) found |