blob: 6e681d7cb6fbdb86aed942508218af5e4552bd03 [file] [log] [blame]
Hao Zhang8e697a02014-07-09 23:44:46 +03001/*
2 * K2HK EVM : Board initialization
3 *
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#include <common.h>
Vitaly Andrianov047e7802014-07-25 22:23:19 +030011#include <asm/arch/clock.h>
Hao Zhang8e697a02014-07-09 23:44:46 +030012#include <asm/arch/hardware.h>
Khoronzhuk, Ivanf2c13ba2014-09-29 22:17:22 +030013#include <asm/ti-common/keystone_net.h>
Hao Zhang8e697a02014-07-09 23:44:46 +030014
15DECLARE_GLOBAL_DATA_PTR;
16
17unsigned int external_clk[ext_clk_count] = {
18 [sys_clk] = 122880000,
19 [alt_core_clk] = 125000000,
20 [pa_clk] = 122880000,
21 [tetris_clk] = 125000000,
22 [ddr3a_clk] = 100000000,
23 [ddr3b_clk] = 100000000,
Hao Zhang8e697a02014-07-09 23:44:46 +030024};
25
Lokesh Vutla9da9afa2015-07-28 14:16:44 +053026static struct pll_init_data core_pll_config[NUM_SPDS] = {
27 [SPD800] = CORE_PLL_799,
28 [SPD1000] = CORE_PLL_999,
29 [SPD1200] = CORE_PLL_1200,
Vitaly Andrianov047e7802014-07-25 22:23:19 +030030};
31
Lokesh Vutla70438fc2015-07-28 14:16:43 +053032s16 divn_val[16] = {
33 0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
34};
35
Vitaly Andrianov047e7802014-07-25 22:23:19 +030036static struct pll_init_data tetris_pll_config[] = {
Lokesh Vutla9da9afa2015-07-28 14:16:44 +053037 [SPD800] = TETRIS_PLL_800,
38 [SPD1000] = TETRIS_PLL_1000,
39 [SPD1200] = TETRIS_PLL_1200,
40 [SPD1350] = TETRIS_PLL_1350,
41 [SPD1400] = TETRIS_PLL_1400,
Hao Zhang8e697a02014-07-09 23:44:46 +030042};
43
Vitaly Andrianov047e7802014-07-25 22:23:19 +030044static struct pll_init_data pa_pll_config =
45 PASS_PLL_983;
46
Lokesh Vutla79a94a22015-07-28 14:16:46 +053047struct pll_init_data *get_pll_init_data(int pll)
48{
49 int speed;
50 struct pll_init_data *data;
51
52 switch (pll) {
53 case MAIN_PLL:
54 speed = get_max_dev_speed();
55 data = &core_pll_config[speed];
56 break;
57 case TETRIS_PLL:
58 speed = get_max_arm_speed();
59 data = &tetris_pll_config[speed];
60 break;
61 case PASS_PLL:
62 data = &pa_pll_config;
63 break;
64 default:
65 data = NULL;
66 }
67
68 return data;
69}
70
Hao Zhang8e697a02014-07-09 23:44:46 +030071#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
72struct eth_priv_t eth_priv_cfg[] = {
73 {
74 .int_name = "K2HK_EMAC",
75 .rx_flow = 22,
76 .phy_addr = 0,
77 .slave_port = 1,
78 .sgmii_link_type = SGMII_LINK_MAC_PHY,
79 },
80 {
81 .int_name = "K2HK_EMAC1",
82 .rx_flow = 23,
83 .phy_addr = 1,
84 .slave_port = 2,
85 .sgmii_link_type = SGMII_LINK_MAC_PHY,
86 },
87 {
88 .int_name = "K2HK_EMAC2",
89 .rx_flow = 24,
90 .phy_addr = 2,
91 .slave_port = 3,
92 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
93 },
94 {
95 .int_name = "K2HK_EMAC3",
96 .rx_flow = 25,
97 .phy_addr = 3,
98 .slave_port = 4,
99 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
100 },
101};
102
103int get_num_eth_ports(void)
104{
105 return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
106}
107#endif
108
109#ifdef CONFIG_BOARD_EARLY_INIT_F
110int board_early_init_f(void)
111{
Lokesh Vutla79a94a22015-07-28 14:16:46 +0530112 init_plls();
Vitaly Andrianov047e7802014-07-25 22:23:19 +0300113
Hao Zhang8e697a02014-07-09 23:44:46 +0300114 return 0;
115}
116#endif
Hao Zhang95948202014-10-22 16:32:31 +0300117
118#ifdef CONFIG_SPL_BUILD
Hao Zhang95948202014-10-22 16:32:31 +0300119void spl_init_keystone_plls(void)
120{
Lokesh Vutla79a94a22015-07-28 14:16:46 +0530121 init_plls();
Hao Zhang95948202014-10-22 16:32:31 +0300122}
123#endif