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Ye.Lia9454db2014-11-06 16:28:59 +08001/*
2 * Copyright 2014 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
Peng Fan962a4172015-01-27 10:14:03 +08008#include <errno.h>
Ye.Lia9454db2014-11-06 16:28:59 +08009#include <power/pmic.h>
10#include <power/pfuze100_pmic.h>
11
Peng Fan6b919082015-08-07 16:43:46 +080012#ifndef CONFIG_DM_PMIC_PFUZE100
Peng Fan962a4172015-01-27 10:14:03 +080013int pfuze_mode_init(struct pmic *p, u32 mode)
14{
15 unsigned char offset, i, switch_num;
16 u32 id, ret;
17
18 pmic_reg_read(p, PFUZE100_DEVICEID, &id);
19 id = id & 0xf;
20
21 if (id == 0) {
22 switch_num = 6;
23 offset = PFUZE100_SW1CMODE;
24 } else if (id == 1) {
25 switch_num = 4;
26 offset = PFUZE100_SW2MODE;
27 } else {
28 printf("Not supported, id=%d\n", id);
29 return -EINVAL;
30 }
31
32 ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode);
33 if (ret < 0) {
34 printf("Set SW1AB mode error!\n");
35 return ret;
36 }
37
38 for (i = 0; i < switch_num - 1; i++) {
39 ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode);
40 if (ret < 0) {
41 printf("Set switch 0x%x mode error!\n",
42 offset + i * SWITCH_SIZE);
43 return ret;
44 }
45 }
46
47 return ret;
48}
49
Ye.Lia9454db2014-11-06 16:28:59 +080050struct pmic *pfuze_common_init(unsigned char i2cbus)
51{
52 struct pmic *p;
53 int ret;
54 unsigned int reg;
55
56 ret = power_pfuze100_init(i2cbus);
57 if (ret)
58 return NULL;
59
60 p = pmic_get("PFUZE100");
61 ret = pmic_probe(p);
62 if (ret)
63 return NULL;
64
65 pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
66 printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
67
68 /* Set SW1AB stanby volage to 0.975V */
69 pmic_reg_read(p, PFUZE100_SW1ABSTBY, &reg);
70 reg &= ~SW1x_STBY_MASK;
71 reg |= SW1x_0_975V;
72 pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
73
74 /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
Peng Fan5f234e72015-05-18 13:37:26 +080075 pmic_reg_read(p, PFUZE100_SW1ABCONF, &reg);
Ye.Lia9454db2014-11-06 16:28:59 +080076 reg &= ~SW1xCONF_DVSSPEED_MASK;
77 reg |= SW1xCONF_DVSSPEED_4US;
Peng Fan5f234e72015-05-18 13:37:26 +080078 pmic_reg_write(p, PFUZE100_SW1ABCONF, reg);
Ye.Lia9454db2014-11-06 16:28:59 +080079
80 /* Set SW1C standby voltage to 0.975V */
81 pmic_reg_read(p, PFUZE100_SW1CSTBY, &reg);
82 reg &= ~SW1x_STBY_MASK;
83 reg |= SW1x_0_975V;
84 pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
85
86 /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
87 pmic_reg_read(p, PFUZE100_SW1CCONF, &reg);
88 reg &= ~SW1xCONF_DVSSPEED_MASK;
89 reg |= SW1xCONF_DVSSPEED_4US;
90 pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
91
92 return p;
93}
Peng Fan6b919082015-08-07 16:43:46 +080094#endif