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Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +00001/*
2 * Configuation settings for the sh7752evb board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +00007 */
8
9#ifndef __SH7752EVB_H
10#define __SH7752EVB_H
11
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000012#define CONFIG_CPU_SH7752 1
13#define CONFIG_SH7752EVB 1
14
15#define CONFIG_SYS_TEXT_BASE 0x5ff80000
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000016
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000017#define CONFIG_CMD_SDRAM
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000018
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000019#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
20
Vladimir Zapolskiy5e72b842016-11-28 00:15:30 +020021#define CONFIG_DISPLAY_BOARDINFO
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000022#undef CONFIG_SHOW_BOOT_PROGRESS
23#define CONFIG_CMDLINE_EDITING
24#define CONFIG_AUTO_COMPLETE
25
26/* MEMORY */
27#define SH7752EVB_SDRAM_BASE (0x40000000)
28#define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
29
30#define CONFIG_SYS_LONGHELP
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000031#define CONFIG_SYS_CBSIZE 256
32#define CONFIG_SYS_PBSIZE 256
33#define CONFIG_SYS_MAXARGS 16
34#define CONFIG_SYS_BARGSIZE 512
35#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
36
37/* SCIF */
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000038#define CONFIG_CONS_SCIF2 1
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000039
40#define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE)
41#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
42 480 * 1024 * 1024)
43#undef CONFIG_SYS_ALT_MEMTEST
44#undef CONFIG_SYS_MEMTEST_SCRATCH
45#undef CONFIG_SYS_LOADS_BAUD_CHANGE
46
47#define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE)
48#define CONFIG_SYS_SDRAM_SIZE (SH7752EVB_SDRAM_SIZE)
49#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
50 128 * 1024 * 1024)
51
52#define CONFIG_SYS_MONITOR_BASE 0x00000000
53#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
54#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
55#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
56
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000057/* Ether */
58#define CONFIG_SH_ETHER 1
59#define CONFIG_SH_ETHER_USE_PORT 0
60#define CONFIG_SH_ETHER_PHY_ADDR 18
61#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
62#define CONFIG_SH_ETHER_USE_GETHER 1
63#define CONFIG_PHYLIB
64#define CONFIG_BITBANGMII
65#define CONFIG_BITBANGMII_MULTI
66#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
67#define CONFIG_PHY_VITESSE
68
69#define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000
70#define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024)
71#define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI
72#define SH7752EVB_ETHERNET_MAC_SIZE 17
73#define SH7752EVB_ETHERNET_NUM_CH 2
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000074
75/* SPI */
76#define CONFIG_SH_SPI 1
77#define CONFIG_SH_SPI_BASE 0xfe002000
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000078
79/* MMCIF */
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000080#define CONFIG_SH_MMCIF 1
81#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
82#define CONFIG_SH_MMCIF_CLK 48000000
83
84/* ENV setting */
85#define CONFIG_ENV_IS_EMBEDDED
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000086#define CONFIG_ENV_SECT_SIZE (64 * 1024)
87#define CONFIG_ENV_ADDR (0x00080000)
88#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
89#define CONFIG_ENV_OVERWRITE 1
90#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
91#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
92#define CONFIG_EXTRA_ENV_SETTINGS \
93 "netboot=bootp; bootm\0"
94
95/* Board Clock */
96#define CONFIG_SYS_CLK_FREQ 48000000
Nobuhiro Iwamatsue6984492013-08-21 16:11:21 +090097#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
98#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000099#define CONFIG_SYS_TMU_CLK_DIV 4
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +0000100#endif /* __SH7752EVB_H */