| Lokesh Vutla | 9bdec00 | 2018-08-27 15:57:08 +0530 | [diff] [blame] | 1 | if ARCH_K3 |
| 2 | |
| 3 | choice |
| 4 | prompt "Texas Instruments' K3 based SoC select" |
| 5 | optional |
| 6 | |
| Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 7 | config SOC_K3_AM6 |
| 8 | bool "TI's K3 based AM6 SoC Family Support" |
| 9 | |
| Lokesh Vutla | 9bdec00 | 2018-08-27 15:57:08 +0530 | [diff] [blame] | 10 | endchoice |
| 11 | |
| 12 | config SYS_SOC |
| 13 | default "k3" |
| 14 | |
| Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 15 | config SYS_K3_NON_SECURE_MSRAM_SIZE |
| 16 | hex |
| 17 | default 0x80000 |
| 18 | help |
| 19 | Describes the total size of the MCU MSRAM. This doesn't |
| 20 | specify the total size of SPL as ROM can use some part |
| 21 | of this RAM. Once ROM gives control to SPL then this |
| 22 | complete size can be usable. |
| 23 | |
| 24 | config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE |
| 25 | hex |
| 26 | default 0x58000 |
| 27 | help |
| 28 | Describes the maximum size of the image that ROM can download |
| 29 | from any boot media. |
| 30 | |
| 31 | config SYS_K3_MCU_SCRATCHPAD_BASE |
| 32 | hex |
| 33 | default 0x40280000 if SOC_K3_AM6 |
| 34 | help |
| 35 | Describes the base address of MCU Scratchpad RAM. |
| 36 | |
| 37 | config SYS_K3_MCU_SCRATCHPAD_SIZE |
| 38 | hex |
| 39 | default 0x200 if SOC_K3_AM6 |
| 40 | help |
| 41 | Describes the size of MCU Scratchpad RAM. |
| 42 | |
| Lokesh Vutla | c7bfb85 | 2018-08-27 15:57:11 +0530 | [diff] [blame] | 43 | config SYS_K3_BOOT_PARAM_TABLE_INDEX |
| 44 | hex |
| 45 | default 0x41c7fbfc if SOC_K3_AM6 |
| 46 | help |
| 47 | Address at which ROM stores the value which determines if SPL |
| 48 | is booted up by primary boot media or secondary boot media. |
| 49 | |
| Lokesh Vutla | 6b6a394 | 2018-11-02 19:51:04 +0530 | [diff] [blame] | 50 | config SYS_K3_KEY |
| 51 | string "Key used to generate x509 certificate" |
| 52 | help |
| 53 | This option enables to provide a custom key that can be used for |
| 54 | generating x509 certificate for spl binary. If not needed leave |
| 55 | it blank so that a random key is generated and used. |
| 56 | |
| 57 | config SYS_K3_BOOT_CORE_ID |
| 58 | int |
| 59 | default 16 |
| 60 | |
| Lokesh Vutla | 5d83fd2 | 2018-11-02 19:51:05 +0530 | [diff] [blame] | 61 | config SYS_K3_SPL_ATF |
| 62 | bool "Start Cortex-A from SPL" |
| 63 | depends on SPL && CPU_V7R |
| 64 | help |
| 65 | Enabling this will try to start Cortex-A (typically with ATF) |
| 66 | after SPL from R5. |
| 67 | |
| Lokesh Vutla | 029f921 | 2018-08-27 15:59:06 +0530 | [diff] [blame] | 68 | source "board/ti/am65x/Kconfig" |
| Lokesh Vutla | 9bdec00 | 2018-08-27 15:57:08 +0530 | [diff] [blame] | 69 | endif |