blob: ac5f56d066fef5245050b4604f84e5155a064732 [file] [log] [blame]
Piotr Zierhoffer4ac391c2015-07-23 14:33:02 +02001/*
2 * Copyright (c) 2014-2015, Antmicro Ltd <www.antmicro.com>
3 * Copyright (c) 2015, AW-SOM Technologies <www.aw-som.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <config.h>
10#include <asm/io.h>
11#include <nand.h>
12
13/* registers */
14#define NFC_CTL 0x00000000
15#define NFC_ST 0x00000004
16#define NFC_INT 0x00000008
17#define NFC_TIMING_CTL 0x0000000C
18#define NFC_TIMING_CFG 0x00000010
19#define NFC_ADDR_LOW 0x00000014
20#define NFC_ADDR_HIGH 0x00000018
21#define NFC_SECTOR_NUM 0x0000001C
22#define NFC_CNT 0x00000020
23#define NFC_CMD 0x00000024
24#define NFC_RCMD_SET 0x00000028
25#define NFC_WCMD_SET 0x0000002C
26#define NFC_IO_DATA 0x00000030
27#define NFC_ECC_CTL 0x00000034
28#define NFC_ECC_ST 0x00000038
29#define NFC_DEBUG 0x0000003C
30#define NFC_ECC_CNT0 0x00000040
31#define NFC_ECC_CNT1 0x00000044
32#define NFC_ECC_CNT2 0x00000048
33#define NFC_ECC_CNT3 0x0000004C
34#define NFC_USER_DATA_BASE 0x00000050
35#define NFC_EFNAND_STATUS 0x00000090
36#define NFC_SPARE_AREA 0x000000A0
37#define NFC_PATTERN_ID 0x000000A4
38#define NFC_RAM0_BASE 0x00000400
39#define NFC_RAM1_BASE 0x00000800
40
41#define NFC_CTL_EN (1 << 0)
42#define NFC_CTL_RESET (1 << 1)
43#define NFC_CTL_RAM_METHOD (1 << 14)
44
45
46#define NFC_ECC_EN (1 << 0)
47#define NFC_ECC_PIPELINE (1 << 3)
48#define NFC_ECC_EXCEPTION (1 << 4)
49#define NFC_ECC_BLOCK_SIZE (1 << 5)
50#define NFC_ECC_RANDOM_EN (1 << 9)
51#define NFC_ECC_RANDOM_DIRECTION (1 << 10)
52
53
54#define NFC_ADDR_NUM_OFFSET 16
55#define NFC_SEND_ADR (1 << 19)
56#define NFC_ACCESS_DIR (1 << 20)
57#define NFC_DATA_TRANS (1 << 21)
58#define NFC_SEND_CMD1 (1 << 22)
59#define NFC_WAIT_FLAG (1 << 23)
60#define NFC_SEND_CMD2 (1 << 24)
61#define NFC_SEQ (1 << 25)
62#define NFC_DATA_SWAP_METHOD (1 << 26)
63#define NFC_ROW_AUTO_INC (1 << 27)
64#define NFC_SEND_CMD3 (1 << 28)
65#define NFC_SEND_CMD4 (1 << 29)
66
67#define NFC_CMD_INT_FLAG (1 << 1)
68
69#define NFC_READ_CMD_OFFSET 0
70#define NFC_RANDOM_READ_CMD0_OFFSET 8
71#define NFC_RANDOM_READ_CMD1_OFFSET 16
72
73#define NFC_CMD_RNDOUTSTART 0xE0
74#define NFC_CMD_RNDOUT 0x05
75#define NFC_CMD_READSTART 0x30
76
77
78#define NFC_PAGE_CMD (2 << 30)
79
80#define SUNXI_DMA_CFG_REG0 0x300
81#define SUNXI_DMA_SRC_START_ADDR_REG0 0x304
82#define SUNXI_DMA_DEST_START_ADDRR_REG0 0x308
83#define SUNXI_DMA_DDMA_BC_REG0 0x30C
84#define SUNXI_DMA_DDMA_PARA_REG0 0x318
85
86#define SUNXI_DMA_DDMA_CFG_REG_LOADING (1 << 31)
87#define SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32 (2 << 25)
88#define SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32 (2 << 9)
89#define SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO (1 << 5)
90#define SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC (3 << 0)
91
92#define SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC (0x0F << 0)
93#define SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE (0x7F << 8)
94
95/* minimal "boot0" style NAND support for Allwinner A20 */
96
97/* temporary buffer in internal ram */
98unsigned char temp_buf[CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE]
99 __aligned(0x10) __section(".text#");
100
101/* random seed used by linux */
102const uint16_t random_seed[128] = {
103 0x2b75, 0x0bd0, 0x5ca3, 0x62d1, 0x1c93, 0x07e9, 0x2162, 0x3a72,
104 0x0d67, 0x67f9, 0x1be7, 0x077d, 0x032f, 0x0dac, 0x2716, 0x2436,
105 0x7922, 0x1510, 0x3860, 0x5287, 0x480f, 0x4252, 0x1789, 0x5a2d,
106 0x2a49, 0x5e10, 0x437f, 0x4b4e, 0x2f45, 0x216e, 0x5cb7, 0x7130,
107 0x2a3f, 0x60e4, 0x4dc9, 0x0ef0, 0x0f52, 0x1bb9, 0x6211, 0x7a56,
108 0x226d, 0x4ea7, 0x6f36, 0x3692, 0x38bf, 0x0c62, 0x05eb, 0x4c55,
109 0x60f4, 0x728c, 0x3b6f, 0x2037, 0x7f69, 0x0936, 0x651a, 0x4ceb,
110 0x6218, 0x79f3, 0x383f, 0x18d9, 0x4f05, 0x5c82, 0x2912, 0x6f17,
111 0x6856, 0x5938, 0x1007, 0x61ab, 0x3e7f, 0x57c2, 0x542f, 0x4f62,
112 0x7454, 0x2eac, 0x7739, 0x42d4, 0x2f90, 0x435a, 0x2e52, 0x2064,
113 0x637c, 0x66ad, 0x2c90, 0x0bad, 0x759c, 0x0029, 0x0986, 0x7126,
114 0x1ca7, 0x1605, 0x386a, 0x27f5, 0x1380, 0x6d75, 0x24c3, 0x0f8e,
115 0x2b7a, 0x1418, 0x1fd1, 0x7dc1, 0x2d8e, 0x43af, 0x2267, 0x7da3,
116 0x4e3d, 0x1338, 0x50db, 0x454d, 0x764d, 0x40a3, 0x42e6, 0x262b,
117 0x2d2e, 0x1aea, 0x2e17, 0x173d, 0x3a6e, 0x71bf, 0x25f9, 0x0a5d,
118 0x7c57, 0x0fbe, 0x46ce, 0x4939, 0x6b17, 0x37bb, 0x3e91, 0x76db,
119};
120
121/* random seed used for syndrome calls */
122const uint16_t random_seed_syndrome = 0x4a80;
123
124#define MAX_RETRIES 10
125
126static int check_value_inner(int offset, int expected_bits,
127 int max_number_of_retries, int negation)
128{
129 int retries = 0;
130 do {
131 int val = readl(offset) & expected_bits;
132 if (negation ? !val : val)
133 return 1;
134 mdelay(1);
135 retries++;
136 } while (retries < max_number_of_retries);
137
138 return 0;
139}
140
141static inline int check_value(int offset, int expected_bits,
142 int max_number_of_retries)
143{
144 return check_value_inner(offset, expected_bits,
145 max_number_of_retries, 0);
146}
147
148static inline int check_value_negated(int offset, int unexpected_bits,
149 int max_number_of_retries)
150{
151 return check_value_inner(offset, unexpected_bits,
152 max_number_of_retries, 1);
153}
154
155void nand_init(void)
156{
157 uint32_t val;
158
159 val = readl(SUNXI_NFC_BASE + NFC_CTL);
160 /* enable and reset CTL */
161 writel(val | NFC_CTL_EN | NFC_CTL_RESET,
162 SUNXI_NFC_BASE + NFC_CTL);
163
164 if (!check_value_negated(SUNXI_NFC_BASE + NFC_CTL,
165 NFC_CTL_RESET, MAX_RETRIES)) {
166 printf("Couldn't initialize nand\n");
167 }
168}
169
170static void nand_read_page(unsigned int real_addr, int syndrome,
171 uint32_t *ecc_errors)
172{
173 uint32_t val;
174 int ecc_off = 0;
175 uint16_t ecc_mode = 0;
176 uint16_t rand_seed;
177 uint32_t page;
178 uint16_t column;
179 uint32_t oob_offset;
180
181 switch (CONFIG_NAND_SUNXI_SPL_ECC_STRENGTH) {
182 case 16:
183 ecc_mode = 0;
184 ecc_off = 0x20;
185 break;
186 case 24:
187 ecc_mode = 1;
188 ecc_off = 0x2e;
189 break;
190 case 28:
191 ecc_mode = 2;
192 ecc_off = 0x32;
193 break;
194 case 32:
195 ecc_mode = 3;
196 ecc_off = 0x3c;
197 break;
198 case 40:
199 ecc_mode = 4;
200 ecc_off = 0x4a;
201 break;
202 case 48:
203 ecc_mode = 4;
204 ecc_off = 0x52;
205 break;
206 case 56:
207 ecc_mode = 4;
208 ecc_off = 0x60;
209 break;
210 case 60:
211 ecc_mode = 4;
212 ecc_off = 0x0;
213 break;
214 case 64:
215 ecc_mode = 4;
216 ecc_off = 0x0;
217 break;
218 default:
219 ecc_mode = 0;
220 ecc_off = 0;
221 }
222
223 if (ecc_off == 0) {
224 printf("Unsupported ECC strength (%d)!\n",
225 CONFIG_NAND_SUNXI_SPL_ECC_STRENGTH);
226 return;
227 }
228
229 /* clear temp_buf */
230 memset(temp_buf, 0, CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE);
231
232 /* set CMD */
233 writel(NFC_SEND_CMD1 | NFC_WAIT_FLAG | NAND_CMD_RESET,
234 SUNXI_NFC_BASE + NFC_CMD);
235
236 if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_CMD_INT_FLAG,
237 MAX_RETRIES)) {
238 printf("Error while initilizing command interrupt\n");
239 return;
240 }
241
242 page = real_addr / CONFIG_NAND_SUNXI_SPL_PAGE_SIZE;
243 column = real_addr % CONFIG_NAND_SUNXI_SPL_PAGE_SIZE;
244
245 if (syndrome)
246 column += (column / CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE)
247 * ecc_off;
248
249 /* clear ecc status */
250 writel(0, SUNXI_NFC_BASE + NFC_ECC_ST);
251
252 /* Choose correct seed */
253 if (syndrome)
254 rand_seed = random_seed_syndrome;
255 else
256 rand_seed = random_seed[page % 128];
257
258 writel((rand_seed << 16) | NFC_ECC_RANDOM_EN | NFC_ECC_EN
259 | NFC_ECC_PIPELINE | (ecc_mode << 12),
260 SUNXI_NFC_BASE + NFC_ECC_CTL);
261
262 val = readl(SUNXI_NFC_BASE + NFC_CTL);
263 writel(val | NFC_CTL_RAM_METHOD, SUNXI_NFC_BASE + NFC_CTL);
264
265 if (syndrome) {
266 writel(CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE,
267 SUNXI_NFC_BASE + NFC_SPARE_AREA);
268 } else {
269 oob_offset = CONFIG_NAND_SUNXI_SPL_PAGE_SIZE
270 + (column / CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE)
271 * ecc_off;
272 writel(oob_offset, SUNXI_NFC_BASE + NFC_SPARE_AREA);
273 }
274
275 /* SUNXI_DMA */
276 writel(0x0, SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0); /* clr dma cmd */
277 /* read from REG_IO_DATA */
278 writel(SUNXI_NFC_BASE + NFC_IO_DATA,
279 SUNXI_DMA_BASE + SUNXI_DMA_SRC_START_ADDR_REG0);
280 /* read to RAM */
281 writel((uint32_t)temp_buf,
282 SUNXI_DMA_BASE + SUNXI_DMA_DEST_START_ADDRR_REG0);
283 writel(SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC
284 | SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE,
285 SUNXI_DMA_BASE + SUNXI_DMA_DDMA_PARA_REG0);
286 writel(CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE,
287 SUNXI_DMA_BASE + SUNXI_DMA_DDMA_BC_REG0); /* 1kB */
288 writel(SUNXI_DMA_DDMA_CFG_REG_LOADING
289 | SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32
290 | SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32
291 | SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO
292 | SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC,
293 SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0);
294
295 writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET)
296 | (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET)
297 | (NFC_CMD_READSTART | NFC_READ_CMD_OFFSET), SUNXI_NFC_BASE
298 + NFC_RCMD_SET);
299 writel(1, SUNXI_NFC_BASE + NFC_SECTOR_NUM);
300 writel(((page & 0xFFFF) << 16) | column,
301 SUNXI_NFC_BASE + NFC_ADDR_LOW);
302 writel((page >> 16) & 0xFF, SUNXI_NFC_BASE + NFC_ADDR_HIGH);
303 writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_DATA_TRANS |
304 NFC_PAGE_CMD | NFC_WAIT_FLAG | (4 << NFC_ADDR_NUM_OFFSET) |
305 NFC_SEND_ADR | NFC_DATA_SWAP_METHOD | (syndrome ? NFC_SEQ : 0),
306 SUNXI_NFC_BASE + NFC_CMD);
307
308 if (!check_value(SUNXI_NFC_BASE + NFC_ST, (1 << 2),
309 MAX_RETRIES)) {
310 printf("Error while initializing dma interrupt\n");
311 return;
312 }
313
314 if (!check_value_negated(SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0,
315 SUNXI_DMA_DDMA_CFG_REG_LOADING, MAX_RETRIES)) {
316 printf("Error while waiting for dma transfer to finish\n");
317 return;
318 }
319
320 if (readl(SUNXI_NFC_BASE + NFC_ECC_ST))
321 (*ecc_errors)++;
322}
323
324int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)
325{
326 void *current_dest;
327 uint32_t count;
328 uint32_t current_count;
329 uint32_t ecc_errors = 0;
330
331 memset(dest, 0x0, size); /* clean destination memory */
332 for (current_dest = dest;
333 current_dest < (dest + size);
334 current_dest += CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE) {
335 nand_read_page(offs, offs
336 < CONFIG_NAND_SUNXI_SPL_SYNDROME_PARTITIONS_END,
337 &ecc_errors);
338 count = current_dest - dest;
339
340 if (size - count > CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE)
341 current_count = CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE;
342 else
343 current_count = size - count;
344
345 memcpy(current_dest,
346 temp_buf,
347 current_count);
348 offs += CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE;
349 }
350 return ecc_errors ? -1 : 0;
351}
352
353void nand_deselect(void) {}