| Stefan Roese | bf5ed2e | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SOCFPGA=y |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 4 | CONFIG_SPL_DM=y |
| 5 | CONFIG_DM_GPIO=y |
| 6 | CONFIG_TARGET_SOCFPGA_SR1500=y |
| 7 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" |
| 8 | CONFIG_SPL=y |
| 9 | CONFIG_SPL_STACK_R=y |
| 10 | CONFIG_SPL_STACK_R_ADDR=0x00800000 |
| 11 | # CONFIG_CMD_IMLS is not set |
| 12 | # CONFIG_CMD_FLASH is not set |
| 13 | CONFIG_SPL_SIMPLE_BUS=y |
| 14 | CONFIG_DWAPB_GPIO=y |
| 15 | CONFIG_SPI_FLASH=y |
| 16 | CONFIG_DM_ETH=y |
| 17 | CONFIG_ETH_DESIGNWARE=y |
| 18 | CONFIG_SYS_NS16550=y |
| Marek Vasut | 3b3c0dc | 2015-11-30 20:40:07 +0100 | [diff] [blame] | 19 | CONFIG_DM_MMC=y |
| Chin Liang See | d5c3e7e | 2015-12-22 15:32:30 +0800 | [diff] [blame^] | 20 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |