blob: 01552adb7c4a7500bf407ab98a62f7a88f31bcb6 [file] [log] [blame]
Patrick Delaunaye063f892022-05-20 18:24:52 +02001// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
2/*
3 * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
4 */
5
6/ {
7 aliases {
8 gpio0 = &gpioa;
9 gpio1 = &gpiob;
10 gpio2 = &gpioc;
11 gpio3 = &gpiod;
12 gpio4 = &gpioe;
13 gpio5 = &gpiof;
14 gpio6 = &gpiog;
15 gpio7 = &gpioh;
16 gpio8 = &gpioi;
17 pinctrl0 = &pinctrl;
18 };
19
20 /* need PSCI for sysreset during board_f */
21 psci {
22 u-boot,dm-pre-proper;
23 };
24
25 soc {
26 u-boot,dm-pre-reloc;
27
28 ddr: ddr@5a003000 {
29 u-boot,dm-pre-reloc;
30
31 compatible = "st,stm32mp13-ddr";
32
33 reg = <0x5A003000 0x550
34 0x5A004000 0x234>;
35
36 status = "okay";
37 };
38 };
39};
40
41&bsec {
42 u-boot,dm-pre-reloc;
43};
44
45&gpioa {
46 u-boot,dm-pre-reloc;
47};
48
49&gpiob {
50 u-boot,dm-pre-reloc;
51};
52
53&gpioc {
54 u-boot,dm-pre-reloc;
55};
56
57&gpiod {
58 u-boot,dm-pre-reloc;
59};
60
61&gpioe {
62 u-boot,dm-pre-reloc;
63};
64
65&gpiof {
66 u-boot,dm-pre-reloc;
67};
68
69&gpiog {
70 u-boot,dm-pre-reloc;
71};
72
73&gpioh {
74 u-boot,dm-pre-reloc;
75};
76
77&gpioi {
78 u-boot,dm-pre-reloc;
79};
80
81&iwdg2 {
82 u-boot,dm-pre-reloc;
83};
84
Patrick Delaunayabf20ae2022-07-06 18:20:24 +020085&optee {
86 u-boot,dm-pre-reloc;
87};
88
Patrick Delaunaye063f892022-05-20 18:24:52 +020089&pinctrl {
90 u-boot,dm-pre-reloc;
91};
92
Patrick Delaunayad09d082022-07-06 18:20:25 +020093&scmi {
94 u-boot,dm-pre-reloc;
95};
96
97&scmi_clk {
98 u-boot,dm-pre-reloc;
99};
100
101&scmi_reset {
102 u-boot,dm-pre-reloc;
103};
104
105&scmi_shm {
106 u-boot,dm-pre-reloc;
107};
108
109&scmi_sram {
110 u-boot,dm-pre-reloc;
111};
112
Patrick Delaunaye063f892022-05-20 18:24:52 +0200113&syscfg {
114 u-boot,dm-pre-reloc;
115};