| Vladimir Zapolskiy | 6b20ef8 | 2012-04-19 04:33:08 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Common definitions for LPC32XX board configurations |
| 3 | * |
| 4 | * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version 2 |
| 9 | * of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 19 | * MA 02110-1301, USA. |
| 20 | */ |
| 21 | |
| 22 | #ifndef _LPC32XX_CONFIG_H |
| 23 | #define _LPC32XX_CONFIG_H |
| 24 | |
| 25 | /* Basic CPU architecture */ |
| 26 | #define CONFIG_ARM926EJS |
| 27 | #define CONFIG_ARCH_CPU_INIT |
| 28 | |
| 29 | #define CONFIG_NR_DRAM_BANKS_MAX 2 |
| 30 | |
| 31 | /* 1KHz clock tick */ |
| 32 | #define CONFIG_SYS_HZ 1000 |
| 33 | |
| 34 | /* UART configuration */ |
| 35 | #if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6) |
| 36 | #define CONFIG_SYS_NS16550_SERIAL |
| 37 | #define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2) |
| 38 | #elif (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ |
| 39 | (CONFIG_SYS_LPC32XX_UART == 7) |
| 40 | #define CONFIG_LPC32XX_HSUART |
| 41 | #else |
| 42 | #error "define CONFIG_SYS_LPC32XX_UART in the range from 1 to 7" |
| 43 | #endif |
| 44 | |
| 45 | #if defined(CONFIG_SYS_NS16550_SERIAL) |
| 46 | #define CONFIG_SYS_NS16550 |
| 47 | |
| 48 | #define CONFIG_SYS_NS16550_REG_SIZE -4 |
| 49 | #define CONFIG_SYS_NS16550_CLK get_serial_clock() |
| 50 | |
| 51 | #define CONFIG_SYS_NS16550_COM1 UART3_BASE |
| 52 | #define CONFIG_SYS_NS16550_COM2 UART4_BASE |
| 53 | #define CONFIG_SYS_NS16550_COM3 UART5_BASE |
| 54 | #define CONFIG_SYS_NS16550_COM4 UART6_BASE |
| 55 | #endif |
| 56 | |
| 57 | #if defined(CONFIG_LPC32XX_HSUART) |
| 58 | #if CONFIG_SYS_LPC32XX_UART == 1 |
| 59 | #define HS_UART_BASE HS_UART1_BASE |
| 60 | #elif CONFIG_SYS_LPC32XX_UART == 2 |
| 61 | #define HS_UART_BASE HS_UART2_BASE |
| 62 | #else /* CONFIG_SYS_LPC32XX_UART == 7 */ |
| 63 | #define HS_UART_BASE HS_UART7_BASE |
| 64 | #endif |
| 65 | #endif |
| 66 | |
| 67 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
| 68 | { 9600, 19200, 38400, 57600, 115200, 230400, 460800 } |
| 69 | |
| 70 | /* NOR Flash */ |
| 71 | #if defined(CONFIG_SYS_FLASH_CFI) |
| 72 | #define CONFIG_FLASH_CFI_DRIVER |
| 73 | #define CONFIG_SYS_FLASH_PROTECTION |
| 74 | #endif |
| 75 | |
| 76 | #endif /* _LPC32XX_CONFIG_H */ |