| Svyatoslav Ryhel | 7a25c38 | 2023-06-30 10:29:03 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /dts-v1/; |
| 3 | |
| 4 | #include "tegra30-asus-transformer.dtsi" |
| 5 | |
| 6 | / { |
| 7 | model = "ASUS Transformer Pad 3G TF300TG"; |
| 8 | compatible = "asus,tf300tg", "nvidia,tegra30"; |
| Svyatoslav Ryhel | f3947d4 | 2023-11-27 19:20:21 +0200 | [diff] [blame] | 9 | |
| 10 | pinmux@70000868 { |
| 11 | state_default: pinmux { |
| 12 | pbb3 { |
| 13 | nvidia,pins = "pbb3"; |
| 14 | nvidia,function = "vgp3"; |
| 15 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 16 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 17 | nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| 18 | }; |
| 19 | |
| 20 | pbb7 { |
| 21 | nvidia,pins = "pbb7"; |
| 22 | nvidia,function = "i2s4"; |
| 23 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 24 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 25 | nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| 26 | }; |
| 27 | |
| 28 | gmi_cs4_n_pk2 { |
| 29 | nvidia,pins = "gmi_cs4_n_pk2"; |
| 30 | nvidia,function = "gmi"; |
| 31 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 32 | nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| 33 | nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| 34 | }; |
| 35 | |
| 36 | lcd_pwr2_pc6 { |
| 37 | nvidia,pins = "lcd_pwr2_pc6", |
| 38 | "lcd_dc1_pd2"; |
| 39 | nvidia,function = "displaya"; |
| 40 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 41 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 42 | nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| 43 | }; |
| 44 | |
| 45 | kb_row7_pr7 { |
| 46 | nvidia,pins = "kb_row7_pr7"; |
| 47 | nvidia,function = "kbc"; |
| 48 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 49 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 50 | nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| 51 | }; |
| 52 | |
| 53 | spi2_cs2_n_pw3 { |
| 54 | nvidia,pins = "spi2_cs2_n_pw3"; |
| 55 | nvidia,function = "spi2"; |
| 56 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 57 | }; |
| 58 | |
| 59 | dap3_din_pp1 { |
| 60 | nvidia,pins = "dap3_din_pp1"; |
| 61 | nvidia,function = "i2s2"; |
| 62 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 63 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 64 | nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| 65 | }; |
| 66 | |
| 67 | spi1_sck_px5 { |
| 68 | nvidia,pins = "spi1_sck_px5"; |
| 69 | nvidia,function = "spi1"; |
| 70 | nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| 71 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 72 | nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| 73 | }; |
| 74 | |
| 75 | pu5 { |
| 76 | nvidia,pins = "pu5"; |
| 77 | nvidia,function = "pwm2"; |
| 78 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 79 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 80 | nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| 81 | }; |
| 82 | |
| 83 | spi2_mosi_px0 { |
| 84 | nvidia,pins = "spi2_mosi_px0"; |
| 85 | nvidia,function = "spi2"; |
| 86 | }; |
| 87 | |
| 88 | spi1_miso_px7 { |
| 89 | nvidia,pins = "spi1_miso_px7"; |
| 90 | nvidia,function = "spi1"; |
| 91 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 92 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 93 | nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| 94 | }; |
| 95 | |
| 96 | clk3_req_pee1 { |
| 97 | nvidia,pins = "clk3_req_pee1"; |
| 98 | nvidia,function = "dev3"; |
| 99 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 100 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 101 | nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| 102 | }; |
| 103 | |
| 104 | ulpi_nxt_py2 { |
| 105 | nvidia,pins = "ulpi_nxt_py2"; |
| 106 | nvidia,function = "uartd"; |
| 107 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 108 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 109 | nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| 110 | }; |
| 111 | |
| 112 | ulpi_stp_py3 { |
| 113 | nvidia,pins = "ulpi_stp_py3"; |
| 114 | nvidia,function = "uartd"; |
| 115 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 116 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 117 | nvidia,enable-input = <TEGRA_PIN_ENABLE>; |
| 118 | }; |
| 119 | |
| 120 | pu3 { |
| 121 | nvidia,pins = "pu3"; |
| 122 | nvidia,function = "rsvd1"; |
| 123 | nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| 124 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 125 | nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| 126 | }; |
| 127 | |
| 128 | dap1_din_pn1 { |
| 129 | nvidia,pins = "dap1_din_pn1"; |
| 130 | nvidia,function = "i2s0"; |
| 131 | nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| 132 | nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| 133 | nvidia,enable-input = <TEGRA_PIN_DISABLE>; |
| 134 | }; |
| 135 | }; |
| 136 | }; |
| Svyatoslav Ryhel | 7a25c38 | 2023-06-30 10:29:03 +0300 | [diff] [blame] | 137 | }; |