blob: f83caf79988fced7797ddacb63eccb778d1a0fc4 [file] [log] [blame]
Robert Nelson39452282023-11-04 03:11:00 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * https://beagleboard.org/ai-64
4 *
5 * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
6 * Copyright (C) 2022 Jason Kridner, BeagleBoard.org Foundation
7 * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
8 */
9
10#include "k3-binman.dtsi"
11
12/ {
13 memory@80000000 {
14 bootph-all;
15 };
16
17 /* Keep the LEDs on by default to indicate life */
18 leds {
19 bootph-all;
20 led-0 {
21 default-state = "on";
22 bootph-all;
23 };
24
25 led-1 {
26 default-state = "on";
27 bootph-all;
28 };
29
30 led-2 {
31 default-state = "on";
32 bootph-all;
33 };
34
35 led-3 {
36 default-state = "on";
37 bootph-all;
38 };
39
40 led-4 {
41 default-state = "on";
42 bootph-all;
43 };
44 };
45};
46
47&cbass_main {
48 bootph-all;
49};
50
51&main_navss {
52 bootph-all;
53};
54
55&cbass_mcu_wakeup {
56 bootph-all;
57
58 chipid@43000014 {
59 bootph-all;
60 };
61};
62
63&mcu_navss {
64 bootph-all;
65};
66
67&mcu_ringacc {
68 reg = <0x0 0x2b800000 0x0 0x400000>,
69 <0x0 0x2b000000 0x0 0x400000>,
70 <0x0 0x28590000 0x0 0x100>,
71 <0x0 0x2a500000 0x0 0x40000>,
72 <0x0 0x28440000 0x0 0x40000>;
73 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
74 bootph-all;
75};
76
77&mcu_udmap {
78 reg = <0x0 0x285c0000 0x0 0x100>,
79 <0x0 0x284c0000 0x0 0x4000>,
80 <0x0 0x2a800000 0x0 0x40000>,
81 <0x0 0x284a0000 0x0 0x4000>,
82 <0x0 0x2aa00000 0x0 0x40000>,
83 <0x0 0x28400000 0x0 0x2000>;
84 reg-names = "gcfg", "rchan", "rchanrt", "tchan",
85 "tchanrt", "rflow";
86 bootph-all;
87};
88
89&secure_proxy_main {
90 bootph-all;
91};
92
93&dmsc {
94 bootph-all;
95 k3_sysreset: sysreset-controller {
96 compatible = "ti,sci-sysreset";
97 bootph-all;
98 };
99};
100
101&k3_pds {
102 bootph-all;
103};
104
105&k3_clks {
106 bootph-all;
107};
108
109&k3_reset {
110 bootph-all;
111};
112
113&wkup_pmx0 {
114 bootph-all;
115};
116
117&main_pmx0 {
118 bootph-all;
119};
120
121&main_uart0 {
122 bootph-all;
123};
124
125&main_gpio0 {
126 bootph-all;
127};
128
129&main_uart0_pins_default {
130 bootph-all;
131};
132
133&main_sdhci0 {
134 bootph-all;
135};
136
137&main_sdhci1 {
138 bootph-all;
139 sdhci-caps-mask = <0x00000007 0x00000000>;
140 /delete-property/ cd-gpios;
141 /delete-property/ cd-debounce-delay-ms;
142 /delete-property/ ti,fails-without-test-cd;
143 /delete-property/ no-1-8-v;
144};
145
146&main_mmc1_pins_default {
147 bootph-all;
148};
149
150&mcu_cpsw {
151 bootph-all;
152};
153
154&davinci_mdio {
155 bootph-all;
156};
157
158&phy0 {
159 bootph-all;
160};
161
162&serdes2 {
163 bootph-all;
164};
165
166&serdes_ln_ctrl {
167 bootph-all;
168};
169
170&serdes2_usb_link {
171 bootph-all;
172};
173
174&usb_serdes_mux {
175 bootph-all;
176};
177
178&serdes_wiz2 {
179 bootph-all;
180};
181
182&main_usbss1_pins_default {
183 bootph-all;
184};
185
186&mcu_usbss1_pins_default {
187 bootph-all;
188};
189
190&usbss1 {
191 bootph-all;
192};
193
194&usb1 {
195 bootph-all;
196};
197
198&wkup_i2c0_pins_default {
199 bootph-all;
200};
201
202&wkup_i2c0 {
203 bootph-all;
204};
205
206#ifdef CONFIG_TARGET_J721E_A72_BEAGLEBONEAI64
207
208#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
209#define SPL_J721E_BBAI64_DTB "spl/dts/k3-j721e-beagleboneai64.dtb"
210
211#define UBOOT_NODTB "u-boot-nodtb.bin"
212#define J721E_BBAI64_DTB "arch/arm/dts/k3-j721e-beagleboneai64.dtb"
213
214&binman {
215 ti-dm {
216 filename = "ti-dm.bin";
217 blob-ext {
218 filename = "ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f";
219 };
220 };
221
222 ti-spl_unsigned {
223 filename = "tispl.bin_unsigned";
224 pad-byte = <0xff>;
225
226 fit {
227 description = "Configuration to load ATF and SPL";
228 #address-cells = <1>;
229
230 images {
231
232 atf {
233 description = "ARM Trusted Firmware";
234 type = "firmware";
235 arch = "arm64";
236 compression = "none";
237 os = "arm-trusted-firmware";
238 load = <CONFIG_K3_ATF_LOAD_ADDR>;
239 entry = <CONFIG_K3_ATF_LOAD_ADDR>;
240 atf-bl31 {
241 filename = "bl31.bin";
242 };
243 };
244
245 tee {
246 description = "OP-TEE";
247 type = "tee";
248 arch = "arm64";
249 compression = "none";
250 os = "tee";
251 load = <0x9e800000>;
252 entry = <0x9e800000>;
253 tee-os {
254 filename = "tee-raw.bin";
255 };
256 };
257
258 dm {
259 description = "DM binary";
260 type = "firmware";
261 arch = "arm32";
262 compression = "none";
263 os = "DM";
264 load = <0x89000000>;
265 entry = <0x89000000>;
266 blob-ext {
267 filename = "ti-dm.bin";
268 };
269 };
270
271 spl {
272 description = "SPL (64-bit)";
273 type = "standalone";
274 os = "U-Boot";
275 arch = "arm64";
276 compression = "none";
277 load = <CONFIG_SPL_TEXT_BASE>;
278 entry = <CONFIG_SPL_TEXT_BASE>;
279 blob-ext {
280 filename = SPL_NODTB;
281 };
282 };
283
284 fdt-0 {
285 description = "k3-j721e-beagleboneai64";
286 type = "flat_dt";
287 arch = "arm";
288 compression = "none";
289 blob {
290 filename = SPL_J721E_BBAI64_DTB;
291 };
292 };
293 };
294
295 configurations {
296 default = "conf-0";
297
298 conf-0 {
299 description = "k3-j721e-beagleboneai64";
300 firmware = "atf";
301 loadables = "tee", "dm", "spl";
302 fdt = "fdt-0";
303 };
304 };
305 };
306 };
307
308 u-boot_unsigned {
309 filename = "u-boot.img_unsigned";
310 pad-byte = <0xff>;
311
312 fit {
313 description = "FIT image with multiple configurations";
314
315 images {
316 uboot {
317 description = "U-Boot for j721e board";
318 type = "firmware";
319 os = "u-boot";
320 arch = "arm";
321 compression = "none";
322 load = <CONFIG_TEXT_BASE>;
323 blob {
324 filename = UBOOT_NODTB;
325 };
326 hash {
327 algo = "crc32";
328 };
329 };
330
331 fdt-0 {
332 description = "k3-j721e-beagleboneai64";
333 type = "flat_dt";
334 arch = "arm";
335 compression = "none";
336 blob {
337 filename = J721E_BBAI64_DTB;
338 };
339 hash {
340 algo = "crc32";
341 };
342 };
343 };
344
345 configurations {
346 default = "conf-0";
347
348 conf-0 {
349 description = "k3-j721e-beagleboneai64";
350 firmware = "uboot";
351 loadables = "uboot";
352 fdt = "fdt-0";
353 };
354 };
355 };
356 };
357};
358#endif