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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +02002/*
3 * (C) Copyright 2008
4 * Gururaja Hebbar gururajakr@sanyo.co.in
5 *
6 * reference linux-2.6.20.6/drivers/rtc/rtc-pl031.c
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +02007 */
8
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +02009#include <command.h>
AKASHI Takahirocbba1552018-09-14 17:06:53 +090010#include <dm.h>
11#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060012#include <log.h>
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020013#include <rtc.h>
AKASHI Takahirocbba1552018-09-14 17:06:53 +090014#include <asm/io.h>
15#include <asm/types.h>
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020016
17/*
18 * Register definitions
19 */
20#define RTC_DR 0x00 /* Data read register */
21#define RTC_MR 0x04 /* Match register */
22#define RTC_LR 0x08 /* Data load register */
23#define RTC_CR 0x0c /* Control register */
24#define RTC_IMSC 0x10 /* Interrupt mask and set register */
25#define RTC_RIS 0x14 /* Raw interrupt status register */
26#define RTC_MIS 0x18 /* Masked interrupt status register */
27#define RTC_ICR 0x1c /* Interrupt clear register */
28
29#define RTC_CR_START (1 << 0)
30
Simon Glassb75b15b2020-12-03 16:55:23 -070031struct pl031_plat {
AKASHI Takahirocbba1552018-09-14 17:06:53 +090032 phys_addr_t base;
33};
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020034
AKASHI Takahirocbba1552018-09-14 17:06:53 +090035static inline u32 pl031_read_reg(struct udevice *dev, int reg)
36{
Simon Glassb75b15b2020-12-03 16:55:23 -070037 struct pl031_plat *pdata = dev_get_plat(dev);
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020038
AKASHI Takahirocbba1552018-09-14 17:06:53 +090039 return readl(pdata->base + reg);
40}
41
42static inline u32 pl031_write_reg(struct udevice *dev, int reg, u32 value)
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020043{
Simon Glassb75b15b2020-12-03 16:55:23 -070044 struct pl031_plat *pdata = dev_get_plat(dev);
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020045
AKASHI Takahirocbba1552018-09-14 17:06:53 +090046 return writel(value, pdata->base + reg);
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020047}
48
49/*
AKASHI Takahirocbba1552018-09-14 17:06:53 +090050 * Probe RTC device
51 */
52static int pl031_probe(struct udevice *dev)
53{
54 /* Enable RTC Start in Control register*/
55 pl031_write_reg(dev, RTC_CR, RTC_CR_START);
56
57 return 0;
58}
59
60/*
61 * Get the current time from the RTC
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020062 */
AKASHI Takahirocbba1552018-09-14 17:06:53 +090063static int pl031_get(struct udevice *dev, struct rtc_time *tm)
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020064{
AKASHI Takahirocbba1552018-09-14 17:06:53 +090065 unsigned long tim;
66
67 if (!tm)
68 return -EINVAL;
69
70 tim = pl031_read_reg(dev, RTC_DR);
71
72 rtc_to_tm(tim, tm);
73
74 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
75 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
76 tm->tm_hour, tm->tm_min, tm->tm_sec);
77
78 return 0;
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020079}
80
81/*
82 * Set the RTC
AKASHI Takahirocbba1552018-09-14 17:06:53 +090083 */
84static int pl031_set(struct udevice *dev, const struct rtc_time *tm)
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020085{
86 unsigned long tim;
87
AKASHI Takahirocbba1552018-09-14 17:06:53 +090088 if (!tm)
89 return -EINVAL;
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020090
AKASHI Takahirocbba1552018-09-14 17:06:53 +090091 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
92 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
93 tm->tm_hour, tm->tm_min, tm->tm_sec);
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020094
95 /* Calculate number of seconds this incoming time represents */
AKASHI Takahirocbba1552018-09-14 17:06:53 +090096 tim = rtc_mktime(tm);
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +020097
AKASHI Takahirocbba1552018-09-14 17:06:53 +090098 pl031_write_reg(dev, RTC_LR, tim);
Jean-Christophe PLAGNIOL-VILLARD97a2e102008-09-01 23:06:23 +020099
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900100 return 0;
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200101}
102
103/*
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900104 * Reset the RTC. We set the date back to 1970-01-01.
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200105 */
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900106static int pl031_reset(struct udevice *dev)
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200107{
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900108 pl031_write_reg(dev, RTC_LR, 0);
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200109
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900110 return 0;
111}
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200112
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900113static const struct rtc_ops pl031_ops = {
114 .get = pl031_get,
115 .set = pl031_set,
116 .reset = pl031_reset,
117};
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200118
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900119static const struct udevice_id pl031_ids[] = {
120 { .compatible = "arm,pl031" },
121 { }
122};
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200123
Simon Glassaad29ae2020-12-03 16:55:21 -0700124static int pl031_of_to_plat(struct udevice *dev)
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900125{
Simon Glassb75b15b2020-12-03 16:55:23 -0700126 struct pl031_plat *pdata = dev_get_plat(dev);
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200127
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900128 pdata->base = dev_read_addr(dev);
Gururaja Hebbar K R76873a62008-08-25 11:30:29 +0200129
130 return 0;
131}
132
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900133U_BOOT_DRIVER(rtc_pl031) = {
134 .name = "rtc-pl031",
135 .id = UCLASS_RTC,
136 .of_match = pl031_ids,
137 .probe = pl031_probe,
Simon Glassaad29ae2020-12-03 16:55:21 -0700138 .of_to_plat = pl031_of_to_plat,
Simon Glassb75b15b2020-12-03 16:55:23 -0700139 .plat_auto = sizeof(struct pl031_plat),
AKASHI Takahirocbba1552018-09-14 17:06:53 +0900140 .ops = &pl031_ops,
141};