blob: 360b0708498c6d005297b1aafad7ffe8d7eead29 [file] [log] [blame]
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02008 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02009 * Additional technical information is available on
Scott Wood3628f002008-10-24 16:20:43 -050010 * http://www.linux-mtd.infradead.org/doc/nand.html
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020011 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020012 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
William Juul52c07962007-10-31 13:53:06 +010013 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020014 *
William Juul52c07962007-10-31 13:53:06 +010015 * Credits:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020016 * David Woodhouse for adding multichip support
17 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020018 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
20 *
William Juul52c07962007-10-31 13:53:06 +010021 * TODO:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020022 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
Scott Wood3628f002008-10-24 16:20:43 -050027 * BBT table is not serialized, has to be fixed
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020028 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020029 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License version 2 as
31 * published by the Free Software Foundation.
32 *
33 */
34
35/* XXX U-BOOT XXX */
36#if 0
William Juul52c07962007-10-31 13:53:06 +010037#include <linux/module.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020038#include <linux/delay.h>
39#include <linux/errno.h>
William Juul52c07962007-10-31 13:53:06 +010040#include <linux/err.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020041#include <linux/sched.h>
42#include <linux/slab.h>
43#include <linux/types.h>
44#include <linux/mtd/mtd.h>
45#include <linux/mtd/nand.h>
46#include <linux/mtd/nand_ecc.h>
47#include <linux/mtd/compatmac.h>
48#include <linux/interrupt.h>
49#include <linux/bitops.h>
William Juul52c07962007-10-31 13:53:06 +010050#include <linux/leds.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020051#include <asm/io.h>
52
53#ifdef CONFIG_MTD_PARTITIONS
54#include <linux/mtd/partitions.h>
55#endif
56
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020057#endif
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020058
59#include <common.h>
Bartlomiej Sieka582f1a32006-03-05 18:57:33 +010060
William Juul52c07962007-10-31 13:53:06 +010061#define ENOTSUPP 524 /* Operation is not supported */
62
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020063#include <malloc.h>
64#include <watchdog.h>
William Juul52c07962007-10-31 13:53:06 +010065#include <linux/err.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020066#include <linux/mtd/compat.h>
67#include <linux/mtd/mtd.h>
68#include <linux/mtd/nand.h>
69#include <linux/mtd/nand_ecc.h>
70
Stefan Roesefa252ea2009-04-24 15:58:33 +020071#ifdef CONFIG_MTD_PARTITIONS
72#include <linux/mtd/partitions.h>
73#endif
74
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020075#include <asm/io.h>
76#include <asm/errno.h>
77
78#ifdef CONFIG_JFFS2_NAND
79#include <jffs2/jffs2.h>
80#endif
81
Peter Tyserf9f36222009-02-04 13:47:22 -060082/*
83 * CONFIG_SYS_NAND_RESET_CNT is used as a timeout mechanism when resetting
84 * a flash. NAND flash is initialized prior to interrupts so standard timers
85 * can't be used. CONFIG_SYS_NAND_RESET_CNT should be set to a value
86 * which is greater than (max NAND reset time / NAND status read time).
87 * A conservative default of 200000 (500 us / 25 ns) is used as a default.
88 */
89#ifndef CONFIG_SYS_NAND_RESET_CNT
90#define CONFIG_SYS_NAND_RESET_CNT 200000
91#endif
92
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020093/* Define default oob placement schemes for large and small page devices */
William Juul52c07962007-10-31 13:53:06 +010094static struct nand_ecclayout nand_oob_8 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020095 .eccbytes = 3,
96 .eccpos = {0, 1, 2},
William Juul52c07962007-10-31 13:53:06 +010097 .oobfree = {
98 {.offset = 3,
99 .length = 2},
100 {.offset = 6,
101 .length = 2}}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200102};
103
William Juul52c07962007-10-31 13:53:06 +0100104static struct nand_ecclayout nand_oob_16 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200105 .eccbytes = 6,
106 .eccpos = {0, 1, 2, 3, 6, 7},
William Juul52c07962007-10-31 13:53:06 +0100107 .oobfree = {
108 {.offset = 8,
109 . length = 8}}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200110};
111
William Juul52c07962007-10-31 13:53:06 +0100112static struct nand_ecclayout nand_oob_64 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200113 .eccbytes = 24,
114 .eccpos = {
William Juul52c07962007-10-31 13:53:06 +0100115 40, 41, 42, 43, 44, 45, 46, 47,
116 48, 49, 50, 51, 52, 53, 54, 55,
117 56, 57, 58, 59, 60, 61, 62, 63},
118 .oobfree = {
119 {.offset = 2,
120 .length = 38}}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200121};
122
William Juul52c07962007-10-31 13:53:06 +0100123static struct nand_ecclayout nand_oob_128 = {
Sergei Poselenov04fbaa02008-06-06 15:42:43 +0200124 .eccbytes = 48,
125 .eccpos = {
William Juul52c07962007-10-31 13:53:06 +0100126 80, 81, 82, 83, 84, 85, 86, 87,
127 88, 89, 90, 91, 92, 93, 94, 95,
128 96, 97, 98, 99, 100, 101, 102, 103,
129 104, 105, 106, 107, 108, 109, 110, 111,
130 112, 113, 114, 115, 116, 117, 118, 119,
131 120, 121, 122, 123, 124, 125, 126, 127},
132 .oobfree = {
133 {.offset = 2,
134 .length = 78}}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200135};
136
William Juul52c07962007-10-31 13:53:06 +0100137
138static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
139 int new_state);
140
141static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
142 struct mtd_oob_ops *ops);
143
144static int nand_wait(struct mtd_info *mtd, struct nand_chip *this);
Sergei Poselenov04fbaa02008-06-06 15:42:43 +0200145
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200146/*
Scott Wood3628f002008-10-24 16:20:43 -0500147 * For devices which display every fart in the system on a separate LED. Is
William Juul52c07962007-10-31 13:53:06 +0100148 * compiled away when LED support is disabled.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200149 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200150/* XXX U-BOOT XXX */
151#if 0
William Juul52c07962007-10-31 13:53:06 +0100152DEFINE_LED_TRIGGER(nand_led_trigger);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200153#endif
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200154
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200155/**
156 * nand_release_device - [GENERIC] release chip
157 * @mtd: MTD device structure
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200158 *
159 * Deselect, release chip lock and wake up anyone waiting on the device
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200160 */
161/* XXX U-BOOT XXX */
162#if 0
William Juul52c07962007-10-31 13:53:06 +0100163static void nand_release_device(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200164{
William Juul52c07962007-10-31 13:53:06 +0100165 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200166
167 /* De-select the NAND device */
William Juul52c07962007-10-31 13:53:06 +0100168 chip->select_chip(mtd, -1);
169
170 /* Release the controller and the chip */
171 spin_lock(&chip->controller->lock);
172 chip->controller->active = NULL;
173 chip->state = FL_READY;
174 wake_up(&chip->controller->wq);
175 spin_unlock(&chip->controller->lock);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200176}
177#else
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100178static void nand_release_device (struct mtd_info *mtd)
179{
180 struct nand_chip *this = mtd->priv;
181 this->select_chip(mtd, -1); /* De-select the NAND device */
182}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200183#endif
184
185/**
186 * nand_read_byte - [DEFAULT] read one byte from the chip
187 * @mtd: MTD device structure
188 *
189 * Default read function for 8bit buswith
190 */
William Juul52c07962007-10-31 13:53:06 +0100191static uint8_t nand_read_byte(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200192{
William Juul52c07962007-10-31 13:53:06 +0100193 struct nand_chip *chip = mtd->priv;
194 return readb(chip->IO_ADDR_R);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200195}
196
197/**
198 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
199 * @mtd: MTD device structure
200 *
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200201 * Default read function for 16bit buswith with
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200202 * endianess conversion
203 */
William Juul52c07962007-10-31 13:53:06 +0100204static uint8_t nand_read_byte16(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200205{
William Juul52c07962007-10-31 13:53:06 +0100206 struct nand_chip *chip = mtd->priv;
207 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200208}
209
210/**
211 * nand_read_word - [DEFAULT] read one word from the chip
212 * @mtd: MTD device structure
213 *
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200214 * Default read function for 16bit buswith without
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200215 * endianess conversion
216 */
217static u16 nand_read_word(struct mtd_info *mtd)
218{
William Juul52c07962007-10-31 13:53:06 +0100219 struct nand_chip *chip = mtd->priv;
220 return readw(chip->IO_ADDR_R);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200221}
222
223/**
224 * nand_select_chip - [DEFAULT] control CE line
225 * @mtd: MTD device structure
William Juul52c07962007-10-31 13:53:06 +0100226 * @chipnr: chipnumber to select, -1 for deselect
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200227 *
228 * Default select function for 1 chip devices.
229 */
William Juul52c07962007-10-31 13:53:06 +0100230static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200231{
William Juul52c07962007-10-31 13:53:06 +0100232 struct nand_chip *chip = mtd->priv;
233
234 switch (chipnr) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200235 case -1:
William Juul52c07962007-10-31 13:53:06 +0100236 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200237 break;
238 case 0:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200239 break;
240
241 default:
242 BUG();
243 }
244}
245
246/**
247 * nand_write_buf - [DEFAULT] write buffer to chip
248 * @mtd: MTD device structure
249 * @buf: data buffer
250 * @len: number of bytes to write
251 *
252 * Default write function for 8bit buswith
253 */
William Juul52c07962007-10-31 13:53:06 +0100254static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200255{
256 int i;
William Juul52c07962007-10-31 13:53:06 +0100257 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200258
William Juul52c07962007-10-31 13:53:06 +0100259 for (i = 0; i < len; i++)
260 writeb(buf[i], chip->IO_ADDR_W);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200261}
262
263/**
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200264 * nand_read_buf - [DEFAULT] read chip data into buffer
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200265 * @mtd: MTD device structure
266 * @buf: buffer to store date
267 * @len: number of bytes to read
268 *
269 * Default read function for 8bit buswith
270 */
William Juul52c07962007-10-31 13:53:06 +0100271static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200272{
273 int i;
William Juul52c07962007-10-31 13:53:06 +0100274 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200275
William Juul52c07962007-10-31 13:53:06 +0100276 for (i = 0; i < len; i++)
277 buf[i] = readb(chip->IO_ADDR_R);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200278}
279
280/**
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200281 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200282 * @mtd: MTD device structure
283 * @buf: buffer containing the data to compare
284 * @len: number of bytes to compare
285 *
286 * Default verify function for 8bit buswith
287 */
William Juul52c07962007-10-31 13:53:06 +0100288static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200289{
290 int i;
William Juul52c07962007-10-31 13:53:06 +0100291 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200292
William Juul52c07962007-10-31 13:53:06 +0100293 for (i = 0; i < len; i++)
294 if (buf[i] != readb(chip->IO_ADDR_R))
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200295 return -EFAULT;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200296 return 0;
297}
298
299/**
300 * nand_write_buf16 - [DEFAULT] write buffer to chip
301 * @mtd: MTD device structure
302 * @buf: data buffer
303 * @len: number of bytes to write
304 *
305 * Default write function for 16bit buswith
306 */
William Juul52c07962007-10-31 13:53:06 +0100307static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200308{
309 int i;
William Juul52c07962007-10-31 13:53:06 +0100310 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200311 u16 *p = (u16 *) buf;
312 len >>= 1;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200313
William Juul52c07962007-10-31 13:53:06 +0100314 for (i = 0; i < len; i++)
315 writew(p[i], chip->IO_ADDR_W);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200316
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200317}
318
319/**
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200320 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200321 * @mtd: MTD device structure
322 * @buf: buffer to store date
323 * @len: number of bytes to read
324 *
325 * Default read function for 16bit buswith
326 */
William Juul52c07962007-10-31 13:53:06 +0100327static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200328{
329 int i;
William Juul52c07962007-10-31 13:53:06 +0100330 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200331 u16 *p = (u16 *) buf;
332 len >>= 1;
333
William Juul52c07962007-10-31 13:53:06 +0100334 for (i = 0; i < len; i++)
335 p[i] = readw(chip->IO_ADDR_R);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200336}
337
338/**
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200339 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200340 * @mtd: MTD device structure
341 * @buf: buffer containing the data to compare
342 * @len: number of bytes to compare
343 *
344 * Default verify function for 16bit buswith
345 */
William Juul52c07962007-10-31 13:53:06 +0100346static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200347{
348 int i;
William Juul52c07962007-10-31 13:53:06 +0100349 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200350 u16 *p = (u16 *) buf;
351 len >>= 1;
352
William Juul52c07962007-10-31 13:53:06 +0100353 for (i = 0; i < len; i++)
354 if (p[i] != readw(chip->IO_ADDR_R))
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200355 return -EFAULT;
356
357 return 0;
358}
359
360/**
361 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
362 * @mtd: MTD device structure
363 * @ofs: offset from device start
364 * @getchip: 0, if the chip is already selected
365 *
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200366 * Check, if the block is bad.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200367 */
368static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
369{
370 int page, chipnr, res = 0;
William Juul52c07962007-10-31 13:53:06 +0100371 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200372 u16 bad;
373
William Juul52c07962007-10-31 13:53:06 +0100374 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
Thomas Knobloch9e2aeaf2007-05-05 07:04:42 +0200375
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200376 if (getchip) {
William Juul52c07962007-10-31 13:53:06 +0100377 chipnr = (int)(ofs >> chip->chip_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200378
William Juul52c07962007-10-31 13:53:06 +0100379 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200380
381 /* Select the NAND device */
William Juul52c07962007-10-31 13:53:06 +0100382 chip->select_chip(mtd, chipnr);
Thomas Knobloch9e2aeaf2007-05-05 07:04:42 +0200383 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200384
William Juul52c07962007-10-31 13:53:06 +0100385 if (chip->options & NAND_BUSWIDTH_16) {
386 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE,
387 page);
388 bad = cpu_to_le16(chip->read_word(mtd));
389 if (chip->badblockpos & 0x1)
390 bad >>= 8;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200391 if ((bad & 0xFF) != 0xff)
392 res = 1;
393 } else {
William Juul52c07962007-10-31 13:53:06 +0100394 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
395 if (chip->read_byte(mtd) != 0xff)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200396 res = 1;
397 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200398
William Juul52c07962007-10-31 13:53:06 +0100399 if (getchip)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200400 nand_release_device(mtd);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200401
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200402 return res;
403}
404
405/**
406 * nand_default_block_markbad - [DEFAULT] mark a block bad
407 * @mtd: MTD device structure
408 * @ofs: offset from device start
409 *
410 * This is the default implementation, which can be overridden by
411 * a hardware specific driver.
412*/
413static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
414{
William Juul52c07962007-10-31 13:53:06 +0100415 struct nand_chip *chip = mtd->priv;
416 uint8_t buf[2] = { 0, 0 };
417 int block, ret;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200418
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200419 /* Get block number */
William Juul52c07962007-10-31 13:53:06 +0100420 block = (int)(ofs >> chip->bbt_erase_shift);
421 if (chip->bbt)
422 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200423
424 /* Do we have a flash based bad block table ? */
William Juul52c07962007-10-31 13:53:06 +0100425 if (chip->options & NAND_USE_FLASH_BBT)
426 ret = nand_update_bbt(mtd, ofs);
427 else {
428 /* We write two bytes, so we dont have to mess with 16 bit
429 * access
430 */
Scott Wood3628f002008-10-24 16:20:43 -0500431 nand_get_device(chip, mtd, FL_WRITING);
William Juul52c07962007-10-31 13:53:06 +0100432 ofs += mtd->oobsize;
433 chip->ops.len = chip->ops.ooblen = 2;
434 chip->ops.datbuf = NULL;
435 chip->ops.oobbuf = buf;
436 chip->ops.ooboffs = chip->badblockpos & ~0x01;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200437
William Juul52c07962007-10-31 13:53:06 +0100438 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
Scott Wood3628f002008-10-24 16:20:43 -0500439 nand_release_device(mtd);
William Juul52c07962007-10-31 13:53:06 +0100440 }
441 if (!ret)
442 mtd->ecc_stats.badblocks++;
Scott Wood3628f002008-10-24 16:20:43 -0500443
William Juul52c07962007-10-31 13:53:06 +0100444 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200445}
446
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200447/**
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200448 * nand_check_wp - [GENERIC] check if the chip is write protected
449 * @mtd: MTD device structure
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200450 * Check, if the device is write protected
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200451 *
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200452 * The function expects, that the device is already selected
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200453 */
William Juul52c07962007-10-31 13:53:06 +0100454static int nand_check_wp(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200455{
William Juul52c07962007-10-31 13:53:06 +0100456 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200457 /* Check the WP bit */
William Juul52c07962007-10-31 13:53:06 +0100458 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
459 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200460}
Markus Klotzbücher27eba142006-03-06 15:04:25 +0100461
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200462/**
463 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
464 * @mtd: MTD device structure
465 * @ofs: offset from device start
466 * @getchip: 0, if the chip is already selected
467 * @allowbbt: 1, if its allowed to access the bbt area
468 *
469 * Check, if the block is bad. Either by reading the bad block table or
470 * calling of the scan function.
471 */
William Juul52c07962007-10-31 13:53:06 +0100472static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
473 int allowbbt)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200474{
William Juul52c07962007-10-31 13:53:06 +0100475 struct nand_chip *chip = mtd->priv;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200476
Ilya Yanoka2d4dfe2008-06-30 15:34:40 +0200477 if (!(chip->options & NAND_BBT_SCANNED)) {
Ilya Yanoka2d4dfe2008-06-30 15:34:40 +0200478 chip->options |= NAND_BBT_SCANNED;
Scott Wood11b12a32008-12-16 14:24:16 -0600479 chip->scan_bbt(mtd);
Ilya Yanoka2d4dfe2008-06-30 15:34:40 +0200480 }
481
William Juul52c07962007-10-31 13:53:06 +0100482 if (!chip->bbt)
483 return chip->block_bad(mtd, ofs, getchip);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200484
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200485 /* Return info from the table */
William Juul52c07962007-10-31 13:53:06 +0100486 return nand_isbad_bbt(mtd, ofs, allowbbt);
487}
488
489/*
490 * Wait for the ready pin, after a command
491 * The timeout is catched later.
492 */
493/* XXX U-BOOT XXX */
494#if 0
495void nand_wait_ready(struct mtd_info *mtd)
496{
497 struct nand_chip *chip = mtd->priv;
498 unsigned long timeo = jiffies + 2;
499
500 led_trigger_event(nand_led_trigger, LED_FULL);
501 /* wait until command is processed or timeout occures */
502 do {
503 if (chip->dev_ready(mtd))
504 break;
505 touch_softlockup_watchdog();
506 } while (time_before(jiffies, timeo));
507 led_trigger_event(nand_led_trigger, LED_OFF);
508}
509EXPORT_SYMBOL_GPL(nand_wait_ready);
510#else
511void nand_wait_ready(struct mtd_info *mtd)
512{
513 struct nand_chip *chip = mtd->priv;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200514 u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
Stefan Roesea5c312c2008-01-05 16:43:25 +0100515
516 reset_timer();
517
518 /* wait until command is processed or timeout occures */
519 while (get_timer(0) < timeo) {
520 if (chip->dev_ready)
521 if (chip->dev_ready(mtd))
522 break;
523 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200524}
William Juul52c07962007-10-31 13:53:06 +0100525#endif
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200526
527/**
528 * nand_command - [DEFAULT] Send command to NAND device
529 * @mtd: MTD device structure
530 * @command: the command to be sent
531 * @column: the column address for this command, -1 if none
532 * @page_addr: the page address for this command, -1 if none
533 *
534 * Send command to NAND device. This function is used for small page
535 * devices (256/512 Bytes per page)
536 */
William Juul52c07962007-10-31 13:53:06 +0100537static void nand_command(struct mtd_info *mtd, unsigned int command,
538 int column, int page_addr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200539{
William Juul52c07962007-10-31 13:53:06 +0100540 register struct nand_chip *chip = mtd->priv;
541 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Peter Tyserf9f36222009-02-04 13:47:22 -0600542 uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200543
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200544 /*
545 * Write out the command to the device.
546 */
547 if (command == NAND_CMD_SEQIN) {
548 int readcmd;
549
William Juul52c07962007-10-31 13:53:06 +0100550 if (column >= mtd->writesize) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200551 /* OOB area */
William Juul52c07962007-10-31 13:53:06 +0100552 column -= mtd->writesize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200553 readcmd = NAND_CMD_READOOB;
554 } else if (column < 256) {
555 /* First 256 bytes --> READ0 */
556 readcmd = NAND_CMD_READ0;
557 } else {
558 column -= 256;
559 readcmd = NAND_CMD_READ1;
560 }
William Juul52c07962007-10-31 13:53:06 +0100561 chip->cmd_ctrl(mtd, readcmd, ctrl);
562 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200563 }
William Juul52c07962007-10-31 13:53:06 +0100564 chip->cmd_ctrl(mtd, command, ctrl);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200565
William Juul52c07962007-10-31 13:53:06 +0100566 /*
567 * Address cycle, when necessary
568 */
569 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
570 /* Serially input address */
571 if (column != -1) {
572 /* Adjust columns for 16 bit buswidth */
573 if (chip->options & NAND_BUSWIDTH_16)
574 column >>= 1;
575 chip->cmd_ctrl(mtd, column, ctrl);
576 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200577 }
William Juul52c07962007-10-31 13:53:06 +0100578 if (page_addr != -1) {
579 chip->cmd_ctrl(mtd, page_addr, ctrl);
580 ctrl &= ~NAND_CTRL_CHANGE;
581 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
582 /* One more address cycle for devices > 32MiB */
583 if (chip->chipsize > (32 << 20))
584 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
585 }
586 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200587
588 /*
589 * program and erase have their own busy handlers
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200590 * status and sequential in needs no delay
William Juul52c07962007-10-31 13:53:06 +0100591 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200592 switch (command) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200593
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200594 case NAND_CMD_PAGEPROG:
595 case NAND_CMD_ERASE1:
596 case NAND_CMD_ERASE2:
597 case NAND_CMD_SEQIN:
598 case NAND_CMD_STATUS:
599 return;
600
601 case NAND_CMD_RESET:
William Juul52c07962007-10-31 13:53:06 +0100602 if (chip->dev_ready)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200603 break;
William Juul52c07962007-10-31 13:53:06 +0100604 udelay(chip->chip_delay);
605 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
606 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
607 chip->cmd_ctrl(mtd,
608 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Peter Tyserf9f36222009-02-04 13:47:22 -0600609 while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&
610 (rst_sts_cnt--));
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200611 return;
612
William Juul52c07962007-10-31 13:53:06 +0100613 /* This applies to read commands */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200614 default:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200615 /*
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200616 * If we don't have access to the busy pin, we apply the given
617 * command delay
William Juul52c07962007-10-31 13:53:06 +0100618 */
619 if (!chip->dev_ready) {
620 udelay(chip->chip_delay);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200621 return;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200622 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200623 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200624 /* Apply this short delay always to ensure that we do wait tWB in
625 * any case on any machine. */
William Juul52c07962007-10-31 13:53:06 +0100626 ndelay(100);
627
628 nand_wait_ready(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200629}
630
631/**
632 * nand_command_lp - [DEFAULT] Send command to NAND large page device
633 * @mtd: MTD device structure
634 * @command: the command to be sent
635 * @column: the column address for this command, -1 if none
636 * @page_addr: the page address for this command, -1 if none
637 *
William Juul52c07962007-10-31 13:53:06 +0100638 * Send command to NAND device. This is the version for the new large page
639 * devices We dont have the separate regions as we have in the small page
640 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200641 */
William Juul52c07962007-10-31 13:53:06 +0100642static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
643 int column, int page_addr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200644{
William Juul52c07962007-10-31 13:53:06 +0100645 register struct nand_chip *chip = mtd->priv;
Peter Tyserf9f36222009-02-04 13:47:22 -0600646 uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200647
648 /* Emulate NAND_CMD_READOOB */
649 if (command == NAND_CMD_READOOB) {
William Juul52c07962007-10-31 13:53:06 +0100650 column += mtd->writesize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200651 command = NAND_CMD_READ0;
652 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200653
William Juul52c07962007-10-31 13:53:06 +0100654 /* Command latch cycle */
655 chip->cmd_ctrl(mtd, command & 0xff,
656 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200657
658 if (column != -1 || page_addr != -1) {
William Juul52c07962007-10-31 13:53:06 +0100659 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200660
661 /* Serially input address */
662 if (column != -1) {
663 /* Adjust columns for 16 bit buswidth */
William Juul52c07962007-10-31 13:53:06 +0100664 if (chip->options & NAND_BUSWIDTH_16)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200665 column >>= 1;
William Juul52c07962007-10-31 13:53:06 +0100666 chip->cmd_ctrl(mtd, column, ctrl);
667 ctrl &= ~NAND_CTRL_CHANGE;
668 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200669 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200670 if (page_addr != -1) {
William Juul52c07962007-10-31 13:53:06 +0100671 chip->cmd_ctrl(mtd, page_addr, ctrl);
672 chip->cmd_ctrl(mtd, page_addr >> 8,
673 NAND_NCE | NAND_ALE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200674 /* One more address cycle for devices > 128MiB */
William Juul52c07962007-10-31 13:53:06 +0100675 if (chip->chipsize > (128 << 20))
676 chip->cmd_ctrl(mtd, page_addr >> 16,
677 NAND_NCE | NAND_ALE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200678 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200679 }
William Juul52c07962007-10-31 13:53:06 +0100680 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200681
682 /*
683 * program and erase have their own busy handlers
William Juul52c07962007-10-31 13:53:06 +0100684 * status, sequential in, and deplete1 need no delay
685 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200686 switch (command) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200687
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200688 case NAND_CMD_CACHEDPROG:
689 case NAND_CMD_PAGEPROG:
690 case NAND_CMD_ERASE1:
691 case NAND_CMD_ERASE2:
692 case NAND_CMD_SEQIN:
William Juul52c07962007-10-31 13:53:06 +0100693 case NAND_CMD_RNDIN:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200694 case NAND_CMD_STATUS:
William Juul52c07962007-10-31 13:53:06 +0100695 case NAND_CMD_DEPLETE1:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200696 return;
697
William Juul52c07962007-10-31 13:53:06 +0100698 /*
699 * read error status commands require only a short delay
700 */
701 case NAND_CMD_STATUS_ERROR:
702 case NAND_CMD_STATUS_ERROR0:
703 case NAND_CMD_STATUS_ERROR1:
704 case NAND_CMD_STATUS_ERROR2:
705 case NAND_CMD_STATUS_ERROR3:
706 udelay(chip->chip_delay);
707 return;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200708
709 case NAND_CMD_RESET:
William Juul52c07962007-10-31 13:53:06 +0100710 if (chip->dev_ready)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200711 break;
William Juul52c07962007-10-31 13:53:06 +0100712 udelay(chip->chip_delay);
713 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
714 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
715 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
716 NAND_NCE | NAND_CTRL_CHANGE);
Peter Tyserf9f36222009-02-04 13:47:22 -0600717 while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&
718 (rst_sts_cnt--));
William Juul52c07962007-10-31 13:53:06 +0100719 return;
720
721 case NAND_CMD_RNDOUT:
722 /* No ready / busy check necessary */
723 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
724 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
725 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
726 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200727 return;
728
729 case NAND_CMD_READ0:
William Juul52c07962007-10-31 13:53:06 +0100730 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
731 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
732 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
733 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200734
William Juul52c07962007-10-31 13:53:06 +0100735 /* This applies to read commands */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200736 default:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200737 /*
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200738 * If we don't have access to the busy pin, we apply the given
739 * command delay
William Juul52c07962007-10-31 13:53:06 +0100740 */
741 if (!chip->dev_ready) {
742 udelay(chip->chip_delay);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200743 return;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200744 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200745 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200746
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200747 /* Apply this short delay always to ensure that we do wait tWB in
748 * any case on any machine. */
William Juul52c07962007-10-31 13:53:06 +0100749 ndelay(100);
750
751 nand_wait_ready(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200752}
753
754/**
755 * nand_get_device - [GENERIC] Get chip for selected access
William Juul52c07962007-10-31 13:53:06 +0100756 * @chip: the nand chip descriptor
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200757 * @mtd: MTD device structure
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200758 * @new_state: the state which is requested
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200759 *
760 * Get the device and lock it for exclusive access
761 */
762/* XXX U-BOOT XXX */
763#if 0
William Juul52c07962007-10-31 13:53:06 +0100764static int
765nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200766{
William Juul52c07962007-10-31 13:53:06 +0100767 spinlock_t *lock = &chip->controller->lock;
768 wait_queue_head_t *wq = &chip->controller->wq;
769 DECLARE_WAITQUEUE(wait, current);
770 retry:
771 spin_lock(lock);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200772
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200773 /* Hardware controller shared among independend devices */
William Juul52c07962007-10-31 13:53:06 +0100774 /* Hardware controller shared among independend devices */
775 if (!chip->controller->active)
776 chip->controller->active = chip;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200777
William Juul52c07962007-10-31 13:53:06 +0100778 if (chip->controller->active == chip && chip->state == FL_READY) {
779 chip->state = new_state;
780 spin_unlock(lock);
781 return 0;
782 }
783 if (new_state == FL_PM_SUSPENDED) {
784 spin_unlock(lock);
785 return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200786 }
William Juul52c07962007-10-31 13:53:06 +0100787 set_current_state(TASK_UNINTERRUPTIBLE);
788 add_wait_queue(wq, &wait);
789 spin_unlock(lock);
790 schedule();
791 remove_wait_queue(wq, &wait);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200792 goto retry;
793}
794#else
William Juul52c07962007-10-31 13:53:06 +0100795static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
796{
Marcel Ziswilerf30a2aa2008-06-22 16:30:06 +0200797 this->state = new_state;
William Juul52c07962007-10-31 13:53:06 +0100798 return 0;
799}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200800#endif
801
802/**
803 * nand_wait - [DEFAULT] wait until the command is done
804 * @mtd: MTD device structure
William Juul52c07962007-10-31 13:53:06 +0100805 * @chip: NAND chip structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200806 *
807 * Wait for command done. This applies to erase and program only
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200808 * Erase can take up to 400ms and program up to 20ms according to
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200809 * general NAND and SmartMedia specs
William Juul52c07962007-10-31 13:53:06 +0100810 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200811/* XXX U-BOOT XXX */
812#if 0
William Juul52c07962007-10-31 13:53:06 +0100813static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200814{
William Juul52c07962007-10-31 13:53:06 +0100815
816 unsigned long timeo = jiffies;
817 int status, state = chip->state;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200818
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200819 if (state == FL_ERASING)
William Juul52c07962007-10-31 13:53:06 +0100820 timeo += (HZ * 400) / 1000;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200821 else
William Juul52c07962007-10-31 13:53:06 +0100822 timeo += (HZ * 20) / 1000;
823
824 led_trigger_event(nand_led_trigger, LED_FULL);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200825
826 /* Apply this short delay always to ensure that we do wait tWB in
827 * any case on any machine. */
William Juul52c07962007-10-31 13:53:06 +0100828 ndelay(100);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200829
William Juul52c07962007-10-31 13:53:06 +0100830 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND))
831 chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200832 else
William Juul52c07962007-10-31 13:53:06 +0100833 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200834
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200835 while (time_before(jiffies, timeo)) {
William Juul52c07962007-10-31 13:53:06 +0100836 if (chip->dev_ready) {
837 if (chip->dev_ready(mtd))
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200838 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200839 } else {
William Juul52c07962007-10-31 13:53:06 +0100840 if (chip->read_byte(mtd) & NAND_STATUS_READY)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200841 break;
842 }
William Juul52c07962007-10-31 13:53:06 +0100843 cond_resched();
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200844 }
William Juul52c07962007-10-31 13:53:06 +0100845 led_trigger_event(nand_led_trigger, LED_OFF);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200846
William Juul52c07962007-10-31 13:53:06 +0100847 status = (int)chip->read_byte(mtd);
848 return status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200849}
850#else
William Juul52c07962007-10-31 13:53:06 +0100851static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200852{
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100853 unsigned long timeo;
William Juul52c07962007-10-31 13:53:06 +0100854 int state = this->state;
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100855
856 if (state == FL_ERASING)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200857 timeo = (CONFIG_SYS_HZ * 400) / 1000;
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100858 else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200859 timeo = (CONFIG_SYS_HZ * 20) / 1000;
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100860
861 if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
862 this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
863 else
864 this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
865
Bartlomiej Sieka6eed2ab2006-02-24 09:37:22 +0100866 reset_timer();
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100867
868 while (1) {
Bartlomiej Sieka6eed2ab2006-02-24 09:37:22 +0100869 if (get_timer(0) > timeo) {
870 printf("Timeout!");
Stefan Roeseef26d242006-11-27 17:22:19 +0100871 return 0x01;
872 }
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100873
874 if (this->dev_ready) {
875 if (this->dev_ready(mtd))
876 break;
877 } else {
878 if (this->read_byte(mtd) & NAND_STATUS_READY)
879 break;
880 }
881 }
Bartlomiej Sieka582f1a32006-03-05 18:57:33 +0100882#ifdef PPCHAMELON_NAND_TIMER_HACK
Bartlomiej Sieka6eed2ab2006-02-24 09:37:22 +0100883 reset_timer();
884 while (get_timer(0) < 10);
Bartlomiej Sieka582f1a32006-03-05 18:57:33 +0100885#endif /* PPCHAMELON_NAND_TIMER_HACK */
Bartlomiej Sieka6eed2ab2006-02-24 09:37:22 +0100886
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100887 return this->read_byte(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200888}
889#endif
890
891/**
William Juul52c07962007-10-31 13:53:06 +0100892 * nand_read_page_raw - [Intern] read raw page data without ecc
893 * @mtd: mtd info structure
894 * @chip: nand chip info structure
895 * @buf: buffer to store read data
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200896 */
William Juul52c07962007-10-31 13:53:06 +0100897static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
898 uint8_t *buf)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200899{
William Juul52c07962007-10-31 13:53:06 +0100900 chip->read_buf(mtd, buf, mtd->writesize);
901 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
902 return 0;
903}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200904
William Juul52c07962007-10-31 13:53:06 +0100905/**
906 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function
907 * @mtd: mtd info structure
908 * @chip: nand chip info structure
909 * @buf: buffer to store read data
910 */
911static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
912 uint8_t *buf)
913{
914 int i, eccsize = chip->ecc.size;
915 int eccbytes = chip->ecc.bytes;
916 int eccsteps = chip->ecc.steps;
917 uint8_t *p = buf;
918 uint8_t *ecc_calc = chip->buffers->ecccalc;
919 uint8_t *ecc_code = chip->buffers->ecccode;
920 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200921
William Juul52c07962007-10-31 13:53:06 +0100922 chip->ecc.read_page_raw(mtd, chip, buf);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200923
William Juul52c07962007-10-31 13:53:06 +0100924 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
925 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200926
William Juul52c07962007-10-31 13:53:06 +0100927 for (i = 0; i < chip->ecc.total; i++)
928 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200929
William Juul52c07962007-10-31 13:53:06 +0100930 eccsteps = chip->ecc.steps;
931 p = buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200932
William Juul52c07962007-10-31 13:53:06 +0100933 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
934 int stat;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200935
William Juul52c07962007-10-31 13:53:06 +0100936 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Scott Wood3628f002008-10-24 16:20:43 -0500937 if (stat < 0)
William Juul52c07962007-10-31 13:53:06 +0100938 mtd->ecc_stats.failed++;
939 else
940 mtd->ecc_stats.corrected += stat;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200941 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200942 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200943}
944
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200945/**
Scott Wood3628f002008-10-24 16:20:43 -0500946 * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function
947 * @mtd: mtd info structure
948 * @chip: nand chip info structure
949 * @dataofs offset of requested data within the page
950 * @readlen data length
951 * @buf: buffer to store read data
952 */
953static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
954{
955 int start_step, end_step, num_steps;
956 uint32_t *eccpos = chip->ecc.layout->eccpos;
957 uint8_t *p;
958 int data_col_addr, i, gaps = 0;
959 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
960 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
961
962 /* Column address wihin the page aligned to ECC size (256bytes). */
963 start_step = data_offs / chip->ecc.size;
964 end_step = (data_offs + readlen - 1) / chip->ecc.size;
965 num_steps = end_step - start_step + 1;
966
967 /* Data size aligned to ECC ecc.size*/
968 datafrag_len = num_steps * chip->ecc.size;
969 eccfrag_len = num_steps * chip->ecc.bytes;
970
971 data_col_addr = start_step * chip->ecc.size;
972 /* If we read not a page aligned data */
973 if (data_col_addr != 0)
974 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
975
976 p = bufpoi + data_col_addr;
977 chip->read_buf(mtd, p, datafrag_len);
978
979 /* Calculate ECC */
980 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
981 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
982
983 /* The performance is faster if to position offsets
984 according to ecc.pos. Let make sure here that
985 there are no gaps in ecc positions */
986 for (i = 0; i < eccfrag_len - 1; i++) {
987 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
988 eccpos[i + start_step * chip->ecc.bytes + 1]) {
989 gaps = 1;
990 break;
991 }
992 }
993 if (gaps) {
994 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
995 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
996 } else {
997 /* send the command to read the particular ecc bytes */
998 /* take care about buswidth alignment in read_buf */
999 aligned_pos = eccpos[start_step * chip->ecc.bytes] & ~(busw - 1);
1000 aligned_len = eccfrag_len;
1001 if (eccpos[start_step * chip->ecc.bytes] & (busw - 1))
1002 aligned_len++;
1003 if (eccpos[(start_step + num_steps) * chip->ecc.bytes] & (busw - 1))
1004 aligned_len++;
1005
1006 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize + aligned_pos, -1);
1007 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
1008 }
1009
1010 for (i = 0; i < eccfrag_len; i++)
1011 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + start_step * chip->ecc.bytes]];
1012
1013 p = bufpoi + data_col_addr;
1014 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
1015 int stat;
1016
1017 stat = chip->ecc.correct(mtd, p, &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
1018 if (stat < 0)
1019 mtd->ecc_stats.failed++;
1020 else
1021 mtd->ecc_stats.corrected += stat;
1022 }
1023 return 0;
1024}
1025
1026/**
William Juul52c07962007-10-31 13:53:06 +01001027 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function
1028 * @mtd: mtd info structure
1029 * @chip: nand chip info structure
1030 * @buf: buffer to store read data
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001031 *
William Juul52c07962007-10-31 13:53:06 +01001032 * Not for syndrome calculating ecc controllers which need a special oob layout
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001033 */
William Juul52c07962007-10-31 13:53:06 +01001034static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1035 uint8_t *buf)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001036{
William Juul52c07962007-10-31 13:53:06 +01001037 int i, eccsize = chip->ecc.size;
1038 int eccbytes = chip->ecc.bytes;
1039 int eccsteps = chip->ecc.steps;
1040 uint8_t *p = buf;
1041 uint8_t *ecc_calc = chip->buffers->ecccalc;
1042 uint8_t *ecc_code = chip->buffers->ecccode;
1043 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001044
William Juul52c07962007-10-31 13:53:06 +01001045 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1046 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1047 chip->read_buf(mtd, p, eccsize);
1048 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1049 }
1050 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001051
William Juul52c07962007-10-31 13:53:06 +01001052 for (i = 0; i < chip->ecc.total; i++)
1053 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001054
William Juul52c07962007-10-31 13:53:06 +01001055 eccsteps = chip->ecc.steps;
1056 p = buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001057
William Juul52c07962007-10-31 13:53:06 +01001058 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1059 int stat;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001060
William Juul52c07962007-10-31 13:53:06 +01001061 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
1062 if (stat == -1)
1063 mtd->ecc_stats.failed++;
1064 else
1065 mtd->ecc_stats.corrected += stat;
1066 }
1067 return 0;
1068}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001069
William Juul52c07962007-10-31 13:53:06 +01001070/**
1071 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
1072 * @mtd: mtd info structure
1073 * @chip: nand chip info structure
1074 * @buf: buffer to store read data
1075 *
1076 * The hw generator calculates the error syndrome automatically. Therefor
1077 * we need a special oob layout and handling.
1078 */
1079static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1080 uint8_t *buf)
1081{
1082 int i, eccsize = chip->ecc.size;
1083 int eccbytes = chip->ecc.bytes;
1084 int eccsteps = chip->ecc.steps;
1085 uint8_t *p = buf;
1086 uint8_t *oob = chip->oob_poi;
1087
1088 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1089 int stat;
1090
1091 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1092 chip->read_buf(mtd, p, eccsize);
1093
1094 if (chip->ecc.prepad) {
1095 chip->read_buf(mtd, oob, chip->ecc.prepad);
1096 oob += chip->ecc.prepad;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001097 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001098
William Juul52c07962007-10-31 13:53:06 +01001099 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1100 chip->read_buf(mtd, oob, eccbytes);
1101 stat = chip->ecc.correct(mtd, p, oob, NULL);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001102
Scott Wood3628f002008-10-24 16:20:43 -05001103 if (stat < 0)
William Juul52c07962007-10-31 13:53:06 +01001104 mtd->ecc_stats.failed++;
1105 else
1106 mtd->ecc_stats.corrected += stat;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001107
William Juul52c07962007-10-31 13:53:06 +01001108 oob += eccbytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001109
William Juul52c07962007-10-31 13:53:06 +01001110 if (chip->ecc.postpad) {
1111 chip->read_buf(mtd, oob, chip->ecc.postpad);
1112 oob += chip->ecc.postpad;
1113 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001114 }
William Juul52c07962007-10-31 13:53:06 +01001115
1116 /* Calculate remaining oob bytes */
1117 i = mtd->oobsize - (oob - chip->oob_poi);
1118 if (i)
1119 chip->read_buf(mtd, oob, i);
1120
1121 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001122}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001123
1124/**
William Juul52c07962007-10-31 13:53:06 +01001125 * nand_transfer_oob - [Internal] Transfer oob to client buffer
1126 * @chip: nand chip structure
1127 * @oob: oob destination address
1128 * @ops: oob ops structure
1129 * @len: size of oob to transfer
1130 */
1131static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
1132 struct mtd_oob_ops *ops, size_t len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001133{
William Juul52c07962007-10-31 13:53:06 +01001134 switch(ops->mode) {
1135
1136 case MTD_OOB_PLACE:
1137 case MTD_OOB_RAW:
1138 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1139 return oob + len;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001140
William Juul52c07962007-10-31 13:53:06 +01001141 case MTD_OOB_AUTO: {
1142 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1143 uint32_t boffs = 0, roffs = ops->ooboffs;
1144 size_t bytes = 0;
1145
1146 for(; free->length && len; free++, len -= bytes) {
1147 /* Read request not from offset 0 ? */
1148 if (unlikely(roffs)) {
1149 if (roffs >= free->length) {
1150 roffs -= free->length;
1151 continue;
1152 }
1153 boffs = free->offset + roffs;
1154 bytes = min_t(size_t, len,
1155 (free->length - roffs));
1156 roffs = 0;
1157 } else {
1158 bytes = min_t(size_t, len, free->length);
1159 boffs = free->offset;
1160 }
1161 memcpy(oob, chip->oob_poi + boffs, bytes);
1162 oob += bytes;
1163 }
1164 return oob;
1165 }
1166 default:
1167 BUG();
1168 }
1169 return NULL;
1170}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001171
1172/**
William Juul52c07962007-10-31 13:53:06 +01001173 * nand_do_read_ops - [Internal] Read data with ECC
1174 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001175 * @mtd: MTD device structure
1176 * @from: offset to read from
William Juul52c07962007-10-31 13:53:06 +01001177 * @ops: oob ops structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001178 *
William Juul52c07962007-10-31 13:53:06 +01001179 * Internal function. Called with chip held.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001180 */
William Juul52c07962007-10-31 13:53:06 +01001181static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1182 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001183{
William Juul52c07962007-10-31 13:53:06 +01001184 int chipnr, page, realpage, col, bytes, aligned;
1185 struct nand_chip *chip = mtd->priv;
1186 struct mtd_ecc_stats stats;
1187 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1188 int sndcmd = 1;
1189 int ret = 0;
1190 uint32_t readlen = ops->len;
1191 uint32_t oobreadlen = ops->ooblen;
1192 uint8_t *bufpoi, *oob, *buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001193
William Juul52c07962007-10-31 13:53:06 +01001194 stats = mtd->ecc_stats;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001195
William Juul52c07962007-10-31 13:53:06 +01001196 chipnr = (int)(from >> chip->chip_shift);
1197 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001198
William Juul52c07962007-10-31 13:53:06 +01001199 realpage = (int)(from >> chip->page_shift);
1200 page = realpage & chip->pagemask;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001201
William Juul52c07962007-10-31 13:53:06 +01001202 col = (int)(from & (mtd->writesize - 1));
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001203
William Juul52c07962007-10-31 13:53:06 +01001204 buf = ops->datbuf;
1205 oob = ops->oobbuf;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001206
William Juul52c07962007-10-31 13:53:06 +01001207 while(1) {
1208 bytes = min(mtd->writesize - col, readlen);
1209 aligned = (bytes == mtd->writesize);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001210
William Juul52c07962007-10-31 13:53:06 +01001211 /* Is the current page in the buffer ? */
1212 if (realpage != chip->pagebuf || oob) {
1213 bufpoi = aligned ? buf : chip->buffers->databuf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001214
William Juul52c07962007-10-31 13:53:06 +01001215 if (likely(sndcmd)) {
1216 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
1217 sndcmd = 0;
1218 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001219
William Juul52c07962007-10-31 13:53:06 +01001220 /* Now read the page into the buffer */
1221 if (unlikely(ops->mode == MTD_OOB_RAW))
1222 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi);
Scott Wood3628f002008-10-24 16:20:43 -05001223 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
1224 ret = chip->ecc.read_subpage(mtd, chip, col, bytes, bufpoi);
William Juul52c07962007-10-31 13:53:06 +01001225 else
1226 ret = chip->ecc.read_page(mtd, chip, bufpoi);
1227 if (ret < 0)
1228 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001229
William Juul52c07962007-10-31 13:53:06 +01001230 /* Transfer not aligned data */
1231 if (!aligned) {
Scott Wood3628f002008-10-24 16:20:43 -05001232 if (!NAND_SUBPAGE_READ(chip) && !oob)
1233 chip->pagebuf = realpage;
William Juul52c07962007-10-31 13:53:06 +01001234 memcpy(buf, chip->buffers->databuf + col, bytes);
1235 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001236
William Juul52c07962007-10-31 13:53:06 +01001237 buf += bytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001238
William Juul52c07962007-10-31 13:53:06 +01001239 if (unlikely(oob)) {
1240 /* Raw mode does data:oob:data:oob */
1241 if (ops->mode != MTD_OOB_RAW) {
1242 int toread = min(oobreadlen,
1243 chip->ecc.layout->oobavail);
1244 if (toread) {
1245 oob = nand_transfer_oob(chip,
1246 oob, ops, toread);
1247 oobreadlen -= toread;
1248 }
1249 } else
1250 buf = nand_transfer_oob(chip,
1251 buf, ops, mtd->oobsize);
1252 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001253
William Juul52c07962007-10-31 13:53:06 +01001254 if (!(chip->options & NAND_NO_READRDY)) {
1255 /*
1256 * Apply delay or wait for ready/busy pin. Do
1257 * this before the AUTOINCR check, so no
1258 * problems arise if a chip which does auto
1259 * increment is marked as NOAUTOINCR by the
1260 * board driver.
1261 */
1262 if (!chip->dev_ready)
1263 udelay(chip->chip_delay);
1264 else
1265 nand_wait_ready(mtd);
1266 }
1267 } else {
1268 memcpy(buf, chip->buffers->databuf + col, bytes);
1269 buf += bytes;
1270 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001271
William Juul52c07962007-10-31 13:53:06 +01001272 readlen -= bytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001273
William Juul52c07962007-10-31 13:53:06 +01001274 if (!readlen)
1275 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001276
William Juul52c07962007-10-31 13:53:06 +01001277 /* For subsequent reads align to page boundary. */
1278 col = 0;
1279 /* Increment page address */
1280 realpage++;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001281
William Juul52c07962007-10-31 13:53:06 +01001282 page = realpage & chip->pagemask;
1283 /* Check, if we cross a chip boundary */
1284 if (!page) {
1285 chipnr++;
1286 chip->select_chip(mtd, -1);
1287 chip->select_chip(mtd, chipnr);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001288 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001289
William Juul52c07962007-10-31 13:53:06 +01001290 /* Check, if the chip supports auto page increment
1291 * or if we have hit a block boundary.
1292 */
1293 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
1294 sndcmd = 1;
1295 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001296
William Juul52c07962007-10-31 13:53:06 +01001297 ops->retlen = ops->len - (size_t) readlen;
1298 if (oob)
1299 ops->oobretlen = ops->ooblen - oobreadlen;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001300
William Juul52c07962007-10-31 13:53:06 +01001301 if (ret)
1302 return ret;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001303
William Juul52c07962007-10-31 13:53:06 +01001304 if (mtd->ecc_stats.failed - stats.failed)
1305 return -EBADMSG;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001306
William Juul52c07962007-10-31 13:53:06 +01001307 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1308}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001309
William Juul52c07962007-10-31 13:53:06 +01001310/**
1311 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1312 * @mtd: MTD device structure
1313 * @from: offset to read from
1314 * @len: number of bytes to read
1315 * @retlen: pointer to variable to store the number of read bytes
1316 * @buf: the databuffer to put data
1317 *
1318 * Get hold of the chip and call nand_do_read
1319 */
1320static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1321 size_t *retlen, uint8_t *buf)
1322{
1323 struct nand_chip *chip = mtd->priv;
1324 int ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001325
William Juul52c07962007-10-31 13:53:06 +01001326 /* Do not allow reads past end of device */
1327 if ((from + len) > mtd->size)
1328 return -EINVAL;
1329 if (!len)
1330 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001331
William Juul52c07962007-10-31 13:53:06 +01001332 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001333
William Juul52c07962007-10-31 13:53:06 +01001334 chip->ops.len = len;
1335 chip->ops.datbuf = buf;
1336 chip->ops.oobbuf = NULL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001337
William Juul52c07962007-10-31 13:53:06 +01001338 ret = nand_do_read_ops(mtd, from, &chip->ops);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001339
William Juul52c07962007-10-31 13:53:06 +01001340 *retlen = chip->ops.retlen;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001341
William Juul52c07962007-10-31 13:53:06 +01001342 nand_release_device(mtd);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001343
William Juul52c07962007-10-31 13:53:06 +01001344 return ret;
1345}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001346
William Juul52c07962007-10-31 13:53:06 +01001347/**
1348 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1349 * @mtd: mtd info structure
1350 * @chip: nand chip info structure
1351 * @page: page number to read
1352 * @sndcmd: flag whether to issue read command or not
1353 */
1354static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1355 int page, int sndcmd)
1356{
1357 if (sndcmd) {
1358 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1359 sndcmd = 0;
1360 }
1361 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1362 return sndcmd;
1363}
1364
1365/**
1366 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1367 * with syndromes
1368 * @mtd: mtd info structure
1369 * @chip: nand chip info structure
1370 * @page: page number to read
1371 * @sndcmd: flag whether to issue read command or not
1372 */
1373static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1374 int page, int sndcmd)
1375{
1376 uint8_t *buf = chip->oob_poi;
1377 int length = mtd->oobsize;
1378 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1379 int eccsize = chip->ecc.size;
1380 uint8_t *bufpoi = buf;
1381 int i, toread, sndrnd = 0, pos;
1382
1383 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
1384 for (i = 0; i < chip->ecc.steps; i++) {
1385 if (sndrnd) {
1386 pos = eccsize + i * (eccsize + chunk);
1387 if (mtd->writesize > 512)
1388 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
1389 else
1390 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001391 } else
William Juul52c07962007-10-31 13:53:06 +01001392 sndrnd = 1;
1393 toread = min_t(int, length, chunk);
1394 chip->read_buf(mtd, bufpoi, toread);
1395 bufpoi += toread;
1396 length -= toread;
1397 }
1398 if (length > 0)
1399 chip->read_buf(mtd, bufpoi, length);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001400
William Juul52c07962007-10-31 13:53:06 +01001401 return 1;
1402}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001403
William Juul52c07962007-10-31 13:53:06 +01001404/**
1405 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1406 * @mtd: mtd info structure
1407 * @chip: nand chip info structure
1408 * @page: page number to write
1409 */
1410static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1411 int page)
1412{
1413 int status = 0;
1414 const uint8_t *buf = chip->oob_poi;
1415 int length = mtd->oobsize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001416
William Juul52c07962007-10-31 13:53:06 +01001417 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
1418 chip->write_buf(mtd, buf, length);
1419 /* Send command to program the OOB data */
1420 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001421
William Juul52c07962007-10-31 13:53:06 +01001422 status = chip->waitfunc(mtd, chip);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001423
William Juul52c07962007-10-31 13:53:06 +01001424 return status & NAND_STATUS_FAIL ? -EIO : 0;
1425}
1426
1427/**
1428 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1429 * with syndrome - only for large page flash !
1430 * @mtd: mtd info structure
1431 * @chip: nand chip info structure
1432 * @page: page number to write
1433 */
1434static int nand_write_oob_syndrome(struct mtd_info *mtd,
1435 struct nand_chip *chip, int page)
1436{
1437 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1438 int eccsize = chip->ecc.size, length = mtd->oobsize;
1439 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
1440 const uint8_t *bufpoi = chip->oob_poi;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001441
1442 /*
William Juul52c07962007-10-31 13:53:06 +01001443 * data-ecc-data-ecc ... ecc-oob
1444 * or
1445 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001446 */
William Juul52c07962007-10-31 13:53:06 +01001447 if (!chip->ecc.prepad && !chip->ecc.postpad) {
1448 pos = steps * (eccsize + chunk);
1449 steps = 0;
1450 } else
1451 pos = eccsize;
1452
1453 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
1454 for (i = 0; i < steps; i++) {
1455 if (sndcmd) {
1456 if (mtd->writesize <= 512) {
1457 uint32_t fill = 0xFFFFFFFF;
1458
1459 len = eccsize;
1460 while (len > 0) {
1461 int num = min_t(int, len, 4);
1462 chip->write_buf(mtd, (uint8_t *)&fill,
1463 num);
1464 len -= num;
1465 }
1466 } else {
1467 pos = eccsize + i * (eccsize + chunk);
1468 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
1469 }
1470 } else
1471 sndcmd = 1;
1472 len = min_t(int, length, chunk);
1473 chip->write_buf(mtd, bufpoi, len);
1474 bufpoi += len;
1475 length -= len;
1476 }
1477 if (length > 0)
1478 chip->write_buf(mtd, bufpoi, length);
1479
1480 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1481 status = chip->waitfunc(mtd, chip);
1482
1483 return status & NAND_STATUS_FAIL ? -EIO : 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001484}
1485
1486/**
William Juul52c07962007-10-31 13:53:06 +01001487 * nand_do_read_oob - [Intern] NAND read out-of-band
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001488 * @mtd: MTD device structure
1489 * @from: offset to read from
William Juul52c07962007-10-31 13:53:06 +01001490 * @ops: oob operations description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001491 *
1492 * NAND read out-of-band data from the spare area
1493 */
William Juul52c07962007-10-31 13:53:06 +01001494static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1495 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001496{
William Juul52c07962007-10-31 13:53:06 +01001497 int page, realpage, chipnr, sndcmd = 1;
1498 struct nand_chip *chip = mtd->priv;
1499 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1500 int readlen = ops->ooblen;
1501 int len;
1502 uint8_t *buf = ops->oobbuf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001503
William Juul52c07962007-10-31 13:53:06 +01001504 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1505 (unsigned long long)from, readlen);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001506
William Juul52c07962007-10-31 13:53:06 +01001507 if (ops->mode == MTD_OOB_AUTO)
1508 len = chip->ecc.layout->oobavail;
1509 else
1510 len = mtd->oobsize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001511
William Juul52c07962007-10-31 13:53:06 +01001512 if (unlikely(ops->ooboffs >= len)) {
1513 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
1514 "Attempt to start read outside oob\n");
1515 return -EINVAL;
1516 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001517
1518 /* Do not allow reads past end of device */
William Juul52c07962007-10-31 13:53:06 +01001519 if (unlikely(from >= mtd->size ||
1520 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1521 (from >> chip->page_shift)) * len)) {
1522 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
1523 "Attempt read beyond end of device\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001524 return -EINVAL;
1525 }
1526
William Juul52c07962007-10-31 13:53:06 +01001527 chipnr = (int)(from >> chip->chip_shift);
1528 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001529
William Juul52c07962007-10-31 13:53:06 +01001530 /* Shift to get page */
1531 realpage = (int)(from >> chip->page_shift);
1532 page = realpage & chip->pagemask;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001533
William Juul52c07962007-10-31 13:53:06 +01001534 while(1) {
1535 sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001536
William Juul52c07962007-10-31 13:53:06 +01001537 len = min(len, readlen);
1538 buf = nand_transfer_oob(chip, buf, ops, len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001539
William Juul52c07962007-10-31 13:53:06 +01001540 if (!(chip->options & NAND_NO_READRDY)) {
1541 /*
1542 * Apply delay or wait for ready/busy pin. Do this
1543 * before the AUTOINCR check, so no problems arise if a
1544 * chip which does auto increment is marked as
1545 * NOAUTOINCR by the board driver.
1546 */
1547 if (!chip->dev_ready)
1548 udelay(chip->chip_delay);
1549 else
1550 nand_wait_ready(mtd);
1551 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001552
William Juul52c07962007-10-31 13:53:06 +01001553 readlen -= len;
1554 if (!readlen)
1555 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001556
William Juul52c07962007-10-31 13:53:06 +01001557 /* Increment page address */
1558 realpage++;
1559
1560 page = realpage & chip->pagemask;
1561 /* Check, if we cross a chip boundary */
1562 if (!page) {
1563 chipnr++;
1564 chip->select_chip(mtd, -1);
1565 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001566 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001567
William Juul52c07962007-10-31 13:53:06 +01001568 /* Check, if the chip supports auto page increment
1569 * or if we have hit a block boundary.
1570 */
1571 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
1572 sndcmd = 1;
1573 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001574
William Juul52c07962007-10-31 13:53:06 +01001575 ops->oobretlen = ops->ooblen;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001576 return 0;
1577}
1578
1579/**
William Juul52c07962007-10-31 13:53:06 +01001580 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001581 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001582 * @from: offset to read from
William Juul52c07962007-10-31 13:53:06 +01001583 * @ops: oob operation description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001584 *
William Juul52c07962007-10-31 13:53:06 +01001585 * NAND read data and/or out-of-band data
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001586 */
William Juul52c07962007-10-31 13:53:06 +01001587static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1588 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001589{
William Juul52c07962007-10-31 13:53:06 +01001590 struct nand_chip *chip = mtd->priv;
1591 int ret = -ENOTSUPP;
1592
1593 ops->retlen = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001594
1595 /* Do not allow reads past end of device */
William Juul52c07962007-10-31 13:53:06 +01001596 if (ops->datbuf && (from + ops->len) > mtd->size) {
1597 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
1598 "Attempt read beyond end of device\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001599 return -EINVAL;
1600 }
1601
William Juul52c07962007-10-31 13:53:06 +01001602 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001603
William Juul52c07962007-10-31 13:53:06 +01001604 switch(ops->mode) {
1605 case MTD_OOB_PLACE:
1606 case MTD_OOB_AUTO:
1607 case MTD_OOB_RAW:
1608 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001609
William Juul52c07962007-10-31 13:53:06 +01001610 default:
1611 goto out;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001612 }
1613
William Juul52c07962007-10-31 13:53:06 +01001614 if (!ops->datbuf)
1615 ret = nand_do_read_oob(mtd, from, ops);
1616 else
1617 ret = nand_do_read_ops(mtd, from, ops);
1618
1619 out:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001620 nand_release_device(mtd);
William Juul52c07962007-10-31 13:53:06 +01001621 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001622}
1623
1624
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001625/**
William Juul52c07962007-10-31 13:53:06 +01001626 * nand_write_page_raw - [Intern] raw page write function
1627 * @mtd: mtd info structure
1628 * @chip: nand chip info structure
1629 * @buf: data buffer
1630 */
1631static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1632 const uint8_t *buf)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001633{
William Juul52c07962007-10-31 13:53:06 +01001634 chip->write_buf(mtd, buf, mtd->writesize);
1635 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1636}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001637
William Juul52c07962007-10-31 13:53:06 +01001638/**
1639 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function
1640 * @mtd: mtd info structure
1641 * @chip: nand chip info structure
1642 * @buf: data buffer
1643 */
1644static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1645 const uint8_t *buf)
1646{
1647 int i, eccsize = chip->ecc.size;
1648 int eccbytes = chip->ecc.bytes;
1649 int eccsteps = chip->ecc.steps;
1650 uint8_t *ecc_calc = chip->buffers->ecccalc;
1651 const uint8_t *p = buf;
1652 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001653
William Juul52c07962007-10-31 13:53:06 +01001654 /* Software ecc calculation */
1655 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1656 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001657
William Juul52c07962007-10-31 13:53:06 +01001658 for (i = 0; i < chip->ecc.total; i++)
1659 chip->oob_poi[eccpos[i]] = ecc_calc[i];
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001660
William Juul52c07962007-10-31 13:53:06 +01001661 chip->ecc.write_page_raw(mtd, chip, buf);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001662}
1663
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001664/**
William Juul52c07962007-10-31 13:53:06 +01001665 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function
1666 * @mtd: mtd info structure
1667 * @chip: nand chip info structure
1668 * @buf: data buffer
1669 */
1670static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1671 const uint8_t *buf)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001672{
William Juul52c07962007-10-31 13:53:06 +01001673 int i, eccsize = chip->ecc.size;
1674 int eccbytes = chip->ecc.bytes;
1675 int eccsteps = chip->ecc.steps;
1676 uint8_t *ecc_calc = chip->buffers->ecccalc;
1677 const uint8_t *p = buf;
1678 uint32_t *eccpos = chip->ecc.layout->eccpos;
1679
1680 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1681 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1682 chip->write_buf(mtd, p, eccsize);
1683 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1684 }
1685
1686 for (i = 0; i < chip->ecc.total; i++)
1687 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1688
1689 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001690}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001691
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001692/**
William Juul52c07962007-10-31 13:53:06 +01001693 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write
1694 * @mtd: mtd info structure
1695 * @chip: nand chip info structure
1696 * @buf: data buffer
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001697 *
William Juul52c07962007-10-31 13:53:06 +01001698 * The hw generator calculates the error syndrome automatically. Therefor
1699 * we need a special oob layout and handling.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001700 */
William Juul52c07962007-10-31 13:53:06 +01001701static void nand_write_page_syndrome(struct mtd_info *mtd,
1702 struct nand_chip *chip, const uint8_t *buf)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001703{
William Juul52c07962007-10-31 13:53:06 +01001704 int i, eccsize = chip->ecc.size;
1705 int eccbytes = chip->ecc.bytes;
1706 int eccsteps = chip->ecc.steps;
1707 const uint8_t *p = buf;
1708 uint8_t *oob = chip->oob_poi;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001709
William Juul52c07962007-10-31 13:53:06 +01001710 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001711
William Juul52c07962007-10-31 13:53:06 +01001712 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1713 chip->write_buf(mtd, p, eccsize);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001714
William Juul52c07962007-10-31 13:53:06 +01001715 if (chip->ecc.prepad) {
1716 chip->write_buf(mtd, oob, chip->ecc.prepad);
1717 oob += chip->ecc.prepad;
1718 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001719
William Juul52c07962007-10-31 13:53:06 +01001720 chip->ecc.calculate(mtd, p, oob);
1721 chip->write_buf(mtd, oob, eccbytes);
1722 oob += eccbytes;
1723
1724 if (chip->ecc.postpad) {
1725 chip->write_buf(mtd, oob, chip->ecc.postpad);
1726 oob += chip->ecc.postpad;
1727 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001728 }
1729
William Juul52c07962007-10-31 13:53:06 +01001730 /* Calculate remaining oob bytes */
1731 i = mtd->oobsize - (oob - chip->oob_poi);
1732 if (i)
1733 chip->write_buf(mtd, oob, i);
1734}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001735
William Juul52c07962007-10-31 13:53:06 +01001736/**
1737 * nand_write_page - [REPLACEABLE] write one page
1738 * @mtd: MTD device structure
1739 * @chip: NAND chip descriptor
1740 * @buf: the data to write
1741 * @page: page number to write
1742 * @cached: cached programming
1743 * @raw: use _raw version of write_page
1744 */
1745static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
1746 const uint8_t *buf, int page, int cached, int raw)
1747{
1748 int status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001749
William Juul52c07962007-10-31 13:53:06 +01001750 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1751
1752 if (unlikely(raw))
1753 chip->ecc.write_page_raw(mtd, chip, buf);
1754 else
1755 chip->ecc.write_page(mtd, chip, buf);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001756
William Juul52c07962007-10-31 13:53:06 +01001757 /*
1758 * Cached progamming disabled for now, Not sure if its worth the
1759 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1760 */
1761 cached = 0;
1762
1763 if (!cached || !(chip->options & NAND_CACHEPRG)) {
1764
1765 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1766 status = chip->waitfunc(mtd, chip);
1767 /*
1768 * See if operation failed and additional status checks are
1769 * available
1770 */
1771 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
1772 status = chip->errstat(mtd, chip, FL_WRITING, status,
1773 page);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001774
William Juul52c07962007-10-31 13:53:06 +01001775 if (status & NAND_STATUS_FAIL)
1776 return -EIO;
1777 } else {
1778 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
1779 status = chip->waitfunc(mtd, chip);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001780 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001781
William Juul52c07962007-10-31 13:53:06 +01001782#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1783 /* Send command to read back the data */
1784 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001785
William Juul52c07962007-10-31 13:53:06 +01001786 if (chip->verify_buf(mtd, buf, mtd->writesize))
1787 return -EIO;
1788#endif
1789 return 0;
1790}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001791
William Juul52c07962007-10-31 13:53:06 +01001792/**
1793 * nand_fill_oob - [Internal] Transfer client buffer to oob
1794 * @chip: nand chip structure
1795 * @oob: oob data buffer
1796 * @ops: oob ops structure
1797 */
1798static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob,
1799 struct mtd_oob_ops *ops)
1800{
1801 size_t len = ops->ooblen;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001802
William Juul52c07962007-10-31 13:53:06 +01001803 switch(ops->mode) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001804
William Juul52c07962007-10-31 13:53:06 +01001805 case MTD_OOB_PLACE:
1806 case MTD_OOB_RAW:
1807 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
1808 return oob + len;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001809
William Juul52c07962007-10-31 13:53:06 +01001810 case MTD_OOB_AUTO: {
1811 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1812 uint32_t boffs = 0, woffs = ops->ooboffs;
1813 size_t bytes = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001814
William Juul52c07962007-10-31 13:53:06 +01001815 for(; free->length && len; free++, len -= bytes) {
1816 /* Write request not from offset 0 ? */
1817 if (unlikely(woffs)) {
1818 if (woffs >= free->length) {
1819 woffs -= free->length;
1820 continue;
1821 }
1822 boffs = free->offset + woffs;
1823 bytes = min_t(size_t, len,
1824 (free->length - woffs));
1825 woffs = 0;
1826 } else {
1827 bytes = min_t(size_t, len, free->length);
1828 boffs = free->offset;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001829 }
William Juul52c07962007-10-31 13:53:06 +01001830 memcpy(chip->oob_poi + boffs, oob, bytes);
1831 oob += bytes;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001832 }
William Juul52c07962007-10-31 13:53:06 +01001833 return oob;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001834 }
William Juul52c07962007-10-31 13:53:06 +01001835 default:
1836 BUG();
1837 }
1838 return NULL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001839}
1840
William Juul52c07962007-10-31 13:53:06 +01001841#define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001842
1843/**
William Juul52c07962007-10-31 13:53:06 +01001844 * nand_do_write_ops - [Internal] NAND write with ECC
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001845 * @mtd: MTD device structure
1846 * @to: offset to write to
William Juul52c07962007-10-31 13:53:06 +01001847 * @ops: oob operations description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001848 *
William Juul52c07962007-10-31 13:53:06 +01001849 * NAND write with ECC
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001850 */
William Juul52c07962007-10-31 13:53:06 +01001851static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
1852 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001853{
William Juul52c07962007-10-31 13:53:06 +01001854 int chipnr, realpage, page, blockmask, column;
1855 struct nand_chip *chip = mtd->priv;
1856 uint32_t writelen = ops->len;
1857 uint8_t *oob = ops->oobbuf;
1858 uint8_t *buf = ops->datbuf;
1859 int ret, subpage;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001860
William Juul52c07962007-10-31 13:53:06 +01001861 ops->retlen = 0;
1862 if (!writelen)
1863 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001864
William Juul52c07962007-10-31 13:53:06 +01001865 /* reject writes, which are not page aligned */
1866 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
1867 printk(KERN_NOTICE "nand_write: "
1868 "Attempt to write not page aligned data\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001869 return -EINVAL;
1870 }
1871
William Juul52c07962007-10-31 13:53:06 +01001872 column = to & (mtd->writesize - 1);
1873 subpage = column || (writelen & (mtd->writesize - 1));
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001874
William Juul52c07962007-10-31 13:53:06 +01001875 if (subpage && oob)
1876 return -EINVAL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001877
William Juul52c07962007-10-31 13:53:06 +01001878 chipnr = (int)(to >> chip->chip_shift);
1879 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001880
1881 /* Check, if it is write protected */
William Juul52c07962007-10-31 13:53:06 +01001882 if (nand_check_wp(mtd)) {
1883 printk (KERN_NOTICE "nand_do_write_ops: Device is write protected\n");
1884 return -EIO;
1885 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001886
William Juul52c07962007-10-31 13:53:06 +01001887 realpage = (int)(to >> chip->page_shift);
1888 page = realpage & chip->pagemask;
1889 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001890
William Juul52c07962007-10-31 13:53:06 +01001891 /* Invalidate the page cache, when we write to the cached page */
1892 if (to <= (chip->pagebuf << chip->page_shift) &&
1893 (chip->pagebuf << chip->page_shift) < (to + ops->len))
1894 chip->pagebuf = -1;
1895
1896 /* If we're not given explicit OOB data, let it be 0xFF */
1897 if (likely(!oob))
1898 memset(chip->oob_poi, 0xff, mtd->oobsize);
1899
1900 while(1) {
1901 int bytes = mtd->writesize;
1902 int cached = writelen > bytes && page != blockmask;
1903 uint8_t *wbuf = buf;
1904
1905 /* Partial page write ? */
1906 if (unlikely(column || writelen < (mtd->writesize - 1))) {
1907 cached = 0;
1908 bytes = min_t(int, bytes - column, (int) writelen);
1909 chip->pagebuf = -1;
1910 memset(chip->buffers->databuf, 0xff, mtd->writesize);
1911 memcpy(&chip->buffers->databuf[column], buf, bytes);
1912 wbuf = chip->buffers->databuf;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02001913 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001914
William Juul52c07962007-10-31 13:53:06 +01001915 if (unlikely(oob))
1916 oob = nand_fill_oob(chip, oob, ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001917
William Juul52c07962007-10-31 13:53:06 +01001918 ret = chip->write_page(mtd, chip, wbuf, page, cached,
1919 (ops->mode == MTD_OOB_RAW));
1920 if (ret)
1921 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001922
William Juul52c07962007-10-31 13:53:06 +01001923 writelen -= bytes;
1924 if (!writelen)
1925 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001926
William Juul52c07962007-10-31 13:53:06 +01001927 column = 0;
1928 buf += bytes;
1929 realpage++;
1930
1931 page = realpage & chip->pagemask;
1932 /* Check, if we cross a chip boundary */
1933 if (!page) {
1934 chipnr++;
1935 chip->select_chip(mtd, -1);
1936 chip->select_chip(mtd, chipnr);
1937 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001938 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001939
William Juul52c07962007-10-31 13:53:06 +01001940 ops->retlen = ops->len - writelen;
1941 if (unlikely(oob))
1942 ops->oobretlen = ops->ooblen;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001943 return ret;
1944}
1945
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001946/**
William Juul52c07962007-10-31 13:53:06 +01001947 * nand_write - [MTD Interface] NAND write with ECC
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001948 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001949 * @to: offset to write to
William Juul52c07962007-10-31 13:53:06 +01001950 * @len: number of bytes to write
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001951 * @retlen: pointer to variable to store the number of written bytes
William Juul52c07962007-10-31 13:53:06 +01001952 * @buf: the data to write
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001953 *
William Juul52c07962007-10-31 13:53:06 +01001954 * NAND write with ECC
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001955 */
William Juul52c07962007-10-31 13:53:06 +01001956static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
1957 size_t *retlen, const uint8_t *buf)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001958{
William Juul52c07962007-10-31 13:53:06 +01001959 struct nand_chip *chip = mtd->priv;
1960 int ret;
1961
1962 /* Do not allow reads past end of device */
1963 if ((to + len) > mtd->size)
1964 return -EINVAL;
1965 if (!len)
1966 return 0;
1967
1968 nand_get_device(chip, mtd, FL_WRITING);
1969
1970 chip->ops.len = len;
1971 chip->ops.datbuf = (uint8_t *)buf;
1972 chip->ops.oobbuf = NULL;
1973
1974 ret = nand_do_write_ops(mtd, to, &chip->ops);
1975
1976 *retlen = chip->ops.retlen;
1977
1978 nand_release_device(mtd);
1979
1980 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001981}
1982
1983/**
William Juul52c07962007-10-31 13:53:06 +01001984 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001985 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001986 * @to: offset to write to
William Juul52c07962007-10-31 13:53:06 +01001987 * @ops: oob operation description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001988 *
William Juul52c07962007-10-31 13:53:06 +01001989 * NAND write out-of-band
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001990 */
William Juul52c07962007-10-31 13:53:06 +01001991static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
1992 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001993{
William Juul52c07962007-10-31 13:53:06 +01001994 int chipnr, page, status, len;
1995 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001996
William Juul52c07962007-10-31 13:53:06 +01001997 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n",
1998 (unsigned int)to, (int)ops->ooblen);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001999
William Juul52c07962007-10-31 13:53:06 +01002000 if (ops->mode == MTD_OOB_AUTO)
2001 len = chip->ecc.layout->oobavail;
2002 else
2003 len = mtd->oobsize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002004
2005 /* Do not allow write past end of page */
William Juul52c07962007-10-31 13:53:06 +01002006 if ((ops->ooboffs + ops->ooblen) > len) {
2007 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: "
2008 "Attempt to write past end of page\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002009 return -EINVAL;
2010 }
2011
William Juul52c07962007-10-31 13:53:06 +01002012 if (unlikely(ops->ooboffs >= len)) {
2013 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
2014 "Attempt to start write outside oob\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002015 return -EINVAL;
2016 }
2017
William Juul52c07962007-10-31 13:53:06 +01002018 /* Do not allow reads past end of device */
2019 if (unlikely(to >= mtd->size ||
2020 ops->ooboffs + ops->ooblen >
2021 ((mtd->size >> chip->page_shift) -
2022 (to >> chip->page_shift)) * len)) {
2023 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
2024 "Attempt write beyond end of device\n");
2025 return -EINVAL;
2026 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002027
William Juul52c07962007-10-31 13:53:06 +01002028 chipnr = (int)(to >> chip->chip_shift);
2029 chip->select_chip(mtd, chipnr);
2030
2031 /* Shift to get page */
2032 page = (int)(to >> chip->page_shift);
2033
2034 /*
2035 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2036 * of my DiskOnChip 2000 test units) will clear the whole data page too
2037 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2038 * it in the doc2000 driver in August 1999. dwmw2.
2039 */
2040 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002041
2042 /* Check, if it is write protected */
2043 if (nand_check_wp(mtd))
William Juul52c07962007-10-31 13:53:06 +01002044 return -EROFS;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002045
William Juul52c07962007-10-31 13:53:06 +01002046 /* Invalidate the page cache, if we write to the cached page */
2047 if (page == chip->pagebuf)
2048 chip->pagebuf = -1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002049
William Juul52c07962007-10-31 13:53:06 +01002050 memset(chip->oob_poi, 0xff, mtd->oobsize);
2051 nand_fill_oob(chip, ops->oobbuf, ops);
2052 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
2053 memset(chip->oob_poi, 0xff, mtd->oobsize);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002054
William Juul52c07962007-10-31 13:53:06 +01002055 if (status)
2056 return status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002057
William Juul52c07962007-10-31 13:53:06 +01002058 ops->oobretlen = ops->ooblen;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002059
William Juul52c07962007-10-31 13:53:06 +01002060 return 0;
2061}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002062
William Juul52c07962007-10-31 13:53:06 +01002063/**
2064 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2065 * @mtd: MTD device structure
2066 * @to: offset to write to
2067 * @ops: oob operation description structure
2068 */
2069static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2070 struct mtd_oob_ops *ops)
2071{
2072 struct nand_chip *chip = mtd->priv;
2073 int ret = -ENOTSUPP;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002074
William Juul52c07962007-10-31 13:53:06 +01002075 ops->retlen = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002076
William Juul52c07962007-10-31 13:53:06 +01002077 /* Do not allow writes past end of device */
2078 if (ops->datbuf && (to + ops->len) > mtd->size) {
2079 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
2080 "Attempt read beyond end of device\n");
2081 return -EINVAL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002082 }
William Juul52c07962007-10-31 13:53:06 +01002083
2084 nand_get_device(chip, mtd, FL_WRITING);
2085
2086 switch(ops->mode) {
2087 case MTD_OOB_PLACE:
2088 case MTD_OOB_AUTO:
2089 case MTD_OOB_RAW:
2090 break;
2091
2092 default:
2093 goto out;
2094 }
2095
2096 if (!ops->datbuf)
2097 ret = nand_do_write_oob(mtd, to, ops);
2098 else
2099 ret = nand_do_write_ops(mtd, to, ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002100
William Juul52c07962007-10-31 13:53:06 +01002101 out:
2102 nand_release_device(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002103 return ret;
2104}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002105
2106/**
2107 * single_erease_cmd - [GENERIC] NAND standard block erase command function
2108 * @mtd: MTD device structure
2109 * @page: the page address of the block which will be erased
2110 *
2111 * Standard erase command for NAND chips
2112 */
William Juul52c07962007-10-31 13:53:06 +01002113static void single_erase_cmd(struct mtd_info *mtd, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002114{
William Juul52c07962007-10-31 13:53:06 +01002115 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002116 /* Send commands to erase a block */
William Juul52c07962007-10-31 13:53:06 +01002117 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2118 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002119}
2120
2121/**
2122 * multi_erease_cmd - [GENERIC] AND specific block erase command function
2123 * @mtd: MTD device structure
2124 * @page: the page address of the block which will be erased
2125 *
2126 * AND multi block erase command function
2127 * Erase 4 consecutive blocks
2128 */
William Juul52c07962007-10-31 13:53:06 +01002129static void multi_erase_cmd(struct mtd_info *mtd, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002130{
William Juul52c07962007-10-31 13:53:06 +01002131 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002132 /* Send commands to erase a block */
William Juul52c07962007-10-31 13:53:06 +01002133 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2134 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2135 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2136 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2137 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002138}
2139
2140/**
2141 * nand_erase - [MTD Interface] erase block(s)
2142 * @mtd: MTD device structure
2143 * @instr: erase instruction
2144 *
2145 * Erase one ore more blocks
2146 */
William Juul52c07962007-10-31 13:53:06 +01002147static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002148{
William Juul52c07962007-10-31 13:53:06 +01002149 return nand_erase_nand(mtd, instr, 0);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002150}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002151
William Juul52c07962007-10-31 13:53:06 +01002152#define BBT_PAGE_MASK 0xffffff3f
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002153/**
William Juul52c07962007-10-31 13:53:06 +01002154 * nand_erase_nand - [Internal] erase block(s)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002155 * @mtd: MTD device structure
2156 * @instr: erase instruction
2157 * @allowbbt: allow erasing the bbt area
2158 *
2159 * Erase one ore more blocks
2160 */
William Juul52c07962007-10-31 13:53:06 +01002161int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2162 int allowbbt)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002163{
2164 int page, len, status, pages_per_block, ret, chipnr;
William Juul52c07962007-10-31 13:53:06 +01002165 struct nand_chip *chip = mtd->priv;
Wolfgang Grandegger03025502009-01-16 18:55:54 +01002166 int rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS]={0};
William Juul52c07962007-10-31 13:53:06 +01002167 unsigned int bbt_masked_page = 0xffffffff;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002168
Scott Wooddf83c472008-06-20 12:38:57 -05002169 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n",
2170 (unsigned int) instr->addr, (unsigned int) instr->len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002171
2172 /* Start address must align on block boundary */
William Juul52c07962007-10-31 13:53:06 +01002173 if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) {
Scott Wooddf83c472008-06-20 12:38:57 -05002174 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002175 return -EINVAL;
2176 }
2177
2178 /* Length must align on block boundary */
William Juul52c07962007-10-31 13:53:06 +01002179 if (instr->len & ((1 << chip->phys_erase_shift) - 1)) {
Scott Wooddf83c472008-06-20 12:38:57 -05002180 MTDDEBUG (MTD_DEBUG_LEVEL0,
2181 "nand_erase: Length not block aligned\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002182 return -EINVAL;
2183 }
2184
2185 /* Do not allow erase past end of device */
2186 if ((instr->len + instr->addr) > mtd->size) {
Scott Wooddf83c472008-06-20 12:38:57 -05002187 MTDDEBUG (MTD_DEBUG_LEVEL0,
2188 "nand_erase: Erase past end of device\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002189 return -EINVAL;
2190 }
2191
2192 instr->fail_addr = 0xffffffff;
2193
2194 /* Grab the lock and see if the device is available */
William Juul52c07962007-10-31 13:53:06 +01002195 nand_get_device(chip, mtd, FL_ERASING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002196
2197 /* Shift to get first page */
William Juul52c07962007-10-31 13:53:06 +01002198 page = (int)(instr->addr >> chip->page_shift);
2199 chipnr = (int)(instr->addr >> chip->chip_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002200
2201 /* Calculate pages in each block */
William Juul52c07962007-10-31 13:53:06 +01002202 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
William Juulb76ec382007-11-08 10:39:53 +01002203
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002204 /* Select the NAND device */
William Juul52c07962007-10-31 13:53:06 +01002205 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002206
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002207 /* Check, if it is write protected */
2208 if (nand_check_wp(mtd)) {
Scott Wooddf83c472008-06-20 12:38:57 -05002209 MTDDEBUG (MTD_DEBUG_LEVEL0,
2210 "nand_erase: Device is write protected!!!\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002211 instr->state = MTD_ERASE_FAILED;
2212 goto erase_exit;
2213 }
2214
William Juul52c07962007-10-31 13:53:06 +01002215 /*
2216 * If BBT requires refresh, set the BBT page mask to see if the BBT
2217 * should be rewritten. Otherwise the mask is set to 0xffffffff which
2218 * can not be matched. This is also done when the bbt is actually
2219 * erased to avoid recusrsive updates
2220 */
2221 if (chip->options & BBT_AUTO_REFRESH && !allowbbt)
2222 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2223
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002224 /* Loop through the pages */
2225 len = instr->len;
2226
2227 instr->state = MTD_ERASING;
2228
2229 while (len) {
William Juul52c07962007-10-31 13:53:06 +01002230 /*
2231 * heck if we have a bad block, we do not erase bad blocks !
2232 */
2233 if (nand_block_checkbad(mtd, ((loff_t) page) <<
2234 chip->page_shift, 0, allowbbt)) {
2235 printk(KERN_WARNING "nand_erase: attempt to erase a "
2236 "bad block at page 0x%08x\n", page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002237 instr->state = MTD_ERASE_FAILED;
2238 goto erase_exit;
2239 }
William Juul52c07962007-10-31 13:53:06 +01002240
2241 /*
2242 * Invalidate the page cache, if we erase the block which
2243 * contains the current cached page
2244 */
2245 if (page <= chip->pagebuf && chip->pagebuf <
2246 (page + pages_per_block))
2247 chip->pagebuf = -1;
2248
2249 chip->erase_cmd(mtd, page & chip->pagemask);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002250
William Juul52c07962007-10-31 13:53:06 +01002251 status = chip->waitfunc(mtd, chip);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002252
William Juul52c07962007-10-31 13:53:06 +01002253 /*
2254 * See if operation failed and additional status checks are
2255 * available
2256 */
2257 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2258 status = chip->errstat(mtd, chip, FL_ERASING,
2259 status, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002260
2261 /* See if block erase succeeded */
William Juul52c07962007-10-31 13:53:06 +01002262 if (status & NAND_STATUS_FAIL) {
Scott Wooddf83c472008-06-20 12:38:57 -05002263 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase: "
2264 "Failed erase, page 0x%08x\n", page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002265 instr->state = MTD_ERASE_FAILED;
William Juul52c07962007-10-31 13:53:06 +01002266 instr->fail_addr = (page << chip->page_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002267 goto erase_exit;
2268 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002269
William Juul52c07962007-10-31 13:53:06 +01002270 /*
2271 * If BBT requires refresh, set the BBT rewrite flag to the
2272 * page being erased
2273 */
2274 if (bbt_masked_page != 0xffffffff &&
2275 (page & BBT_PAGE_MASK) == bbt_masked_page)
2276 rewrite_bbt[chipnr] = (page << chip->page_shift);
2277
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002278 /* Increment page address and decrement length */
William Juul52c07962007-10-31 13:53:06 +01002279 len -= (1 << chip->phys_erase_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002280 page += pages_per_block;
2281
2282 /* Check, if we cross a chip boundary */
William Juul52c07962007-10-31 13:53:06 +01002283 if (len && !(page & chip->pagemask)) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002284 chipnr++;
William Juul52c07962007-10-31 13:53:06 +01002285 chip->select_chip(mtd, -1);
2286 chip->select_chip(mtd, chipnr);
2287
2288 /*
2289 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2290 * page mask to see if this BBT should be rewritten
2291 */
2292 if (bbt_masked_page != 0xffffffff &&
2293 (chip->bbt_td->options & NAND_BBT_PERCHIP))
2294 bbt_masked_page = chip->bbt_td->pages[chipnr] &
2295 BBT_PAGE_MASK;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002296 }
2297 }
2298 instr->state = MTD_ERASE_DONE;
2299
William Juul52c07962007-10-31 13:53:06 +01002300 erase_exit:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002301
2302 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002303
2304 /* Deselect and wake up anyone waiting on the device */
2305 nand_release_device(mtd);
2306
Scott Wood3628f002008-10-24 16:20:43 -05002307 /* Do call back function */
2308 if (!ret)
2309 mtd_erase_callback(instr);
2310
William Juul52c07962007-10-31 13:53:06 +01002311 /*
2312 * If BBT requires refresh and erase was successful, rewrite any
2313 * selected bad block tables
2314 */
2315 if (bbt_masked_page == 0xffffffff || ret)
2316 return ret;
2317
2318 for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
2319 if (!rewrite_bbt[chipnr])
2320 continue;
2321 /* update the BBT for chip */
2322 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt "
2323 "(%d:0x%0x 0x%0x)\n", chipnr, rewrite_bbt[chipnr],
2324 chip->bbt_td->pages[chipnr]);
2325 nand_update_bbt(mtd, rewrite_bbt[chipnr]);
2326 }
2327
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002328 /* Return more or less happy */
2329 return ret;
2330}
2331
2332/**
2333 * nand_sync - [MTD Interface] sync
2334 * @mtd: MTD device structure
2335 *
2336 * Sync is actually a wait for chip ready function
2337 */
William Juul52c07962007-10-31 13:53:06 +01002338static void nand_sync(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002339{
William Juul52c07962007-10-31 13:53:06 +01002340 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002341
Scott Wooddf83c472008-06-20 12:38:57 -05002342 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002343
2344 /* Grab the lock and see if the device is available */
William Juul52c07962007-10-31 13:53:06 +01002345 nand_get_device(chip, mtd, FL_SYNCING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002346 /* Release it and go back */
William Juul52c07962007-10-31 13:53:06 +01002347 nand_release_device(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002348}
2349
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002350/**
William Juul52c07962007-10-31 13:53:06 +01002351 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002352 * @mtd: MTD device structure
William Juul52c07962007-10-31 13:53:06 +01002353 * @offs: offset relative to mtd start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002354 */
William Juul52c07962007-10-31 13:53:06 +01002355static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002356{
2357 /* Check for invalid offset */
William Juul52c07962007-10-31 13:53:06 +01002358 if (offs > mtd->size)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002359 return -EINVAL;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002360
William Juul52c07962007-10-31 13:53:06 +01002361 return nand_block_checkbad(mtd, offs, 1, 0);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002362}
2363
2364/**
William Juul52c07962007-10-31 13:53:06 +01002365 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002366 * @mtd: MTD device structure
2367 * @ofs: offset relative to mtd start
2368 */
William Juul52c07962007-10-31 13:53:06 +01002369static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002370{
William Juul52c07962007-10-31 13:53:06 +01002371 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002372 int ret;
2373
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002374 if ((ret = nand_block_isbad(mtd, ofs))) {
2375 /* If it was bad already, return success and do nothing. */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002376 if (ret > 0)
2377 return 0;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002378 return ret;
2379 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002380
William Juul52c07962007-10-31 13:53:06 +01002381 return chip->block_markbad(mtd, ofs);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002382}
2383
2384/**
William Juul52c07962007-10-31 13:53:06 +01002385 * nand_suspend - [MTD Interface] Suspend the NAND flash
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002386 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002387 */
William Juul52c07962007-10-31 13:53:06 +01002388static int nand_suspend(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002389{
William Juul52c07962007-10-31 13:53:06 +01002390 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002391
William Juul52c07962007-10-31 13:53:06 +01002392 return nand_get_device(chip, mtd, FL_PM_SUSPENDED);
2393}
2394
2395/**
2396 * nand_resume - [MTD Interface] Resume the NAND flash
2397 * @mtd: MTD device structure
2398 */
2399static void nand_resume(struct mtd_info *mtd)
2400{
2401 struct nand_chip *chip = mtd->priv;
2402
2403 if (chip->state == FL_PM_SUSPENDED)
2404 nand_release_device(mtd);
2405 else
2406 printk(KERN_ERR "nand_resume() called for a chip which is not "
2407 "in suspended state\n");
2408}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002409
William Juul52c07962007-10-31 13:53:06 +01002410/*
2411 * Set default functions
2412 */
2413static void nand_set_defaults(struct nand_chip *chip, int busw)
2414{
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002415 /* check for proper chip_delay setup, set 20us if not */
William Juul52c07962007-10-31 13:53:06 +01002416 if (!chip->chip_delay)
2417 chip->chip_delay = 20;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002418
2419 /* check, if a user supplied command function given */
William Juul52c07962007-10-31 13:53:06 +01002420 if (chip->cmdfunc == NULL)
2421 chip->cmdfunc = nand_command;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002422
2423 /* check, if a user supplied wait function given */
William Juul52c07962007-10-31 13:53:06 +01002424 if (chip->waitfunc == NULL)
2425 chip->waitfunc = nand_wait;
2426
2427 if (!chip->select_chip)
2428 chip->select_chip = nand_select_chip;
2429 if (!chip->read_byte)
2430 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2431 if (!chip->read_word)
2432 chip->read_word = nand_read_word;
2433 if (!chip->block_bad)
2434 chip->block_bad = nand_block_bad;
2435 if (!chip->block_markbad)
2436 chip->block_markbad = nand_default_block_markbad;
2437 if (!chip->write_buf)
2438 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2439 if (!chip->read_buf)
2440 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2441 if (!chip->verify_buf)
2442 chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2443 if (!chip->scan_bbt)
2444 chip->scan_bbt = nand_default_bbt;
2445
2446 if (!chip->controller) {
2447 chip->controller = &chip->hwcontrol;
2448
2449 /* XXX U-BOOT XXX */
2450#if 0
2451 spin_lock_init(&chip->controller->lock);
2452 init_waitqueue_head(&chip->controller->wq);
2453#endif
2454 }
2455
2456}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002457
William Juul52c07962007-10-31 13:53:06 +01002458/*
2459 * Get the flash and manufacturer id and lookup if the type is supported
2460 */
2461static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2462 struct nand_chip *chip,
2463 int busw, int *maf_id)
2464{
2465 struct nand_flash_dev *type = NULL;
2466 int i, dev_id, maf_idx;
Scott Wood3628f002008-10-24 16:20:43 -05002467 int tmp_id, tmp_manf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002468
2469 /* Select the device */
William Juul52c07962007-10-31 13:53:06 +01002470 chip->select_chip(mtd, 0);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002471
Karl Beldanb6322fc2008-09-15 16:08:03 +02002472 /*
2473 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
2474 * after power-up
2475 */
2476 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
2477
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002478 /* Send the command for reading device ID */
William Juul52c07962007-10-31 13:53:06 +01002479 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002480
2481 /* Read manufacturer and device IDs */
William Juul52c07962007-10-31 13:53:06 +01002482 *maf_id = chip->read_byte(mtd);
2483 dev_id = chip->read_byte(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002484
Scott Wood3628f002008-10-24 16:20:43 -05002485 /* Try again to make sure, as some systems the bus-hold or other
2486 * interface concerns can cause random data which looks like a
2487 * possibly credible NAND flash to appear. If the two results do
2488 * not match, ignore the device completely.
2489 */
2490
2491 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2492
2493 /* Read manufacturer and device IDs */
2494
2495 tmp_manf = chip->read_byte(mtd);
2496 tmp_id = chip->read_byte(mtd);
2497
2498 if (tmp_manf != *maf_id || tmp_id != dev_id) {
2499 printk(KERN_INFO "%s: second ID read did not match "
2500 "%02x,%02x against %02x,%02x\n", __func__,
2501 *maf_id, dev_id, tmp_manf, tmp_id);
2502 return ERR_PTR(-ENODEV);
2503 }
2504
William Juul52c07962007-10-31 13:53:06 +01002505 /* Lookup the flash id */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002506 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
William Juul52c07962007-10-31 13:53:06 +01002507 if (dev_id == nand_flash_ids[i].id) {
2508 type = &nand_flash_ids[i];
2509 break;
2510 }
2511 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002512
William Juul52c07962007-10-31 13:53:06 +01002513 if (!type)
2514 return ERR_PTR(-ENODEV);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002515
William Juul52c07962007-10-31 13:53:06 +01002516 if (!mtd->name)
2517 mtd->name = type->name;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002518
William Juul52c07962007-10-31 13:53:06 +01002519 chip->chipsize = type->chipsize << 20;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002520
William Juul52c07962007-10-31 13:53:06 +01002521 /* Newer devices have all the information in additional id bytes */
2522 if (!type->pagesize) {
2523 int extid;
2524 /* The 3rd id byte holds MLC / multichip data */
2525 chip->cellinfo = chip->read_byte(mtd);
2526 /* The 4th id byte is the important one */
2527 extid = chip->read_byte(mtd);
2528 /* Calc pagesize */
2529 mtd->writesize = 1024 << (extid & 0x3);
2530 extid >>= 2;
2531 /* Calc oobsize */
2532 mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9);
2533 extid >>= 2;
2534 /* Calc blocksize. Blocksize is multiples of 64KiB */
2535 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2536 extid >>= 2;
2537 /* Get buswidth information */
2538 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002539
William Juul52c07962007-10-31 13:53:06 +01002540 } else {
2541 /*
2542 * Old devices have chip data hardcoded in the device id table
2543 */
2544 mtd->erasesize = type->erasesize;
2545 mtd->writesize = type->pagesize;
2546 mtd->oobsize = mtd->writesize / 32;
2547 busw = type->options & NAND_BUSWIDTH_16;
2548 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002549
William Juul52c07962007-10-31 13:53:06 +01002550 /* Try to identify manufacturer */
2551 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
2552 if (nand_manuf_ids[maf_idx].id == *maf_id)
2553 break;
2554 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002555
William Juul52c07962007-10-31 13:53:06 +01002556 /*
2557 * Check, if buswidth is correct. Hardware drivers should set
2558 * chip correct !
2559 */
2560 if (busw != (chip->options & NAND_BUSWIDTH_16)) {
2561 printk(KERN_INFO "NAND device: Manufacturer ID:"
2562 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
2563 dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
2564 printk(KERN_WARNING "NAND bus width %d instead %d bit\n",
2565 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
2566 busw ? 16 : 8);
2567 return ERR_PTR(-EINVAL);
2568 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002569
William Juul52c07962007-10-31 13:53:06 +01002570 /* Calculate the address shift from the page size */
2571 chip->page_shift = ffs(mtd->writesize) - 1;
2572 /* Convert chipsize to number of pages per chip -1. */
2573 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002574
William Juul52c07962007-10-31 13:53:06 +01002575 chip->bbt_erase_shift = chip->phys_erase_shift =
2576 ffs(mtd->erasesize) - 1;
2577 chip->chip_shift = ffs(chip->chipsize) - 1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002578
William Juul52c07962007-10-31 13:53:06 +01002579 /* Set the bad block position */
2580 chip->badblockpos = mtd->writesize > 512 ?
2581 NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002582
William Juul52c07962007-10-31 13:53:06 +01002583 /* Get chip options, preserve non chip based options */
2584 chip->options &= ~NAND_CHIPOPTIONS_MSK;
2585 chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002586
William Juul52c07962007-10-31 13:53:06 +01002587 /*
2588 * Set chip as a default. Board drivers can override it, if necessary
2589 */
2590 chip->options |= NAND_NO_AUTOINCR;
2591
2592 /* Check if chip is a not a samsung device. Do not clear the
2593 * options for chips which are not having an extended id.
2594 */
2595 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
2596 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
2597
2598 /* Check for AND chips with 4 page planes */
2599 if (chip->options & NAND_4PAGE_ARRAY)
2600 chip->erase_cmd = multi_erase_cmd;
2601 else
2602 chip->erase_cmd = single_erase_cmd;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002603
William Juul52c07962007-10-31 13:53:06 +01002604 /* Do not replace user supplied command function ! */
2605 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
2606 chip->cmdfunc = nand_command_lp;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002607
Stefan Roese4fe71432008-01-10 18:47:33 +01002608 MTDDEBUG (MTD_DEBUG_LEVEL0, "NAND device: Manufacturer ID:"
2609 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id,
2610 nand_manuf_ids[maf_idx].name, type->name);
William Juul52c07962007-10-31 13:53:06 +01002611
2612 return type;
2613}
2614
2615/**
2616 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2617 * @mtd: MTD device structure
2618 * @maxchips: Number of chips to scan for
2619 *
2620 * This is the first phase of the normal nand_scan() function. It
2621 * reads the flash ID and sets up MTD fields accordingly.
2622 *
2623 * The mtd->owner field must be set to the module of the caller.
2624 */
2625int nand_scan_ident(struct mtd_info *mtd, int maxchips)
2626{
2627 int i, busw, nand_maf_id;
2628 struct nand_chip *chip = mtd->priv;
2629 struct nand_flash_dev *type;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002630
William Juul52c07962007-10-31 13:53:06 +01002631 /* Get buswidth to select the correct functions */
2632 busw = chip->options & NAND_BUSWIDTH_16;
2633 /* Set the default functions */
2634 nand_set_defaults(chip, busw);
2635
2636 /* Read the flash type */
2637 type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id);
2638
2639 if (IS_ERR(type)) {
Peter Tyserf96047a2009-02-04 13:39:40 -06002640#ifndef CONFIG_SYS_NAND_QUIET_TEST
William Juul52c07962007-10-31 13:53:06 +01002641 printk(KERN_WARNING "No NAND device found!!!\n");
Peter Tyserf96047a2009-02-04 13:39:40 -06002642#endif
William Juul52c07962007-10-31 13:53:06 +01002643 chip->select_chip(mtd, -1);
2644 return PTR_ERR(type);
2645 }
2646
2647 /* Check for a chip array */
2648 for (i = 1; i < maxchips; i++) {
2649 chip->select_chip(mtd, i);
Karl Beldanb6322fc2008-09-15 16:08:03 +02002650 /* See comment in nand_get_flash_type for reset */
2651 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
William Juul52c07962007-10-31 13:53:06 +01002652 /* Send the command for reading device ID */
2653 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002654 /* Read manufacturer and device IDs */
William Juul52c07962007-10-31 13:53:06 +01002655 if (nand_maf_id != chip->read_byte(mtd) ||
2656 type->id != chip->read_byte(mtd))
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002657 break;
2658 }
Wolfgang Grandeggerb325d7e2009-02-11 18:38:20 +01002659#ifdef DEBUG
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002660 if (i > 1)
2661 printk(KERN_INFO "%d NAND chips detected\n", i);
Wolfgang Grandeggerb325d7e2009-02-11 18:38:20 +01002662#endif
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002663
William Juul52c07962007-10-31 13:53:06 +01002664 /* Store the number of chips and calc total size for mtd */
2665 chip->numchips = i;
2666 mtd->size = i * chip->chipsize;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002667
William Juul52c07962007-10-31 13:53:06 +01002668 return 0;
2669}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002670
William Juul52c07962007-10-31 13:53:06 +01002671
2672/**
2673 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2674 * @mtd: MTD device structure
2675 * @maxchips: Number of chips to scan for
2676 *
2677 * This is the second phase of the normal nand_scan() function. It
2678 * fills out all the uninitialized function pointers with the defaults
2679 * and scans for a bad block table if appropriate.
2680 */
2681int nand_scan_tail(struct mtd_info *mtd)
2682{
2683 int i;
2684 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002685
William Juul52c07962007-10-31 13:53:06 +01002686 if (!(chip->options & NAND_OWN_BUFFERS))
2687 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
2688 if (!chip->buffers)
2689 return -ENOMEM;
2690
2691 /* Set the internal oob buffer location, just after the page data */
2692 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
2693
2694 /*
2695 * If no default placement scheme is given, select an appropriate one
2696 */
2697 if (!chip->ecc.layout) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002698 switch (mtd->oobsize) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002699 case 8:
William Juul52c07962007-10-31 13:53:06 +01002700 chip->ecc.layout = &nand_oob_8;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002701 break;
2702 case 16:
William Juul52c07962007-10-31 13:53:06 +01002703 chip->ecc.layout = &nand_oob_16;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002704 break;
2705 case 64:
William Juul52c07962007-10-31 13:53:06 +01002706 chip->ecc.layout = &nand_oob_64;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002707 break;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02002708 case 128:
William Juul52c07962007-10-31 13:53:06 +01002709 chip->ecc.layout = &nand_oob_128;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02002710 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002711 default:
William Juul52c07962007-10-31 13:53:06 +01002712 printk(KERN_WARNING "No oob scheme defined for "
2713 "oobsize %d\n", mtd->oobsize);
William Juul9e9c2c12007-11-09 13:32:30 +01002714/* BUG(); */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002715 }
2716 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002717
William Juul52c07962007-10-31 13:53:06 +01002718 if (!chip->write_page)
2719 chip->write_page = nand_write_page;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002720
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002721 /*
William Juul52c07962007-10-31 13:53:06 +01002722 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2723 * selected and we have 256 byte pagesize fallback to software ECC
2724 */
2725 if (!chip->ecc.read_page_raw)
2726 chip->ecc.read_page_raw = nand_read_page_raw;
2727 if (!chip->ecc.write_page_raw)
2728 chip->ecc.write_page_raw = nand_write_page_raw;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002729
William Juul52c07962007-10-31 13:53:06 +01002730 switch (chip->ecc.mode) {
2731 case NAND_ECC_HW:
2732 /* Use standard hwecc read page function ? */
2733 if (!chip->ecc.read_page)
2734 chip->ecc.read_page = nand_read_page_hwecc;
2735 if (!chip->ecc.write_page)
2736 chip->ecc.write_page = nand_write_page_hwecc;
2737 if (!chip->ecc.read_oob)
2738 chip->ecc.read_oob = nand_read_oob_std;
2739 if (!chip->ecc.write_oob)
2740 chip->ecc.write_oob = nand_write_oob_std;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002741
William Juul52c07962007-10-31 13:53:06 +01002742 case NAND_ECC_HW_SYNDROME:
Scott Wood5fd2c302008-03-18 15:29:14 -05002743 if ((!chip->ecc.calculate || !chip->ecc.correct ||
2744 !chip->ecc.hwctl) &&
2745 (!chip->ecc.read_page ||
2746 chip->ecc.read_page == nand_read_page_hwecc ||
2747 !chip->ecc.write_page ||
2748 chip->ecc.write_page == nand_write_page_hwecc)) {
William Juul52c07962007-10-31 13:53:06 +01002749 printk(KERN_WARNING "No ECC functions supplied, "
2750 "Hardware ECC not possible\n");
2751 BUG();
2752 }
2753 /* Use standard syndrome read/write page function ? */
2754 if (!chip->ecc.read_page)
2755 chip->ecc.read_page = nand_read_page_syndrome;
2756 if (!chip->ecc.write_page)
2757 chip->ecc.write_page = nand_write_page_syndrome;
2758 if (!chip->ecc.read_oob)
2759 chip->ecc.read_oob = nand_read_oob_syndrome;
2760 if (!chip->ecc.write_oob)
2761 chip->ecc.write_oob = nand_write_oob_syndrome;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002762
William Juul52c07962007-10-31 13:53:06 +01002763 if (mtd->writesize >= chip->ecc.size)
2764 break;
2765 printk(KERN_WARNING "%d byte HW ECC not possible on "
2766 "%d byte page size, fallback to SW ECC\n",
2767 chip->ecc.size, mtd->writesize);
2768 chip->ecc.mode = NAND_ECC_SOFT;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002769
William Juul52c07962007-10-31 13:53:06 +01002770 case NAND_ECC_SOFT:
2771 chip->ecc.calculate = nand_calculate_ecc;
2772 chip->ecc.correct = nand_correct_data;
2773 chip->ecc.read_page = nand_read_page_swecc;
Scott Wood3628f002008-10-24 16:20:43 -05002774 chip->ecc.read_subpage = nand_read_subpage;
William Juul52c07962007-10-31 13:53:06 +01002775 chip->ecc.write_page = nand_write_page_swecc;
2776 chip->ecc.read_oob = nand_read_oob_std;
2777 chip->ecc.write_oob = nand_write_oob_std;
2778 chip->ecc.size = 256;
2779 chip->ecc.bytes = 3;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002780 break;
2781
William Juul52c07962007-10-31 13:53:06 +01002782 case NAND_ECC_NONE:
2783 printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. "
2784 "This is not recommended !!\n");
2785 chip->ecc.read_page = nand_read_page_raw;
2786 chip->ecc.write_page = nand_write_page_raw;
2787 chip->ecc.read_oob = nand_read_oob_std;
2788 chip->ecc.write_oob = nand_write_oob_std;
2789 chip->ecc.size = mtd->writesize;
2790 chip->ecc.bytes = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002791 break;
2792
2793 default:
William Juul52c07962007-10-31 13:53:06 +01002794 printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n",
2795 chip->ecc.mode);
2796 BUG();
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002797 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002798
William Juul52c07962007-10-31 13:53:06 +01002799 /*
2800 * The number of bytes available for a client to place data into
2801 * the out of band area
2802 */
2803 chip->ecc.layout->oobavail = 0;
2804 for (i = 0; chip->ecc.layout->oobfree[i].length; i++)
2805 chip->ecc.layout->oobavail +=
2806 chip->ecc.layout->oobfree[i].length;
2807 mtd->oobavail = chip->ecc.layout->oobavail;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002808
William Juul52c07962007-10-31 13:53:06 +01002809 /*
2810 * Set the number of read / write steps for one page depending on ECC
2811 * mode
2812 */
2813 chip->ecc.steps = mtd->writesize / chip->ecc.size;
2814 if(chip->ecc.steps * chip->ecc.size != mtd->writesize) {
2815 printk(KERN_WARNING "Invalid ecc parameters\n");
2816 BUG();
2817 }
2818 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002819
William Juul52c07962007-10-31 13:53:06 +01002820 /*
2821 * Allow subpage writes up to ecc.steps. Not possible for MLC
2822 * FLASH.
2823 */
2824 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
2825 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
2826 switch(chip->ecc.steps) {
2827 case 2:
2828 mtd->subpage_sft = 1;
2829 break;
2830 case 4:
2831 case 8:
2832 mtd->subpage_sft = 2;
2833 break;
2834 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002835 }
William Juul52c07962007-10-31 13:53:06 +01002836 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002837
William Juul52c07962007-10-31 13:53:06 +01002838 /* Initialize state */
2839 chip->state = FL_READY;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002840
2841 /* De-select the device */
William Juul52c07962007-10-31 13:53:06 +01002842 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002843
2844 /* Invalidate the pagebuffer reference */
William Juul52c07962007-10-31 13:53:06 +01002845 chip->pagebuf = -1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002846
2847 /* Fill in remaining MTD driver data */
2848 mtd->type = MTD_NANDFLASH;
William Juul52c07962007-10-31 13:53:06 +01002849 mtd->flags = MTD_CAP_NANDFLASH;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002850 mtd->erase = nand_erase;
2851 mtd->point = NULL;
2852 mtd->unpoint = NULL;
2853 mtd->read = nand_read;
2854 mtd->write = nand_write;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002855 mtd->read_oob = nand_read_oob;
2856 mtd->write_oob = nand_write_oob;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002857 mtd->sync = nand_sync;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002858 mtd->lock = NULL;
2859 mtd->unlock = NULL;
William Juul52c07962007-10-31 13:53:06 +01002860 mtd->suspend = nand_suspend;
2861 mtd->resume = nand_resume;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002862 mtd->block_isbad = nand_block_isbad;
2863 mtd->block_markbad = nand_block_markbad;
2864
William Juul52c07962007-10-31 13:53:06 +01002865 /* propagate ecc.layout to mtd_info */
2866 mtd->ecclayout = chip->ecc.layout;
2867
2868 /* Check, if we should skip the bad block table scan */
2869 if (chip->options & NAND_SKIP_BBTSCAN)
Ilya Yanoka2d4dfe2008-06-30 15:34:40 +02002870 chip->options |= NAND_BBT_SCANNED;
William Juul52c07962007-10-31 13:53:06 +01002871
Ilya Yanoka2d4dfe2008-06-30 15:34:40 +02002872 return 0;
William Juul52c07962007-10-31 13:53:06 +01002873}
2874
2875/* module_text_address() isn't exported, and it's mostly a pointless
2876 test if this is a module _anyway_ -- they'd have to try _really_ hard
2877 to call us from in-kernel code if the core NAND support is modular. */
2878#ifdef MODULE
2879#define caller_is_module() (1)
2880#else
2881#define caller_is_module() \
2882 module_text_address((unsigned long)__builtin_return_address(0))
2883#endif
2884
2885/**
2886 * nand_scan - [NAND Interface] Scan for the NAND device
2887 * @mtd: MTD device structure
2888 * @maxchips: Number of chips to scan for
2889 *
2890 * This fills out all the uninitialized function pointers
2891 * with the defaults.
2892 * The flash ID is read and the mtd/chip structures are
2893 * filled with the appropriate values.
2894 * The mtd->owner field must be set to the module of the caller
2895 *
2896 */
2897int nand_scan(struct mtd_info *mtd, int maxchips)
2898{
2899 int ret;
2900
2901 /* Many callers got this wrong, so check for it for a while... */
2902 /* XXX U-BOOT XXX */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002903#if 0
William Juul52c07962007-10-31 13:53:06 +01002904 if (!mtd->owner && caller_is_module()) {
2905 printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n");
2906 BUG();
2907 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002908#endif
William Juulb76ec382007-11-08 10:39:53 +01002909
William Juul52c07962007-10-31 13:53:06 +01002910 ret = nand_scan_ident(mtd, maxchips);
2911 if (!ret)
2912 ret = nand_scan_tail(mtd);
2913 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002914}
2915
2916/**
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002917 * nand_release - [NAND Interface] Free resources held by the NAND device
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002918 * @mtd: MTD device structure
William Juul52c07962007-10-31 13:53:06 +01002919*/
2920void nand_release(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002921{
William Juul52c07962007-10-31 13:53:06 +01002922 struct nand_chip *chip = mtd->priv;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002923
2924#ifdef CONFIG_MTD_PARTITIONS
2925 /* Deregister partitions */
William Juul52c07962007-10-31 13:53:06 +01002926 del_mtd_partitions(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002927#endif
2928 /* Deregister the device */
William Juul52c07962007-10-31 13:53:06 +01002929 /* XXX U-BOOT XXX */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002930#if 0
William Juul52c07962007-10-31 13:53:06 +01002931 del_mtd_device(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002932#endif
William Juul52c07962007-10-31 13:53:06 +01002933
2934 /* Free bad block table memory */
2935 kfree(chip->bbt);
2936 if (!(chip->options & NAND_OWN_BUFFERS))
2937 kfree(chip->buffers);
2938}
2939
2940/* XXX U-BOOT XXX */
2941#if 0
2942EXPORT_SYMBOL_GPL(nand_scan);
2943EXPORT_SYMBOL_GPL(nand_scan_ident);
2944EXPORT_SYMBOL_GPL(nand_scan_tail);
2945EXPORT_SYMBOL_GPL(nand_release);
2946
2947static int __init nand_base_init(void)
2948{
2949 led_trigger_register_simple("nand-disk", &nand_led_trigger);
2950 return 0;
2951}
2952
2953static void __exit nand_base_exit(void)
2954{
2955 led_trigger_unregister_simple(nand_led_trigger);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002956}
2957
William Juul52c07962007-10-31 13:53:06 +01002958module_init(nand_base_init);
2959module_exit(nand_base_exit);
2960
2961MODULE_LICENSE("GPL");
2962MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2963MODULE_DESCRIPTION("Generic NAND flash driver code");
2964#endif