blob: f6972af7963d61e350e83d4061291165a9cfc66f [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glass40ffb682015-01-27 22:13:31 -07002/*
3 * Copyright (c) 2015, Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 * All rights reserved.
Simon Glass40ffb682015-01-27 22:13:31 -07006 */
7
Stefan Roeseb0ff2c12016-07-18 12:51:39 +02008#include <dm.h>
Samuel Holland386d1282021-07-05 13:29:02 +01009#include <dm/device_compat.h>
Simon Glass97589732020-05-10 11:40:02 -060010#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060011#include <log.h>
Simon Glass40ffb682015-01-27 22:13:31 -070012#include <pci.h>
Samuel Holland386d1282021-07-05 13:29:02 +010013#include <reset.h>
Simon Glass40ffb682015-01-27 22:13:31 -070014#include <usb.h>
Jean-Jacques Hiblotad4142b2019-09-11 11:33:46 +020015#include <usb/xhci.h>
Simon Glass40ffb682015-01-27 22:13:31 -070016
Samuel Holland386d1282021-07-05 13:29:02 +010017struct xhci_pci_plat {
18 struct reset_ctl reset;
19};
20
Pali Rohárde1627b2021-01-18 12:30:04 +010021static int xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
22 struct xhci_hcor **ret_hcor)
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020023{
24 struct xhci_hccr *hccr;
25 struct xhci_hcor *hcor;
26 u32 cmd;
27
28 hccr = (struct xhci_hccr *)dm_pci_map_bar(dev,
Andrew Scull6520c822022-04-21 16:11:13 +000029 PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE,
30 PCI_REGION_MEM);
Pali Rohárde1627b2021-01-18 12:30:04 +010031 if (!hccr) {
32 printf("xhci-pci init cannot map PCI mem bar\n");
33 return -EIO;
34 }
35
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020036 hcor = (struct xhci_hcor *)((uintptr_t) hccr +
37 HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
38
Bin Meng7380f7a2018-06-03 19:04:14 -070039 debug("XHCI-PCI init hccr %p and hcor %p hc_length %d\n",
40 hccr, hcor, (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020041
42 *ret_hccr = hccr;
43 *ret_hcor = hcor;
44
45 /* enable busmaster */
46 dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
47 cmd |= PCI_COMMAND_MASTER;
48 dm_pci_write_config32(dev, PCI_COMMAND, cmd);
Pali Rohárde1627b2021-01-18 12:30:04 +010049 return 0;
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020050}
51
52static int xhci_pci_probe(struct udevice *dev)
53{
Samuel Holland386d1282021-07-05 13:29:02 +010054 struct xhci_pci_plat *plat = dev_get_plat(dev);
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020055 struct xhci_hccr *hccr;
56 struct xhci_hcor *hcor;
Pali Rohárde1627b2021-01-18 12:30:04 +010057 int ret;
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020058
Samuel Holland386d1282021-07-05 13:29:02 +010059 ret = reset_get_by_index(dev, 0, &plat->reset);
60 if (ret && ret != -ENOENT && ret != -ENOTSUPP) {
61 dev_err(dev, "failed to get reset\n");
62 return ret;
63 }
64
65 if (reset_valid(&plat->reset)) {
66 ret = reset_assert(&plat->reset);
67 if (ret)
68 goto err_reset;
69
70 ret = reset_deassert(&plat->reset);
71 if (ret)
72 goto err_reset;
73 }
74
Pali Rohárde1627b2021-01-18 12:30:04 +010075 ret = xhci_pci_init(dev, &hccr, &hcor);
76 if (ret)
Samuel Holland386d1282021-07-05 13:29:02 +010077 goto err_reset;
78
79 ret = xhci_register(dev, hccr, hcor);
80 if (ret)
81 goto err_reset;
82
83 return 0;
84
85err_reset:
86 if (reset_valid(&plat->reset))
87 reset_free(&plat->reset);
88
89 return ret;
90}
91
92static int xhci_pci_remove(struct udevice *dev)
93{
94 struct xhci_pci_plat *plat = dev_get_plat(dev);
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020095
Samuel Holland386d1282021-07-05 13:29:02 +010096 xhci_deregister(dev);
97 if (reset_valid(&plat->reset))
98 reset_free(&plat->reset);
99
100 return 0;
Stefan Roeseb0ff2c12016-07-18 12:51:39 +0200101}
102
Stefan Roeseb0ff2c12016-07-18 12:51:39 +0200103static const struct udevice_id xhci_pci_ids[] = {
104 { .compatible = "xhci-pci" },
105 { }
106};
107
108U_BOOT_DRIVER(xhci_pci) = {
109 .name = "xhci_pci",
110 .id = UCLASS_USB,
111 .probe = xhci_pci_probe,
Samuel Holland386d1282021-07-05 13:29:02 +0100112 .remove = xhci_pci_remove,
Stefan Roeseb0ff2c12016-07-18 12:51:39 +0200113 .of_match = xhci_pci_ids,
114 .ops = &xhci_usb_ops,
Samuel Holland386d1282021-07-05 13:29:02 +0100115 .plat_auto = sizeof(struct xhci_pci_plat),
Simon Glass8a2b47f2020-12-03 16:55:17 -0700116 .priv_auto = sizeof(struct xhci_ctrl),
Nicolas Saenz Julienne96316252021-01-14 16:49:00 +0100117 .flags = DM_FLAG_OS_PREPARE | DM_FLAG_ALLOC_PRIV_DMA,
Stefan Roeseb0ff2c12016-07-18 12:51:39 +0200118};
119
120static struct pci_device_id xhci_pci_supported[] = {
121 { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) },
122 {},
123};
124
125U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported);