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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Keerthyffed0ea2016-09-30 09:20:44 +05302/*
3 * (C) Copyright 2016
4 * Texas Instruments Incorporated, <www.ti.com>
5 *
6 * Keerthy <j-keerthy@ti.com>
Keerthyffed0ea2016-09-30 09:20:44 +05307 */
8
Keerthyffed0ea2016-09-30 09:20:44 +05309#include <fdtdec.h>
10#include <errno.h>
11#include <dm.h>
Keerthyffed0ea2016-09-30 09:20:44 +053012#include <power/pmic.h>
13#include <power/regulator.h>
14#include <power/palmas.h>
15
Keerthyffed0ea2016-09-30 09:20:44 +053016#define REGULATOR_ON 0x1
17#define REGULATOR_OFF 0x0
18
19#define SMPS_MODE_MASK 0x3
20#define SMPS_MODE_SHIFT 0x0
21#define LDO_MODE_MASK 0x1
22#define LDO_MODE_SHIFT 0x0
23
24static const char palmas_smps_ctrl[][PALMAS_SMPS_NUM] = {
25 {0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c},
26 {0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38},
27 {0x20, 0x24, 0x2c, 0x30, 0x38},
28};
29
30static const char palmas_smps_volt[][PALMAS_SMPS_NUM] = {
31 {0x23, 0x27, 0x2b, 0x2f, 0x33, 0x37, 0x3b, 0x3c},
32 {0x23, 0x27, 0x2b, 0x2f, 0x33, 0x37, 0x3b},
33 {0x23, 0x27, 0x2f, 0x33, 0x3B}
34};
35
36static const char palmas_ldo_ctrl[][PALMAS_LDO_NUM] = {
37 {0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e, 0x60, 0x62, 0x64},
38 {0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e, 0x60, 0x62, 0x64},
39 {0x50, 0x52, 0x54, 0x5e, 0x62}
40};
41
42static const char palmas_ldo_volt[][PALMAS_LDO_NUM] = {
43 {0x51, 0x53, 0x55, 0x57, 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65},
44 {0x51, 0x53, 0x55, 0x57, 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65},
45 {0x51, 0x53, 0x55, 0x5f, 0x63}
46};
47
48static int palmas_smps_enable(struct udevice *dev, int op, bool *enable)
49{
50 int ret;
51 unsigned int adr;
Simon Glass71fa5b42020-12-03 16:55:18 -070052 struct dm_regulator_uclass_plat *uc_pdata;
Keerthyffed0ea2016-09-30 09:20:44 +053053
Simon Glass71fa5b42020-12-03 16:55:18 -070054 uc_pdata = dev_get_uclass_plat(dev);
Keerthyffed0ea2016-09-30 09:20:44 +053055 adr = uc_pdata->ctrl_reg;
56
57 ret = pmic_reg_read(dev->parent, adr);
58 if (ret < 0)
59 return ret;
60
61 if (op == PMIC_OP_GET) {
62 ret &= PALMAS_SMPS_STATUS_MASK;
63
64 if (ret)
65 *enable = true;
66 else
67 *enable = false;
68
69 return 0;
70 } else if (op == PMIC_OP_SET) {
71 if (*enable)
72 ret |= PALMAS_SMPS_MODE_MASK;
73 else
74 ret &= ~(PALMAS_SMPS_MODE_MASK);
75
76 ret = pmic_reg_write(dev->parent, adr, ret);
77 if (ret)
78 return ret;
79 }
80
81 return 0;
82}
83
84static int palmas_smps_volt2hex(int uV)
85{
86 if (uV > PALMAS_LDO_VOLT_MAX)
87 return -EINVAL;
88
89 if (uV > 1650000)
90 return (uV - 1000000) / 20000 + 0x6;
91
92 if (uV == 500000)
93 return 0x6;
94 else
95 return 0x6 + ((uV - 500000) / 10000);
96}
97
98static int palmas_smps_hex2volt(int hex, bool range)
99{
100 unsigned int uV = 0;
101
102 if (hex > PALMAS_SMPS_VOLT_MAX_HEX)
103 return -EINVAL;
104
105 if (hex < 0x7)
106 uV = 500000;
107 else
108 uV = 500000 + (hex - 0x6) * 10000;
109
110 if (range)
111 uV *= 2;
112
113 return uV;
114}
115
116static int palmas_smps_val(struct udevice *dev, int op, int *uV)
117{
118 unsigned int hex, adr;
119 int ret;
120 bool range;
Simon Glass71fa5b42020-12-03 16:55:18 -0700121 struct dm_regulator_uclass_plat *uc_pdata;
Keerthyffed0ea2016-09-30 09:20:44 +0530122
Simon Glass71fa5b42020-12-03 16:55:18 -0700123 uc_pdata = dev_get_uclass_plat(dev);
Keerthyffed0ea2016-09-30 09:20:44 +0530124
125 if (op == PMIC_OP_GET)
126 *uV = 0;
127
128 adr = uc_pdata->volt_reg;
129
130 ret = pmic_reg_read(dev->parent, adr);
131 if (ret < 0)
132 return ret;
133
134 if (op == PMIC_OP_GET) {
135 if (ret & PALMAS_SMPS_RANGE_MASK)
136 range = true;
137 else
138 range = false;
139
140 ret &= PALMAS_SMPS_VOLT_MASK;
141 ret = palmas_smps_hex2volt(ret, range);
142 if (ret < 0)
143 return ret;
144 *uV = ret;
145
146 return 0;
147 }
148
149 hex = palmas_smps_volt2hex(*uV);
150 if (hex < 0)
151 return hex;
152
153 ret &= ~PALMAS_SMPS_VOLT_MASK;
154 ret |= hex;
155 if (*uV > 1650000)
156 ret |= PALMAS_SMPS_RANGE_MASK;
157
158 return pmic_reg_write(dev->parent, adr, ret);
159}
160
Jean-Jacques Hiblot91827412017-07-12 11:42:47 +0200161static int palmas_ldo_bypass_enable(struct udevice *dev, bool enabled)
162{
163 int type = dev_get_driver_data(dev_get_parent(dev));
Simon Glass71fa5b42020-12-03 16:55:18 -0700164 struct dm_regulator_uclass_plat *p;
Jean-Jacques Hiblot91827412017-07-12 11:42:47 +0200165 unsigned int adr;
166 int reg;
167
168 if (type == TPS65917) {
169 /* bypass available only on LDO1 and LDO2 */
170 if (dev->driver_data > 2)
171 return -ENOTSUPP;
172 } else if (type == TPS659038) {
173 /* bypass available only on LDO9 */
174 if (dev->driver_data != 9)
175 return -ENOTSUPP;
176 }
177
Simon Glass71fa5b42020-12-03 16:55:18 -0700178 p = dev_get_uclass_plat(dev);
Jean-Jacques Hiblot91827412017-07-12 11:42:47 +0200179 adr = p->ctrl_reg;
180
181 reg = pmic_reg_read(dev->parent, adr);
182 if (reg < 0)
183 return reg;
184
185 if (enabled)
186 reg |= PALMAS_LDO_BYPASS_EN;
187 else
188 reg &= ~PALMAS_LDO_BYPASS_EN;
189
190 return pmic_reg_write(dev->parent, adr, reg);
191}
192
Keerthyffed0ea2016-09-30 09:20:44 +0530193static int palmas_ldo_enable(struct udevice *dev, int op, bool *enable)
194{
195 int ret;
196 unsigned int adr;
Simon Glass71fa5b42020-12-03 16:55:18 -0700197 struct dm_regulator_uclass_plat *uc_pdata;
Keerthyffed0ea2016-09-30 09:20:44 +0530198
Simon Glass71fa5b42020-12-03 16:55:18 -0700199 uc_pdata = dev_get_uclass_plat(dev);
Keerthyffed0ea2016-09-30 09:20:44 +0530200 adr = uc_pdata->ctrl_reg;
201
202 ret = pmic_reg_read(dev->parent, adr);
203 if (ret < 0)
204 return ret;
205
206 if (op == PMIC_OP_GET) {
207 ret &= PALMAS_LDO_STATUS_MASK;
208
209 if (ret)
210 *enable = true;
211 else
212 *enable = false;
213
214 return 0;
215 } else if (op == PMIC_OP_SET) {
216 if (*enable)
217 ret |= PALMAS_LDO_MODE_MASK;
218 else
219 ret &= ~(PALMAS_LDO_MODE_MASK);
220
221 ret = pmic_reg_write(dev->parent, adr, ret);
222 if (ret)
223 return ret;
Jean-Jacques Hiblot91827412017-07-12 11:42:47 +0200224
225 ret = palmas_ldo_bypass_enable(dev, false);
226 if (ret && (ret != -ENOTSUPP))
227 return ret;
Keerthyffed0ea2016-09-30 09:20:44 +0530228 }
229
230 return 0;
231}
232
233static int palmas_ldo_volt2hex(int uV)
234{
235 if (uV > PALMAS_LDO_VOLT_MAX)
236 return -EINVAL;
237
238 return (uV - 850000) / 50000;
239}
240
241static int palmas_ldo_hex2volt(int hex)
242{
243 if (hex > PALMAS_LDO_VOLT_MAX_HEX)
244 return -EINVAL;
245
246 if (!hex)
247 return 0;
248
249 return (hex * 50000) + 850000;
250}
251
252static int palmas_ldo_val(struct udevice *dev, int op, int *uV)
253{
254 unsigned int hex, adr;
255 int ret;
256
Simon Glass71fa5b42020-12-03 16:55:18 -0700257 struct dm_regulator_uclass_plat *uc_pdata;
Keerthyffed0ea2016-09-30 09:20:44 +0530258
259 if (op == PMIC_OP_GET)
260 *uV = 0;
261
Simon Glass71fa5b42020-12-03 16:55:18 -0700262 uc_pdata = dev_get_uclass_plat(dev);
Keerthyffed0ea2016-09-30 09:20:44 +0530263
264 adr = uc_pdata->volt_reg;
265
266 ret = pmic_reg_read(dev->parent, adr);
267 if (ret < 0)
268 return ret;
269
270 if (op == PMIC_OP_GET) {
271 ret &= PALMAS_LDO_VOLT_MASK;
272 ret = palmas_ldo_hex2volt(ret);
273 if (ret < 0)
274 return ret;
275 *uV = ret;
276 return 0;
277 }
278
279 hex = palmas_ldo_volt2hex(*uV);
280 if (hex < 0)
281 return hex;
282
283 ret &= ~PALMAS_LDO_VOLT_MASK;
284 ret |= hex;
285 if (*uV > 1650000)
286 ret |= 0x80;
287
288 return pmic_reg_write(dev->parent, adr, ret);
289}
290
291static int palmas_ldo_probe(struct udevice *dev)
292{
Simon Glass71fa5b42020-12-03 16:55:18 -0700293 struct dm_regulator_uclass_plat *uc_pdata;
Keerthyffed0ea2016-09-30 09:20:44 +0530294 struct udevice *parent;
295
Simon Glass71fa5b42020-12-03 16:55:18 -0700296 uc_pdata = dev_get_uclass_plat(dev);
Keerthyffed0ea2016-09-30 09:20:44 +0530297
298 parent = dev_get_parent(dev);
299 int type = dev_get_driver_data(parent);
300
301 uc_pdata->type = REGULATOR_TYPE_LDO;
302
Svyatoslav Ryhel4e0d2932023-10-27 11:26:09 +0300303 /* check for ldoln and ldousb cases */
304 if (!strcmp("ldoln", dev->name)) {
305 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][9];
306 uc_pdata->volt_reg = palmas_ldo_volt[type][9];
307 return 0;
308 }
309
310 if (!strcmp("ldousb", dev->name)) {
311 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][10];
312 uc_pdata->volt_reg = palmas_ldo_volt[type][10];
313 return 0;
314 }
315
316 if (dev->driver_data > 0) {
Keerthyffed0ea2016-09-30 09:20:44 +0530317 u8 idx = dev->driver_data - 1;
318 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][idx];
319 uc_pdata->volt_reg = palmas_ldo_volt[type][idx];
Keerthyffed0ea2016-09-30 09:20:44 +0530320 }
321
322 return 0;
323}
324
325static int ldo_get_value(struct udevice *dev)
326{
327 int uV;
328 int ret;
329
330 ret = palmas_ldo_val(dev, PMIC_OP_GET, &uV);
331 if (ret)
332 return ret;
333
334 return uV;
335}
336
337static int ldo_set_value(struct udevice *dev, int uV)
338{
339 return palmas_ldo_val(dev, PMIC_OP_SET, &uV);
340}
341
Keerthye8de8912017-06-13 09:53:49 +0530342static int ldo_get_enable(struct udevice *dev)
Keerthyffed0ea2016-09-30 09:20:44 +0530343{
344 bool enable = false;
345 int ret;
346
347 ret = palmas_ldo_enable(dev, PMIC_OP_GET, &enable);
348 if (ret)
349 return ret;
350
351 return enable;
352}
353
354static int ldo_set_enable(struct udevice *dev, bool enable)
355{
356 return palmas_ldo_enable(dev, PMIC_OP_SET, &enable);
357}
358
359static int palmas_smps_probe(struct udevice *dev)
360{
Simon Glass71fa5b42020-12-03 16:55:18 -0700361 struct dm_regulator_uclass_plat *uc_pdata;
Keerthyffed0ea2016-09-30 09:20:44 +0530362 struct udevice *parent;
363 int idx;
364
Simon Glass71fa5b42020-12-03 16:55:18 -0700365 uc_pdata = dev_get_uclass_plat(dev);
Keerthyffed0ea2016-09-30 09:20:44 +0530366
367 parent = dev_get_parent(dev);
368 int type = dev_get_driver_data(parent);
369
370 uc_pdata->type = REGULATOR_TYPE_BUCK;
371
372 switch (type) {
373 case PALMAS:
374 case TPS659038:
375 switch (dev->driver_data) {
376 case 123:
377 case 12:
378 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][0];
379 uc_pdata->volt_reg = palmas_smps_volt[type][0];
380 break;
381 case 3:
382 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][1];
383 uc_pdata->volt_reg = palmas_smps_volt[type][1];
384 break;
385 case 45:
386 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][2];
387 uc_pdata->volt_reg = palmas_smps_volt[type][2];
388 break;
389 case 6:
390 case 7:
391 case 8:
392 case 9:
393 case 10:
Keerthyc89f7ce2017-02-03 17:04:08 +0530394 idx = dev->driver_data - 3;
Keerthyffed0ea2016-09-30 09:20:44 +0530395 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx];
396 uc_pdata->volt_reg = palmas_smps_volt[type][idx];
397 break;
398
399 default:
400 printf("Wrong ID for regulator\n");
401 }
402 break;
403
404 case TPS65917:
405 switch (dev->driver_data) {
406 case 1:
407 case 2:
408 case 3:
409 case 4:
410 case 5:
411 idx = dev->driver_data - 1;
412 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx];
413 uc_pdata->volt_reg = palmas_smps_volt[type][idx];
414 break;
Keerthy879cbd02017-06-02 10:51:51 +0530415 case 12:
416 idx = 0;
417 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx];
418 uc_pdata->volt_reg = palmas_smps_volt[type][idx];
419 break;
Keerthyffed0ea2016-09-30 09:20:44 +0530420 default:
421 printf("Wrong ID for regulator\n");
422 }
423 break;
424
425 default:
426 printf("Invalid PMIC ID\n");
427 }
428
429 return 0;
430}
431
432static int smps_get_value(struct udevice *dev)
433{
434 int uV;
435 int ret;
436
437 ret = palmas_smps_val(dev, PMIC_OP_GET, &uV);
438 if (ret)
439 return ret;
440
441 return uV;
442}
443
444static int smps_set_value(struct udevice *dev, int uV)
445{
446 return palmas_smps_val(dev, PMIC_OP_SET, &uV);
447}
448
Keerthye8de8912017-06-13 09:53:49 +0530449static int smps_get_enable(struct udevice *dev)
Keerthyffed0ea2016-09-30 09:20:44 +0530450{
451 bool enable = false;
452 int ret;
453
454 ret = palmas_smps_enable(dev, PMIC_OP_GET, &enable);
455 if (ret)
456 return ret;
457
458 return enable;
459}
460
461static int smps_set_enable(struct udevice *dev, bool enable)
462{
463 return palmas_smps_enable(dev, PMIC_OP_SET, &enable);
464}
465
466static const struct dm_regulator_ops palmas_ldo_ops = {
467 .get_value = ldo_get_value,
468 .set_value = ldo_set_value,
469 .get_enable = ldo_get_enable,
470 .set_enable = ldo_set_enable,
471};
472
473U_BOOT_DRIVER(palmas_ldo) = {
474 .name = PALMAS_LDO_DRIVER,
475 .id = UCLASS_REGULATOR,
476 .ops = &palmas_ldo_ops,
477 .probe = palmas_ldo_probe,
478};
479
480static const struct dm_regulator_ops palmas_smps_ops = {
481 .get_value = smps_get_value,
482 .set_value = smps_set_value,
483 .get_enable = smps_get_enable,
484 .set_enable = smps_set_enable,
485};
486
487U_BOOT_DRIVER(palmas_smps) = {
488 .name = PALMAS_SMPS_DRIVER,
489 .id = UCLASS_REGULATOR,
490 .ops = &palmas_smps_ops,
491 .probe = palmas_smps_probe,
492};