blob: 18b95caffeffdccef76410bfcc78da23efc00ab6 [file] [log] [blame]
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001/*
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002 * Overview:
3 * This is the generic MTD driver for NAND flash devices. It should be
4 * capable of working with almost all NAND chips currently available.
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02006 * Additional technical information is available on
Scott Wood3628f002008-10-24 16:20:43 -05007 * http://www.linux-mtd.infradead.org/doc/nand.html
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02008 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02009 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
William Juul52c07962007-10-31 13:53:06 +010010 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020011 *
William Juul52c07962007-10-31 13:53:06 +010012 * Credits:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020013 * David Woodhouse for adding multichip support
14 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020015 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
16 * rework for 2K page size chips
17 *
William Juul52c07962007-10-31 13:53:06 +010018 * TODO:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020019 * Enable cached programming for 2k page size chips
20 * Check, if mtd->ecctype should be set to MTD_ECC_HW
Sergey Lapin3a38a552013-01-14 03:46:50 +000021 * if we have HW ECC support.
Scott Wood3628f002008-10-24 16:20:43 -050022 * BBT table is not serialized, has to be fixed
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020023 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020024 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License version 2 as
26 * published by the Free Software Foundation.
27 *
28 */
29
Heiko Schocherf5895d12014-06-24 10:10:04 +020030#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
Simon Glass0f2af882020-05-10 11:40:05 -060031#include <log.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020032#include <malloc.h>
33#include <watchdog.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070034#include <dm/devres.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060035#include <linux/bitops.h>
Simon Glassc06c1be2020-05-10 11:40:08 -060036#include <linux/bug.h>
Simon Glassdbd79542020-05-10 11:40:11 -060037#include <linux/delay.h>
William Juul52c07962007-10-31 13:53:06 +010038#include <linux/err.h>
Mike Frysinger11d1a092012-04-09 13:39:55 +000039#include <linux/compat.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020040#include <linux/mtd/mtd.h>
Masahiro Yamada2b7a8732017-11-30 13:45:24 +090041#include <linux/mtd/rawnand.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020042#include <linux/mtd/nand_ecc.h>
Christian Hitz55f7bca2011-10-12 09:31:59 +020043#include <linux/mtd/nand_bch.h>
Stefan Roesefa252ea2009-04-24 15:58:33 +020044#ifdef CONFIG_MTD_PARTITIONS
45#include <linux/mtd/partitions.h>
46#endif
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020047#include <asm/io.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090048#include <linux/errno.h>
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020049
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020050/* Define default oob placement schemes for large and small page devices */
Gregory CLEMENTe5b96312019-04-17 11:22:05 +020051#ifndef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
William Juul52c07962007-10-31 13:53:06 +010052static struct nand_ecclayout nand_oob_8 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020053 .eccbytes = 3,
54 .eccpos = {0, 1, 2},
William Juul52c07962007-10-31 13:53:06 +010055 .oobfree = {
56 {.offset = 3,
57 .length = 2},
58 {.offset = 6,
Christian Hitz13fc0e22011-10-12 09:32:01 +020059 .length = 2} }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020060};
61
William Juul52c07962007-10-31 13:53:06 +010062static struct nand_ecclayout nand_oob_16 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020063 .eccbytes = 6,
64 .eccpos = {0, 1, 2, 3, 6, 7},
William Juul52c07962007-10-31 13:53:06 +010065 .oobfree = {
66 {.offset = 8,
Christian Hitz13fc0e22011-10-12 09:32:01 +020067 . length = 8} }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020068};
69
William Juul52c07962007-10-31 13:53:06 +010070static struct nand_ecclayout nand_oob_64 = {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020071 .eccbytes = 24,
72 .eccpos = {
William Juul52c07962007-10-31 13:53:06 +010073 40, 41, 42, 43, 44, 45, 46, 47,
74 48, 49, 50, 51, 52, 53, 54, 55,
75 56, 57, 58, 59, 60, 61, 62, 63},
76 .oobfree = {
77 {.offset = 2,
Christian Hitz13fc0e22011-10-12 09:32:01 +020078 .length = 38} }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020079};
80
William Juul52c07962007-10-31 13:53:06 +010081static struct nand_ecclayout nand_oob_128 = {
Sergei Poselenov04fbaa02008-06-06 15:42:43 +020082 .eccbytes = 48,
83 .eccpos = {
Christian Hitz13fc0e22011-10-12 09:32:01 +020084 80, 81, 82, 83, 84, 85, 86, 87,
85 88, 89, 90, 91, 92, 93, 94, 95,
86 96, 97, 98, 99, 100, 101, 102, 103,
William Juul52c07962007-10-31 13:53:06 +010087 104, 105, 106, 107, 108, 109, 110, 111,
88 112, 113, 114, 115, 116, 117, 118, 119,
89 120, 121, 122, 123, 124, 125, 126, 127},
90 .oobfree = {
91 {.offset = 2,
Christian Hitz13fc0e22011-10-12 09:32:01 +020092 .length = 78} }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020093};
Stefan Agnerbd186142018-12-06 14:57:09 +010094#endif
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +020095
Heiko Schocherf5895d12014-06-24 10:10:04 +020096static int nand_get_device(struct mtd_info *mtd, int new_state);
William Juul52c07962007-10-31 13:53:06 +010097
98static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
99 struct mtd_oob_ops *ops);
100
Heiko Schocherf5895d12014-06-24 10:10:04 +0200101/*
102 * For devices which display every fart in the system on a separate LED. Is
103 * compiled away when LED support is disabled.
104 */
105DEFINE_LED_TRIGGER(nand_led_trigger);
Sergei Poselenov04fbaa02008-06-06 15:42:43 +0200106
Christian Hitzb8a6b372011-10-12 09:32:02 +0200107static int check_offs_len(struct mtd_info *mtd,
108 loff_t ofs, uint64_t len)
109{
Scott Wood17fed142016-05-30 13:57:56 -0500110 struct nand_chip *chip = mtd_to_nand(mtd);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200111 int ret = 0;
112
113 /* Start address must align on block boundary */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200114 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {
115 pr_debug("%s: unaligned address\n", __func__);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200116 ret = -EINVAL;
117 }
118
119 /* Length must align on block boundary */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200120 if (len & ((1ULL << chip->phys_erase_shift) - 1)) {
121 pr_debug("%s: length not block aligned\n", __func__);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200122 ret = -EINVAL;
123 }
124
Christian Hitzb8a6b372011-10-12 09:32:02 +0200125 return ret;
126}
127
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200128/**
129 * nand_release_device - [GENERIC] release chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000130 * @mtd: MTD device structure
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200131 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200132 * Release chip lock and wake up anyone waiting on the device.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200133 */
Christian Hitz13fc0e22011-10-12 09:32:01 +0200134static void nand_release_device(struct mtd_info *mtd)
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100135{
Scott Wood17fed142016-05-30 13:57:56 -0500136 struct nand_chip *chip = mtd_to_nand(mtd);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200137
138 /* De-select the NAND device */
139 chip->select_chip(mtd, -1);
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100140}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200141
142/**
143 * nand_read_byte - [DEFAULT] read one byte from the chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000144 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200145 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200146 * Default read function for 8bit buswidth
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200147 */
Simon Schwarz5a9fc192011-10-31 06:34:44 +0000148uint8_t nand_read_byte(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200149{
Scott Wood17fed142016-05-30 13:57:56 -0500150 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100151 return readb(chip->IO_ADDR_R);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200152}
153
154/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200155 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000156 * @mtd: MTD device structure
157 *
158 * Default read function for 16bit buswidth with endianness conversion.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200159 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200160 */
William Juul52c07962007-10-31 13:53:06 +0100161static uint8_t nand_read_byte16(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200162{
Scott Wood17fed142016-05-30 13:57:56 -0500163 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100164 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200165}
166
167/**
168 * nand_read_word - [DEFAULT] read one word from the chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000169 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200170 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000171 * Default read function for 16bit buswidth without endianness conversion.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200172 */
173static u16 nand_read_word(struct mtd_info *mtd)
174{
Scott Wood17fed142016-05-30 13:57:56 -0500175 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100176 return readw(chip->IO_ADDR_R);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200177}
178
179/**
180 * nand_select_chip - [DEFAULT] control CE line
Sergey Lapin3a38a552013-01-14 03:46:50 +0000181 * @mtd: MTD device structure
182 * @chipnr: chipnumber to select, -1 for deselect
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200183 *
184 * Default select function for 1 chip devices.
185 */
William Juul52c07962007-10-31 13:53:06 +0100186static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200187{
Scott Wood17fed142016-05-30 13:57:56 -0500188 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100189
190 switch (chipnr) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200191 case -1:
William Juul52c07962007-10-31 13:53:06 +0100192 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200193 break;
194 case 0:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200195 break;
196
197 default:
198 BUG();
199 }
200}
201
202/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200203 * nand_write_byte - [DEFAULT] write single byte to chip
204 * @mtd: MTD device structure
205 * @byte: value to write
206 *
207 * Default function to write a byte to I/O[7:0]
208 */
209static void nand_write_byte(struct mtd_info *mtd, uint8_t byte)
210{
Scott Wood17fed142016-05-30 13:57:56 -0500211 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +0200212
213 chip->write_buf(mtd, &byte, 1);
214}
215
216/**
217 * nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16
218 * @mtd: MTD device structure
219 * @byte: value to write
220 *
221 * Default function to write a byte to I/O[7:0] on a 16-bit wide chip.
222 */
223static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte)
224{
Scott Wood17fed142016-05-30 13:57:56 -0500225 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +0200226 uint16_t word = byte;
227
228 /*
229 * It's not entirely clear what should happen to I/O[15:8] when writing
230 * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads:
231 *
232 * When the host supports a 16-bit bus width, only data is
233 * transferred at the 16-bit width. All address and command line
234 * transfers shall use only the lower 8-bits of the data bus. During
235 * command transfers, the host may place any value on the upper
236 * 8-bits of the data bus. During address transfers, the host shall
237 * set the upper 8-bits of the data bus to 00h.
238 *
239 * One user of the write_byte callback is nand_onfi_set_features. The
240 * four parameters are specified to be written to I/O[7:0], but this is
241 * neither an address nor a command transfer. Let's assume a 0 on the
242 * upper I/O lines is OK.
243 */
244 chip->write_buf(mtd, (uint8_t *)&word, 2);
245}
246
Heiko Schocherf5895d12014-06-24 10:10:04 +0200247/**
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200248 * nand_write_buf - [DEFAULT] write buffer to chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000249 * @mtd: MTD device structure
250 * @buf: data buffer
251 * @len: number of bytes to write
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200252 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000253 * Default write function for 8bit buswidth.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200254 */
Simon Schwarz5a9fc192011-10-31 06:34:44 +0000255void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200256{
Scott Wood17fed142016-05-30 13:57:56 -0500257 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200258
Heiko Schocherf5895d12014-06-24 10:10:04 +0200259 iowrite8_rep(chip->IO_ADDR_W, buf, len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200260}
261
262/**
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200263 * nand_read_buf - [DEFAULT] read chip data into buffer
Sergey Lapin3a38a552013-01-14 03:46:50 +0000264 * @mtd: MTD device structure
265 * @buf: buffer to store date
266 * @len: number of bytes to read
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200267 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000268 * Default read function for 8bit buswidth.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200269 */
Simon Schwarz4f62e982011-09-14 15:30:16 -0400270void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200271{
Scott Wood17fed142016-05-30 13:57:56 -0500272 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200273
Heiko Schocherf5895d12014-06-24 10:10:04 +0200274 ioread8_rep(chip->IO_ADDR_R, buf, len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200275}
276
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200277/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200278 * nand_write_buf16 - [DEFAULT] write buffer to chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000279 * @mtd: MTD device structure
Heiko Schocherf5895d12014-06-24 10:10:04 +0200280 * @buf: data buffer
281 * @len: number of bytes to write
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200282 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200283 * Default write function for 16bit buswidth.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200284 */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200285void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200286{
Scott Wood17fed142016-05-30 13:57:56 -0500287 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200288 u16 *p = (u16 *) buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200289
Heiko Schocherf5895d12014-06-24 10:10:04 +0200290 iowrite16_rep(chip->IO_ADDR_W, p, len >> 1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200291}
292
293/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200294 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Sergey Lapin3a38a552013-01-14 03:46:50 +0000295 * @mtd: MTD device structure
Heiko Schocherf5895d12014-06-24 10:10:04 +0200296 * @buf: buffer to store date
297 * @len: number of bytes to read
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200298 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200299 * Default read function for 16bit buswidth.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200300 */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200301void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200302{
Scott Wood17fed142016-05-30 13:57:56 -0500303 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200304 u16 *p = (u16 *) buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200305
Heiko Schocherf5895d12014-06-24 10:10:04 +0200306 ioread16_rep(chip->IO_ADDR_R, p, len >> 1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200307}
308
309/**
310 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
Sergey Lapin3a38a552013-01-14 03:46:50 +0000311 * @mtd: MTD device structure
312 * @ofs: offset from device start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200313 *
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200314 * Check, if the block is bad.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200315 */
Scott Wood52ab7ce2016-05-30 13:57:58 -0500316static int nand_block_bad(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200317{
Scott Wood52ab7ce2016-05-30 13:57:58 -0500318 int page, res = 0, i = 0;
Scott Wood17fed142016-05-30 13:57:56 -0500319 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200320 u16 bad;
321
Sergey Lapin3a38a552013-01-14 03:46:50 +0000322 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
Christian Hitzb8a6b372011-10-12 09:32:02 +0200323 ofs += mtd->erasesize - mtd->writesize;
324
William Juul52c07962007-10-31 13:53:06 +0100325 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
Thomas Knobloch9e2aeaf2007-05-05 07:04:42 +0200326
Sergey Lapin3a38a552013-01-14 03:46:50 +0000327 do {
328 if (chip->options & NAND_BUSWIDTH_16) {
329 chip->cmdfunc(mtd, NAND_CMD_READOOB,
330 chip->badblockpos & 0xFE, page);
331 bad = cpu_to_le16(chip->read_word(mtd));
332 if (chip->badblockpos & 0x1)
333 bad >>= 8;
334 else
335 bad &= 0xFF;
336 } else {
337 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
338 page);
339 bad = chip->read_byte(mtd);
340 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200341
Sergey Lapin3a38a552013-01-14 03:46:50 +0000342 if (likely(chip->badblockbits == 8))
343 res = bad != 0xFF;
344 else
345 res = hweight8(bad) < chip->badblockbits;
346 ofs += mtd->writesize;
347 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
348 i++;
349 } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));
Christian Hitzb8a6b372011-10-12 09:32:02 +0200350
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200351 return res;
352}
353
354/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200355 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
Sergey Lapin3a38a552013-01-14 03:46:50 +0000356 * @mtd: MTD device structure
357 * @ofs: offset from device start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200358 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000359 * This is the default implementation, which can be overridden by a hardware
Heiko Schocherf5895d12014-06-24 10:10:04 +0200360 * specific driver. It provides the details for writing a bad block marker to a
361 * block.
362 */
363static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
364{
Scott Wood17fed142016-05-30 13:57:56 -0500365 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +0200366 struct mtd_oob_ops ops;
367 uint8_t buf[2] = { 0, 0 };
368 int ret = 0, res, i = 0;
369
Scott Wood3ea94ed2015-06-26 19:03:26 -0500370 memset(&ops, 0, sizeof(ops));
Heiko Schocherf5895d12014-06-24 10:10:04 +0200371 ops.oobbuf = buf;
372 ops.ooboffs = chip->badblockpos;
373 if (chip->options & NAND_BUSWIDTH_16) {
374 ops.ooboffs &= ~0x01;
375 ops.len = ops.ooblen = 2;
376 } else {
377 ops.len = ops.ooblen = 1;
378 }
379 ops.mode = MTD_OPS_PLACE_OOB;
380
381 /* Write to first/last page(s) if necessary */
382 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
383 ofs += mtd->erasesize - mtd->writesize;
384 do {
385 res = nand_do_write_oob(mtd, ofs, &ops);
386 if (!ret)
387 ret = res;
388
389 i++;
390 ofs += mtd->writesize;
391 } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);
392
393 return ret;
394}
395
396/**
397 * nand_block_markbad_lowlevel - mark a block bad
398 * @mtd: MTD device structure
399 * @ofs: offset from device start
400 *
401 * This function performs the generic NAND bad block marking steps (i.e., bad
402 * block table(s) and/or marker(s)). We only allow the hardware driver to
403 * specify how to write bad block markers to OOB (chip->block_markbad).
404 *
405 * We try operations in the following order:
Sergey Lapin3a38a552013-01-14 03:46:50 +0000406 * (1) erase the affected block, to allow OOB marker to be written cleanly
Heiko Schocherf5895d12014-06-24 10:10:04 +0200407 * (2) write bad block marker to OOB area of affected block (unless flag
408 * NAND_BBT_NO_OOB_BBM is present)
409 * (3) update the BBT
410 * Note that we retain the first error encountered in (2) or (3), finish the
Sergey Lapin3a38a552013-01-14 03:46:50 +0000411 * procedures, and dump the error in the end.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200412*/
Heiko Schocherf5895d12014-06-24 10:10:04 +0200413static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200414{
Scott Wood17fed142016-05-30 13:57:56 -0500415 struct nand_chip *chip = mtd_to_nand(mtd);
Roger Quadrosb590f612022-12-20 12:21:57 +0200416 int ret = 0;
417#ifndef CONFIG_SPL_BUILD
418 int res;
419#endif
Christian Hitzb8a6b372011-10-12 09:32:02 +0200420
Heiko Schocherf5895d12014-06-24 10:10:04 +0200421 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {
Sergey Lapin3a38a552013-01-14 03:46:50 +0000422 struct erase_info einfo;
423
424 /* Attempt erase before marking OOB */
425 memset(&einfo, 0, sizeof(einfo));
426 einfo.mtd = mtd;
427 einfo.addr = ofs;
Heiko Schocherf5895d12014-06-24 10:10:04 +0200428 einfo.len = 1ULL << chip->phys_erase_shift;
Sergey Lapin3a38a552013-01-14 03:46:50 +0000429 nand_erase_nand(mtd, &einfo, 0);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200430
Heiko Schocherf5895d12014-06-24 10:10:04 +0200431 /* Write bad block marker to OOB */
432 nand_get_device(mtd, FL_WRITING);
433 ret = chip->block_markbad(mtd, ofs);
Scott Wood3628f002008-10-24 16:20:43 -0500434 nand_release_device(mtd);
William Juul52c07962007-10-31 13:53:06 +0100435 }
Sergey Lapin3a38a552013-01-14 03:46:50 +0000436
Roger Quadrosb590f612022-12-20 12:21:57 +0200437#ifndef CONFIG_SPL_BUILD
Heiko Schocherf5895d12014-06-24 10:10:04 +0200438 /* Mark block bad in BBT */
439 if (chip->bbt) {
440 res = nand_markbad_bbt(mtd, ofs);
Sergey Lapin3a38a552013-01-14 03:46:50 +0000441 if (!ret)
442 ret = res;
443 }
Roger Quadrosb590f612022-12-20 12:21:57 +0200444#endif
Sergey Lapin3a38a552013-01-14 03:46:50 +0000445
William Juul52c07962007-10-31 13:53:06 +0100446 if (!ret)
447 mtd->ecc_stats.badblocks++;
Scott Wood3628f002008-10-24 16:20:43 -0500448
William Juul52c07962007-10-31 13:53:06 +0100449 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200450}
451
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200452/**
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200453 * nand_check_wp - [GENERIC] check if the chip is write protected
Sergey Lapin3a38a552013-01-14 03:46:50 +0000454 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200455 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000456 * Check, if the device is write protected. The function expects, that the
457 * device is already selected.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200458 */
William Juul52c07962007-10-31 13:53:06 +0100459static int nand_check_wp(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200460{
Scott Wood17fed142016-05-30 13:57:56 -0500461 struct nand_chip *chip = mtd_to_nand(mtd);
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100462 u8 status;
463 int ret;
Christian Hitzb8a6b372011-10-12 09:32:02 +0200464
Sergey Lapin3a38a552013-01-14 03:46:50 +0000465 /* Broken xD cards report WP despite being writable */
Christian Hitzb8a6b372011-10-12 09:32:02 +0200466 if (chip->options & NAND_BROKEN_XD)
467 return 0;
468
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200469 /* Check the WP bit */
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100470 ret = nand_status_op(chip, &status);
471 if (ret)
472 return ret;
473
474 return status & NAND_STATUS_WP ? 0 : 1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200475}
Markus Klotzbücher27eba142006-03-06 15:04:25 +0100476
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200477/**
Scott Wood3ea94ed2015-06-26 19:03:26 -0500478 * nand_block_isreserved - [GENERIC] Check if a block is marked reserved.
Sergey Lapin3a38a552013-01-14 03:46:50 +0000479 * @mtd: MTD device structure
480 * @ofs: offset from device start
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300481 *
Scott Wood3ea94ed2015-06-26 19:03:26 -0500482 * Check if the block is marked as reserved.
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300483 */
484static int nand_block_isreserved(struct mtd_info *mtd, loff_t ofs)
485{
Scott Wood17fed142016-05-30 13:57:56 -0500486 struct nand_chip *chip = mtd_to_nand(mtd);
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300487
488 if (!chip->bbt)
489 return 0;
490 /* Return info from the table */
Roger Quadrosb590f612022-12-20 12:21:57 +0200491#ifndef CONFIG_SPL_BUILD
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300492 return nand_isreserved_bbt(mtd, ofs);
Roger Quadrosb590f612022-12-20 12:21:57 +0200493#else
494 return 0;
495#endif
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -0300496}
497
498/**
499 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
500 * @mtd: MTD device structure
501 * @ofs: offset from device start
Sergey Lapin3a38a552013-01-14 03:46:50 +0000502 * @allowbbt: 1, if its allowed to access the bbt area
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200503 *
504 * Check, if the block is bad. Either by reading the bad block table or
505 * calling of the scan function.
506 */
Scott Wood52ab7ce2016-05-30 13:57:58 -0500507static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int allowbbt)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200508{
Scott Wood17fed142016-05-30 13:57:56 -0500509 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200510
Masahiro Yamada8d100542014-12-26 22:20:58 +0900511 if (!(chip->options & NAND_SKIP_BBTSCAN) &&
512 !(chip->options & NAND_BBT_SCANNED)) {
Rostislav Lisovydc17bdc2014-10-22 13:40:44 +0200513 chip->options |= NAND_BBT_SCANNED;
Masahiro Yamada8c6c14a2014-12-26 22:20:57 +0900514 chip->scan_bbt(mtd);
Rostislav Lisovydc17bdc2014-10-22 13:40:44 +0200515 }
516
William Juul52c07962007-10-31 13:53:06 +0100517 if (!chip->bbt)
Scott Wood52ab7ce2016-05-30 13:57:58 -0500518 return chip->block_bad(mtd, ofs);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200519
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200520 /* Return info from the table */
Roger Quadrosb590f612022-12-20 12:21:57 +0200521#ifndef CONFIG_SPL_BUILD
William Juul52c07962007-10-31 13:53:06 +0100522 return nand_isbad_bbt(mtd, ofs, allowbbt);
Roger Quadrosb590f612022-12-20 12:21:57 +0200523#else
524 return 0;
525#endif
William Juul52c07962007-10-31 13:53:06 +0100526}
Heiko Schocherf5895d12014-06-24 10:10:04 +0200527
Scott Wood52ab7ce2016-05-30 13:57:58 -0500528/**
529 * nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
530 * @mtd: MTD device structure
531 *
532 * Wait for the ready pin after a command, and warn if a timeout occurs.
533 */
William Juul52c07962007-10-31 13:53:06 +0100534void nand_wait_ready(struct mtd_info *mtd)
535{
Scott Wood17fed142016-05-30 13:57:56 -0500536 struct nand_chip *chip = mtd_to_nand(mtd);
Scott Wood52ab7ce2016-05-30 13:57:58 -0500537 u32 timeo = (CONFIG_SYS_HZ * 400) / 1000;
Reinhard Meyer4d1fb182010-11-18 03:14:26 +0000538 u32 time_start;
Stefan Roesea5c312c2008-01-05 16:43:25 +0100539
Reinhard Meyer4d1fb182010-11-18 03:14:26 +0000540 time_start = get_timer(0);
Sergey Lapin3a38a552013-01-14 03:46:50 +0000541 /* Wait until command is processed or timeout occurs */
Reinhard Meyer4d1fb182010-11-18 03:14:26 +0000542 while (get_timer(time_start) < timeo) {
Stefan Roesea5c312c2008-01-05 16:43:25 +0100543 if (chip->dev_ready)
544 if (chip->dev_ready(mtd))
545 break;
546 }
Scott Wood52ab7ce2016-05-30 13:57:58 -0500547
548 if (!chip->dev_ready(mtd))
549 pr_warn("timeout while waiting for chip to become ready\n");
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200550}
Heiko Schocherf5895d12014-06-24 10:10:04 +0200551EXPORT_SYMBOL_GPL(nand_wait_ready);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200552
553/**
Scott Wood3ea94ed2015-06-26 19:03:26 -0500554 * nand_wait_status_ready - [GENERIC] Wait for the ready status after commands.
555 * @mtd: MTD device structure
556 * @timeo: Timeout in ms
557 *
558 * Wait for status ready (i.e. command done) or timeout.
559 */
560static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo)
561{
Scott Wood17fed142016-05-30 13:57:56 -0500562 register struct nand_chip *chip = mtd_to_nand(mtd);
Scott Wood3ea94ed2015-06-26 19:03:26 -0500563 u32 time_start;
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100564 int ret;
Scott Wood3ea94ed2015-06-26 19:03:26 -0500565
566 timeo = (CONFIG_SYS_HZ * timeo) / 1000;
567 time_start = get_timer(0);
568 while (get_timer(time_start) < timeo) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100569 u8 status;
570
571 ret = nand_read_data_op(chip, &status, sizeof(status), true);
572 if (ret)
573 return;
574
575 if (status & NAND_STATUS_READY)
Scott Wood3ea94ed2015-06-26 19:03:26 -0500576 break;
Stefan Roese80877fa2022-09-02 14:10:46 +0200577 schedule();
Scott Wood3ea94ed2015-06-26 19:03:26 -0500578 }
579};
580
581/**
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200582 * nand_command - [DEFAULT] Send command to NAND device
Sergey Lapin3a38a552013-01-14 03:46:50 +0000583 * @mtd: MTD device structure
584 * @command: the command to be sent
585 * @column: the column address for this command, -1 if none
586 * @page_addr: the page address for this command, -1 if none
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200587 *
Sergey Lapin3a38a552013-01-14 03:46:50 +0000588 * Send command to NAND device. This function is used for small page devices
Heiko Schocherf5895d12014-06-24 10:10:04 +0200589 * (512 Bytes per page).
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200590 */
William Juul52c07962007-10-31 13:53:06 +0100591static void nand_command(struct mtd_info *mtd, unsigned int command,
592 int column, int page_addr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200593{
Scott Wood17fed142016-05-30 13:57:56 -0500594 register struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +0100595 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200596
Sergey Lapin3a38a552013-01-14 03:46:50 +0000597 /* Write out the command to the device */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200598 if (command == NAND_CMD_SEQIN) {
599 int readcmd;
600
William Juul52c07962007-10-31 13:53:06 +0100601 if (column >= mtd->writesize) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200602 /* OOB area */
William Juul52c07962007-10-31 13:53:06 +0100603 column -= mtd->writesize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200604 readcmd = NAND_CMD_READOOB;
605 } else if (column < 256) {
606 /* First 256 bytes --> READ0 */
607 readcmd = NAND_CMD_READ0;
608 } else {
609 column -= 256;
610 readcmd = NAND_CMD_READ1;
611 }
William Juul52c07962007-10-31 13:53:06 +0100612 chip->cmd_ctrl(mtd, readcmd, ctrl);
613 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200614 }
William Juul52c07962007-10-31 13:53:06 +0100615 chip->cmd_ctrl(mtd, command, ctrl);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200616
Sergey Lapin3a38a552013-01-14 03:46:50 +0000617 /* Address cycle, when necessary */
William Juul52c07962007-10-31 13:53:06 +0100618 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
619 /* Serially input address */
620 if (column != -1) {
621 /* Adjust columns for 16 bit buswidth */
Heiko Schocher081fe9e2014-07-15 16:08:43 +0200622 if (chip->options & NAND_BUSWIDTH_16 &&
Brian Norris67675222014-05-06 00:46:17 +0530623 !nand_opcode_8bits(command))
William Juul52c07962007-10-31 13:53:06 +0100624 column >>= 1;
625 chip->cmd_ctrl(mtd, column, ctrl);
626 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200627 }
William Juul52c07962007-10-31 13:53:06 +0100628 if (page_addr != -1) {
629 chip->cmd_ctrl(mtd, page_addr, ctrl);
630 ctrl &= ~NAND_CTRL_CHANGE;
631 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
Masahiro Yamada984926b2017-11-22 02:38:31 +0900632 if (chip->options & NAND_ROW_ADDR_3)
William Juul52c07962007-10-31 13:53:06 +0100633 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
634 }
635 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200636
637 /*
Sergey Lapin3a38a552013-01-14 03:46:50 +0000638 * Program and erase have their own busy handlers status and sequential
639 * in needs no delay
William Juul52c07962007-10-31 13:53:06 +0100640 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200641 switch (command) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200642
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200643 case NAND_CMD_PAGEPROG:
644 case NAND_CMD_ERASE1:
645 case NAND_CMD_ERASE2:
646 case NAND_CMD_SEQIN:
647 case NAND_CMD_STATUS:
Masahiro Yamada7f9baa12017-09-15 21:44:58 +0900648 case NAND_CMD_READID:
Masahiro Yamada0cd10182017-09-15 21:44:59 +0900649 case NAND_CMD_SET_FEATURES:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200650 return;
651
652 case NAND_CMD_RESET:
William Juul52c07962007-10-31 13:53:06 +0100653 if (chip->dev_ready)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200654 break;
William Juul52c07962007-10-31 13:53:06 +0100655 udelay(chip->chip_delay);
656 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
657 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
658 chip->cmd_ctrl(mtd,
659 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Scott Wood3ea94ed2015-06-26 19:03:26 -0500660 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */
661 nand_wait_status_ready(mtd, 250);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200662 return;
663
William Juul52c07962007-10-31 13:53:06 +0100664 /* This applies to read commands */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200665 default:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200666 /*
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200667 * If we don't have access to the busy pin, we apply the given
668 * command delay
William Juul52c07962007-10-31 13:53:06 +0100669 */
670 if (!chip->dev_ready) {
671 udelay(chip->chip_delay);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200672 return;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200673 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200674 }
Sergey Lapin3a38a552013-01-14 03:46:50 +0000675 /*
676 * Apply this short delay always to ensure that we do wait tWB in
677 * any case on any machine.
678 */
William Juul52c07962007-10-31 13:53:06 +0100679 ndelay(100);
680
681 nand_wait_ready(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200682}
683
684/**
685 * nand_command_lp - [DEFAULT] Send command to NAND large page device
Sergey Lapin3a38a552013-01-14 03:46:50 +0000686 * @mtd: MTD device structure
687 * @command: the command to be sent
688 * @column: the column address for this command, -1 if none
689 * @page_addr: the page address for this command, -1 if none
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200690 *
William Juul52c07962007-10-31 13:53:06 +0100691 * Send command to NAND device. This is the version for the new large page
Sergey Lapin3a38a552013-01-14 03:46:50 +0000692 * devices. We don't have the separate regions as we have in the small page
693 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200694 */
William Juul52c07962007-10-31 13:53:06 +0100695static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
696 int column, int page_addr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200697{
Scott Wood17fed142016-05-30 13:57:56 -0500698 register struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200699
700 /* Emulate NAND_CMD_READOOB */
701 if (command == NAND_CMD_READOOB) {
William Juul52c07962007-10-31 13:53:06 +0100702 column += mtd->writesize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200703 command = NAND_CMD_READ0;
704 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200705
William Juul52c07962007-10-31 13:53:06 +0100706 /* Command latch cycle */
Heiko Schocherf5895d12014-06-24 10:10:04 +0200707 chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200708
709 if (column != -1 || page_addr != -1) {
William Juul52c07962007-10-31 13:53:06 +0100710 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200711
712 /* Serially input address */
713 if (column != -1) {
714 /* Adjust columns for 16 bit buswidth */
Heiko Schocher081fe9e2014-07-15 16:08:43 +0200715 if (chip->options & NAND_BUSWIDTH_16 &&
Brian Norris67675222014-05-06 00:46:17 +0530716 !nand_opcode_8bits(command))
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200717 column >>= 1;
William Juul52c07962007-10-31 13:53:06 +0100718 chip->cmd_ctrl(mtd, column, ctrl);
719 ctrl &= ~NAND_CTRL_CHANGE;
720 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200721 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200722 if (page_addr != -1) {
William Juul52c07962007-10-31 13:53:06 +0100723 chip->cmd_ctrl(mtd, page_addr, ctrl);
724 chip->cmd_ctrl(mtd, page_addr >> 8,
725 NAND_NCE | NAND_ALE);
Masahiro Yamada984926b2017-11-22 02:38:31 +0900726 if (chip->options & NAND_ROW_ADDR_3)
William Juul52c07962007-10-31 13:53:06 +0100727 chip->cmd_ctrl(mtd, page_addr >> 16,
728 NAND_NCE | NAND_ALE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200729 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200730 }
William Juul52c07962007-10-31 13:53:06 +0100731 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200732
733 /*
Sergey Lapin3a38a552013-01-14 03:46:50 +0000734 * Program and erase have their own busy handlers status, sequential
Scott Wood3ea94ed2015-06-26 19:03:26 -0500735 * in and status need no delay.
William Juul52c07962007-10-31 13:53:06 +0100736 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200737 switch (command) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200738
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200739 case NAND_CMD_CACHEDPROG:
740 case NAND_CMD_PAGEPROG:
741 case NAND_CMD_ERASE1:
742 case NAND_CMD_ERASE2:
743 case NAND_CMD_SEQIN:
William Juul52c07962007-10-31 13:53:06 +0100744 case NAND_CMD_RNDIN:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200745 case NAND_CMD_STATUS:
Masahiro Yamada7f9baa12017-09-15 21:44:58 +0900746 case NAND_CMD_READID:
Masahiro Yamada0cd10182017-09-15 21:44:59 +0900747 case NAND_CMD_SET_FEATURES:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200748 return;
749
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200750 case NAND_CMD_RESET:
William Juul52c07962007-10-31 13:53:06 +0100751 if (chip->dev_ready)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200752 break;
William Juul52c07962007-10-31 13:53:06 +0100753 udelay(chip->chip_delay);
754 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
755 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
756 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
757 NAND_NCE | NAND_CTRL_CHANGE);
Scott Wood3ea94ed2015-06-26 19:03:26 -0500758 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */
759 nand_wait_status_ready(mtd, 250);
William Juul52c07962007-10-31 13:53:06 +0100760 return;
761
762 case NAND_CMD_RNDOUT:
763 /* No ready / busy check necessary */
764 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
765 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
766 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
767 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200768 return;
769
770 case NAND_CMD_READ0:
William Juul52c07962007-10-31 13:53:06 +0100771 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
772 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
773 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
774 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200775
William Juul52c07962007-10-31 13:53:06 +0100776 /* This applies to read commands */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200777 default:
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200778 /*
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200779 * If we don't have access to the busy pin, we apply the given
Sergey Lapin3a38a552013-01-14 03:46:50 +0000780 * command delay.
William Juul52c07962007-10-31 13:53:06 +0100781 */
782 if (!chip->dev_ready) {
783 udelay(chip->chip_delay);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200784 return;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200785 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200786 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200787
Sergey Lapin3a38a552013-01-14 03:46:50 +0000788 /*
789 * Apply this short delay always to ensure that we do wait tWB in
790 * any case on any machine.
791 */
William Juul52c07962007-10-31 13:53:06 +0100792 ndelay(100);
793
794 nand_wait_ready(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200795}
796
797/**
Heiko Schocherf5895d12014-06-24 10:10:04 +0200798 * panic_nand_get_device - [GENERIC] Get chip for selected access
Sergey Lapin3a38a552013-01-14 03:46:50 +0000799 * @chip: the nand chip descriptor
800 * @mtd: MTD device structure
801 * @new_state: the state which is requested
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200802 *
Heiko Schocherf5895d12014-06-24 10:10:04 +0200803 * Used when in panic, no locks are taken.
804 */
805static void panic_nand_get_device(struct nand_chip *chip,
806 struct mtd_info *mtd, int new_state)
807{
808 /* Hardware controller shared among independent devices */
809 chip->controller->active = chip;
810 chip->state = new_state;
811}
812
813/**
814 * nand_get_device - [GENERIC] Get chip for selected access
815 * @mtd: MTD device structure
816 * @new_state: the state which is requested
817 *
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200818 * Get the device and lock it for exclusive access
819 */
Christian Hitzb8a6b372011-10-12 09:32:02 +0200820static int
Heiko Schocherf5895d12014-06-24 10:10:04 +0200821nand_get_device(struct mtd_info *mtd, int new_state)
William Juul52c07962007-10-31 13:53:06 +0100822{
Scott Wood17fed142016-05-30 13:57:56 -0500823 struct nand_chip *chip = mtd_to_nand(mtd);
Christian Hitzb8a6b372011-10-12 09:32:02 +0200824 chip->state = new_state;
William Juul52c07962007-10-31 13:53:06 +0100825 return 0;
Heiko Schocherf5895d12014-06-24 10:10:04 +0200826}
827
828/**
829 * panic_nand_wait - [GENERIC] wait until the command is done
830 * @mtd: MTD device structure
831 * @chip: NAND chip structure
832 * @timeo: timeout
833 *
834 * Wait for command done. This is a helper function for nand_wait used when
835 * we are in interrupt context. May happen when in panic and trying to write
836 * an oops through mtdoops.
837 */
838static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
839 unsigned long timeo)
840{
841 int i;
842 for (i = 0; i < timeo; i++) {
843 if (chip->dev_ready) {
844 if (chip->dev_ready(mtd))
845 break;
846 } else {
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100847 int ret;
848 u8 status;
849
850 ret = nand_read_data_op(chip, &status, sizeof(status),
851 true);
852 if (ret)
853 return;
854
855 if (status & NAND_STATUS_READY)
Heiko Schocherf5895d12014-06-24 10:10:04 +0200856 break;
857 }
858 mdelay(1);
859 }
William Juul52c07962007-10-31 13:53:06 +0100860}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200861
862/**
Sergey Lapin3a38a552013-01-14 03:46:50 +0000863 * nand_wait - [DEFAULT] wait until the command is done
864 * @mtd: MTD device structure
865 * @chip: NAND chip structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200866 *
Scott Wood52ab7ce2016-05-30 13:57:58 -0500867 * Wait for command done. This applies to erase and program only.
William Juul52c07962007-10-31 13:53:06 +0100868 */
Christian Hitzb8a6b372011-10-12 09:32:02 +0200869static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200870{
Scott Wood52ab7ce2016-05-30 13:57:58 -0500871 unsigned long timeo = 400;
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100872 u8 status;
873 int ret;
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100874
Heiko Schocherf5895d12014-06-24 10:10:04 +0200875 led_trigger_event(nand_led_trigger, LED_FULL);
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100876
Heiko Schocherf5895d12014-06-24 10:10:04 +0200877 /*
878 * Apply this short delay always to ensure that we do wait tWB in any
879 * case on any machine.
880 */
881 ndelay(100);
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100882
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100883 ret = nand_status_op(chip, NULL);
884 if (ret)
885 return ret;
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100886
Wolfgang Denk62fb2b42021-09-27 17:42:39 +0200887 u32 timer = (CONFIG_SYS_HZ * timeo) / 1000;
888 u32 time_start;
Wolfgang Denk9d328a62021-09-27 17:42:38 +0200889
Wolfgang Denk62fb2b42021-09-27 17:42:39 +0200890 time_start = get_timer(0);
891 while (get_timer(time_start) < timer) {
Christian Hitzb8a6b372011-10-12 09:32:02 +0200892 if (chip->dev_ready) {
893 if (chip->dev_ready(mtd))
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100894 break;
895 } else {
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100896 ret = nand_read_data_op(chip, &status,
897 sizeof(status), true);
898 if (ret)
899 return ret;
900
901 if (status & NAND_STATUS_READY)
Wolfgang Denk9a08dd12005-11-02 14:29:12 +0100902 break;
903 }
904 }
Heiko Schocherf5895d12014-06-24 10:10:04 +0200905 led_trigger_event(nand_led_trigger, LED_OFF);
Bartlomiej Sieka6eed2ab2006-02-24 09:37:22 +0100906
Boris Brezillon16ee8f62019-03-15 15:14:32 +0100907 ret = nand_read_data_op(chip, &status, sizeof(status), true);
908 if (ret)
909 return ret;
910
Heiko Schocherf5895d12014-06-24 10:10:04 +0200911 /* This can happen if in case of timeout or buggy dev_ready */
912 WARN_ON(!(status & NAND_STATUS_READY));
913 return status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +0200914}
Scott Wood52ab7ce2016-05-30 13:57:58 -0500915
Scott Wood52ab7ce2016-05-30 13:57:58 -0500916/**
Boris Brezillone509cba2017-11-22 02:38:19 +0900917 * nand_reset_data_interface - Reset data interface and timings
918 * @chip: The NAND chip
Boris Brezillon32935f42017-11-22 02:38:28 +0900919 * @chipnr: Internal die id
Boris Brezillone509cba2017-11-22 02:38:19 +0900920 *
921 * Reset the Data interface and timings to ONFI mode 0.
922 *
923 * Returns 0 for success or negative error code otherwise.
924 */
Boris Brezillon32935f42017-11-22 02:38:28 +0900925static int nand_reset_data_interface(struct nand_chip *chip, int chipnr)
Boris Brezillone509cba2017-11-22 02:38:19 +0900926{
927 struct mtd_info *mtd = nand_to_mtd(chip);
928 const struct nand_data_interface *conf;
929 int ret;
930
931 if (!chip->setup_data_interface)
932 return 0;
933
934 /*
935 * The ONFI specification says:
936 * "
937 * To transition from NV-DDR or NV-DDR2 to the SDR data
938 * interface, the host shall use the Reset (FFh) command
939 * using SDR timing mode 0. A device in any timing mode is
940 * required to recognize Reset (FFh) command issued in SDR
941 * timing mode 0.
942 * "
943 *
944 * Configure the data interface in SDR mode and set the
945 * timings to timing mode 0.
946 */
947
948 conf = nand_get_default_data_interface();
Boris Brezillon32935f42017-11-22 02:38:28 +0900949 ret = chip->setup_data_interface(mtd, chipnr, conf);
Boris Brezillone509cba2017-11-22 02:38:19 +0900950 if (ret)
951 pr_err("Failed to configure data interface to SDR timing mode 0\n");
952
953 return ret;
954}
955
Kory Maincent0cda0cb2022-06-22 11:11:45 +0200956static int nand_onfi_set_timings(struct mtd_info *mtd, struct nand_chip *chip)
957{
958 if (!chip->onfi_version ||
959 !(le16_to_cpu(chip->onfi_params.opt_cmd)
960 & ONFI_OPT_CMD_SET_GET_FEATURES))
961 return 0;
962
963 u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
964 chip->onfi_timing_mode_default,
965 };
966
967 return chip->onfi_set_features(mtd, chip,
968 ONFI_FEATURE_ADDR_TIMING_MODE,
969 tmode_param);
970}
971
Boris Brezillone509cba2017-11-22 02:38:19 +0900972/**
973 * nand_setup_data_interface - Setup the best data interface and timings
974 * @chip: The NAND chip
Boris Brezillon32935f42017-11-22 02:38:28 +0900975 * @chipnr: Internal die id
Boris Brezillone509cba2017-11-22 02:38:19 +0900976 *
977 * Find and configure the best data interface and NAND timings supported by
978 * the chip and the driver.
979 * First tries to retrieve supported timing modes from ONFI information,
980 * and if the NAND chip does not support ONFI, relies on the
981 * ->onfi_timing_mode_default specified in the nand_ids table.
982 *
983 * Returns 0 for success or negative error code otherwise.
984 */
Boris Brezillon32935f42017-11-22 02:38:28 +0900985static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
Boris Brezillone509cba2017-11-22 02:38:19 +0900986{
987 struct mtd_info *mtd = nand_to_mtd(chip);
988 int ret;
989
990 if (!chip->setup_data_interface || !chip->data_interface)
991 return 0;
992
993 /*
994 * Ensure the timing mode has been changed on the chip side
995 * before changing timings on the controller side.
996 */
Kory Maincent0cda0cb2022-06-22 11:11:45 +0200997 ret = nand_onfi_set_timings(mtd, chip);
998 if (ret)
999 goto err;
Boris Brezillone509cba2017-11-22 02:38:19 +09001000
Boris Brezillon32935f42017-11-22 02:38:28 +09001001 ret = chip->setup_data_interface(mtd, chipnr, chip->data_interface);
Boris Brezillone509cba2017-11-22 02:38:19 +09001002err:
1003 return ret;
1004}
1005
1006/**
1007 * nand_init_data_interface - find the best data interface and timings
1008 * @chip: The NAND chip
1009 *
1010 * Find the best data interface and NAND timings supported by the chip
1011 * and the driver.
1012 * First tries to retrieve supported timing modes from ONFI information,
1013 * and if the NAND chip does not support ONFI, relies on the
1014 * ->onfi_timing_mode_default specified in the nand_ids table. After this
1015 * function nand_chip->data_interface is initialized with the best timing mode
1016 * available.
1017 *
1018 * Returns 0 for success or negative error code otherwise.
1019 */
1020static int nand_init_data_interface(struct nand_chip *chip)
1021{
1022 struct mtd_info *mtd = nand_to_mtd(chip);
1023 int modes, mode, ret;
1024
1025 if (!chip->setup_data_interface)
1026 return 0;
1027
1028 /*
1029 * First try to identify the best timings from ONFI parameters and
1030 * if the NAND does not support ONFI, fallback to the default ONFI
1031 * timing mode.
1032 */
1033 modes = onfi_get_async_timing_mode(chip);
1034 if (modes == ONFI_TIMING_MODE_UNKNOWN) {
1035 if (!chip->onfi_timing_mode_default)
1036 return 0;
1037
1038 modes = GENMASK(chip->onfi_timing_mode_default, 0);
1039 }
1040
1041 chip->data_interface = kzalloc(sizeof(*chip->data_interface),
1042 GFP_KERNEL);
1043 if (!chip->data_interface)
1044 return -ENOMEM;
1045
1046 for (mode = fls(modes) - 1; mode >= 0; mode--) {
1047 ret = onfi_init_data_interface(chip, chip->data_interface,
1048 NAND_SDR_IFACE, mode);
1049 if (ret)
1050 continue;
1051
Boris Brezillon32935f42017-11-22 02:38:28 +09001052 /* Pass -1 to only */
1053 ret = chip->setup_data_interface(mtd,
1054 NAND_DATA_IFACE_CHECK_ONLY,
1055 chip->data_interface);
Boris Brezillone509cba2017-11-22 02:38:19 +09001056 if (!ret) {
1057 chip->onfi_timing_mode_default = mode;
1058 break;
1059 }
1060 }
1061
1062 return 0;
1063}
1064
1065static void __maybe_unused nand_release_data_interface(struct nand_chip *chip)
1066{
1067 kfree(chip->data_interface);
1068}
1069
1070/**
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001071 * nand_read_page_op - Do a READ PAGE operation
1072 * @chip: The NAND chip
1073 * @page: page to read
1074 * @offset_in_page: offset within the page
1075 * @buf: buffer used to store the data
1076 * @len: length of the buffer
1077 *
1078 * This function issues a READ PAGE operation.
1079 * This function does not select/unselect the CS line.
1080 *
1081 * Returns 0 on success, a negative error code otherwise.
1082 */
1083int nand_read_page_op(struct nand_chip *chip, unsigned int page,
1084 unsigned int offset_in_page, void *buf, unsigned int len)
1085{
1086 struct mtd_info *mtd = nand_to_mtd(chip);
1087
1088 if (len && !buf)
1089 return -EINVAL;
1090
1091 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1092 return -EINVAL;
1093
1094 chip->cmdfunc(mtd, NAND_CMD_READ0, offset_in_page, page);
1095 if (len)
1096 chip->read_buf(mtd, buf, len);
1097
1098 return 0;
1099}
1100EXPORT_SYMBOL_GPL(nand_read_page_op);
1101
1102/**
1103 * nand_read_param_page_op - Do a READ PARAMETER PAGE operation
1104 * @chip: The NAND chip
1105 * @page: parameter page to read
1106 * @buf: buffer used to store the data
1107 * @len: length of the buffer
1108 *
1109 * This function issues a READ PARAMETER PAGE operation.
1110 * This function does not select/unselect the CS line.
1111 *
1112 * Returns 0 on success, a negative error code otherwise.
1113 */
1114static int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
1115 unsigned int len)
1116{
1117 struct mtd_info *mtd = nand_to_mtd(chip);
1118 unsigned int i;
1119 u8 *p = buf;
1120
1121 if (len && !buf)
1122 return -EINVAL;
1123
1124 chip->cmdfunc(mtd, NAND_CMD_PARAM, page, -1);
1125 for (i = 0; i < len; i++)
1126 p[i] = chip->read_byte(mtd);
1127
1128 return 0;
1129}
1130
1131/**
1132 * nand_change_read_column_op - Do a CHANGE READ COLUMN operation
1133 * @chip: The NAND chip
1134 * @offset_in_page: offset within the page
1135 * @buf: buffer used to store the data
1136 * @len: length of the buffer
1137 * @force_8bit: force 8-bit bus access
1138 *
1139 * This function issues a CHANGE READ COLUMN operation.
1140 * This function does not select/unselect the CS line.
1141 *
1142 * Returns 0 on success, a negative error code otherwise.
1143 */
1144int nand_change_read_column_op(struct nand_chip *chip,
1145 unsigned int offset_in_page, void *buf,
1146 unsigned int len, bool force_8bit)
1147{
1148 struct mtd_info *mtd = nand_to_mtd(chip);
1149
1150 if (len && !buf)
1151 return -EINVAL;
1152
1153 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1154 return -EINVAL;
1155
1156 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset_in_page, -1);
1157 if (len)
1158 chip->read_buf(mtd, buf, len);
1159
1160 return 0;
1161}
1162EXPORT_SYMBOL_GPL(nand_change_read_column_op);
1163
1164/**
1165 * nand_read_oob_op - Do a READ OOB operation
1166 * @chip: The NAND chip
1167 * @page: page to read
1168 * @offset_in_oob: offset within the OOB area
1169 * @buf: buffer used to store the data
1170 * @len: length of the buffer
1171 *
1172 * This function issues a READ OOB operation.
1173 * This function does not select/unselect the CS line.
1174 *
1175 * Returns 0 on success, a negative error code otherwise.
1176 */
1177int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
1178 unsigned int offset_in_oob, void *buf, unsigned int len)
1179{
1180 struct mtd_info *mtd = nand_to_mtd(chip);
1181
1182 if (len && !buf)
1183 return -EINVAL;
1184
1185 if (offset_in_oob + len > mtd->oobsize)
1186 return -EINVAL;
1187
1188 chip->cmdfunc(mtd, NAND_CMD_READOOB, offset_in_oob, page);
1189 if (len)
1190 chip->read_buf(mtd, buf, len);
1191
1192 return 0;
1193}
1194EXPORT_SYMBOL_GPL(nand_read_oob_op);
1195
1196/**
1197 * nand_prog_page_begin_op - starts a PROG PAGE operation
1198 * @chip: The NAND chip
1199 * @page: page to write
1200 * @offset_in_page: offset within the page
1201 * @buf: buffer containing the data to write to the page
1202 * @len: length of the buffer
1203 *
1204 * This function issues the first half of a PROG PAGE operation.
1205 * This function does not select/unselect the CS line.
1206 *
1207 * Returns 0 on success, a negative error code otherwise.
1208 */
1209int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
1210 unsigned int offset_in_page, const void *buf,
1211 unsigned int len)
1212{
1213 struct mtd_info *mtd = nand_to_mtd(chip);
1214
1215 if (len && !buf)
1216 return -EINVAL;
1217
1218 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1219 return -EINVAL;
1220
1221 chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
1222
1223 if (buf)
1224 chip->write_buf(mtd, buf, len);
1225
1226 return 0;
1227}
1228EXPORT_SYMBOL_GPL(nand_prog_page_begin_op);
1229
1230/**
1231 * nand_prog_page_end_op - ends a PROG PAGE operation
1232 * @chip: The NAND chip
1233 *
1234 * This function issues the second half of a PROG PAGE operation.
1235 * This function does not select/unselect the CS line.
1236 *
1237 * Returns 0 on success, a negative error code otherwise.
1238 */
1239int nand_prog_page_end_op(struct nand_chip *chip)
1240{
1241 struct mtd_info *mtd = nand_to_mtd(chip);
1242 int status;
1243
1244 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1245
1246 status = chip->waitfunc(mtd, chip);
1247 if (status & NAND_STATUS_FAIL)
1248 return -EIO;
1249
1250 return 0;
1251}
1252EXPORT_SYMBOL_GPL(nand_prog_page_end_op);
1253
1254/**
1255 * nand_prog_page_op - Do a full PROG PAGE operation
1256 * @chip: The NAND chip
1257 * @page: page to write
1258 * @offset_in_page: offset within the page
1259 * @buf: buffer containing the data to write to the page
1260 * @len: length of the buffer
1261 *
1262 * This function issues a full PROG PAGE operation.
1263 * This function does not select/unselect the CS line.
1264 *
1265 * Returns 0 on success, a negative error code otherwise.
1266 */
1267int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
1268 unsigned int offset_in_page, const void *buf,
1269 unsigned int len)
1270{
1271 struct mtd_info *mtd = nand_to_mtd(chip);
1272 int status;
1273
1274 if (!len || !buf)
1275 return -EINVAL;
1276
1277 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1278 return -EINVAL;
1279
1280 chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
1281 chip->write_buf(mtd, buf, len);
1282 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1283
1284 status = chip->waitfunc(mtd, chip);
1285 if (status & NAND_STATUS_FAIL)
1286 return -EIO;
1287
1288 return 0;
1289}
1290EXPORT_SYMBOL_GPL(nand_prog_page_op);
1291
1292/**
1293 * nand_change_write_column_op - Do a CHANGE WRITE COLUMN operation
1294 * @chip: The NAND chip
1295 * @offset_in_page: offset within the page
1296 * @buf: buffer containing the data to send to the NAND
1297 * @len: length of the buffer
1298 * @force_8bit: force 8-bit bus access
1299 *
1300 * This function issues a CHANGE WRITE COLUMN operation.
1301 * This function does not select/unselect the CS line.
1302 *
1303 * Returns 0 on success, a negative error code otherwise.
1304 */
1305int nand_change_write_column_op(struct nand_chip *chip,
1306 unsigned int offset_in_page,
1307 const void *buf, unsigned int len,
1308 bool force_8bit)
1309{
1310 struct mtd_info *mtd = nand_to_mtd(chip);
1311
1312 if (len && !buf)
1313 return -EINVAL;
1314
1315 if (offset_in_page + len > mtd->writesize + mtd->oobsize)
1316 return -EINVAL;
1317
1318 chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset_in_page, -1);
1319 if (len)
1320 chip->write_buf(mtd, buf, len);
1321
1322 return 0;
1323}
1324EXPORT_SYMBOL_GPL(nand_change_write_column_op);
1325
1326/**
1327 * nand_readid_op - Do a READID operation
1328 * @chip: The NAND chip
1329 * @addr: address cycle to pass after the READID command
1330 * @buf: buffer used to store the ID
1331 * @len: length of the buffer
1332 *
1333 * This function sends a READID command and reads back the ID returned by the
1334 * NAND.
1335 * This function does not select/unselect the CS line.
1336 *
1337 * Returns 0 on success, a negative error code otherwise.
1338 */
1339int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
1340 unsigned int len)
1341{
1342 struct mtd_info *mtd = nand_to_mtd(chip);
1343 unsigned int i;
1344 u8 *id = buf;
1345
1346 if (len && !buf)
1347 return -EINVAL;
1348
1349 chip->cmdfunc(mtd, NAND_CMD_READID, addr, -1);
1350
1351 for (i = 0; i < len; i++)
1352 id[i] = chip->read_byte(mtd);
1353
1354 return 0;
1355}
1356EXPORT_SYMBOL_GPL(nand_readid_op);
1357
1358/**
1359 * nand_status_op - Do a STATUS operation
1360 * @chip: The NAND chip
1361 * @status: out variable to store the NAND status
1362 *
1363 * This function sends a STATUS command and reads back the status returned by
1364 * the NAND.
1365 * This function does not select/unselect the CS line.
1366 *
1367 * Returns 0 on success, a negative error code otherwise.
1368 */
1369int nand_status_op(struct nand_chip *chip, u8 *status)
1370{
1371 struct mtd_info *mtd = nand_to_mtd(chip);
1372
1373 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
1374 if (status)
1375 *status = chip->read_byte(mtd);
1376
1377 return 0;
1378}
1379EXPORT_SYMBOL_GPL(nand_status_op);
1380
1381/**
1382 * nand_exit_status_op - Exit a STATUS operation
1383 * @chip: The NAND chip
1384 *
1385 * This function sends a READ0 command to cancel the effect of the STATUS
1386 * command to avoid reading only the status until a new read command is sent.
1387 *
1388 * This function does not select/unselect the CS line.
1389 *
1390 * Returns 0 on success, a negative error code otherwise.
1391 */
1392int nand_exit_status_op(struct nand_chip *chip)
1393{
1394 struct mtd_info *mtd = nand_to_mtd(chip);
1395
1396 chip->cmdfunc(mtd, NAND_CMD_READ0, -1, -1);
1397
1398 return 0;
1399}
1400EXPORT_SYMBOL_GPL(nand_exit_status_op);
1401
1402/**
1403 * nand_erase_op - Do an erase operation
1404 * @chip: The NAND chip
1405 * @eraseblock: block to erase
1406 *
1407 * This function sends an ERASE command and waits for the NAND to be ready
1408 * before returning.
1409 * This function does not select/unselect the CS line.
1410 *
1411 * Returns 0 on success, a negative error code otherwise.
1412 */
1413int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
1414{
1415 struct mtd_info *mtd = nand_to_mtd(chip);
1416 unsigned int page = eraseblock <<
1417 (chip->phys_erase_shift - chip->page_shift);
1418 int status;
1419
1420 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1421 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1422
1423 status = chip->waitfunc(mtd, chip);
1424 if (status < 0)
1425 return status;
1426
1427 if (status & NAND_STATUS_FAIL)
1428 return -EIO;
1429
1430 return 0;
1431}
1432EXPORT_SYMBOL_GPL(nand_erase_op);
1433
1434/**
1435 * nand_set_features_op - Do a SET FEATURES operation
1436 * @chip: The NAND chip
1437 * @feature: feature id
1438 * @data: 4 bytes of data
1439 *
1440 * This function sends a SET FEATURES command and waits for the NAND to be
1441 * ready before returning.
1442 * This function does not select/unselect the CS line.
1443 *
1444 * Returns 0 on success, a negative error code otherwise.
1445 */
1446static int nand_set_features_op(struct nand_chip *chip, u8 feature,
1447 const void *data)
1448{
1449 struct mtd_info *mtd = nand_to_mtd(chip);
1450 const u8 *params = data;
1451 int i, status;
1452
1453 chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, feature, -1);
1454 for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
1455 chip->write_byte(mtd, params[i]);
1456
1457 status = chip->waitfunc(mtd, chip);
1458 if (status & NAND_STATUS_FAIL)
1459 return -EIO;
1460
1461 return 0;
1462}
1463
1464/**
1465 * nand_get_features_op - Do a GET FEATURES operation
1466 * @chip: The NAND chip
1467 * @feature: feature id
1468 * @data: 4 bytes of data
1469 *
1470 * This function sends a GET FEATURES command and waits for the NAND to be
1471 * ready before returning.
1472 * This function does not select/unselect the CS line.
1473 *
1474 * Returns 0 on success, a negative error code otherwise.
1475 */
1476static int nand_get_features_op(struct nand_chip *chip, u8 feature,
1477 void *data)
1478{
1479 struct mtd_info *mtd = nand_to_mtd(chip);
1480 u8 *params = data;
1481 int i;
1482
1483 chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, feature, -1);
1484 for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
1485 params[i] = chip->read_byte(mtd);
1486
1487 return 0;
1488}
1489
1490/**
1491 * nand_reset_op - Do a reset operation
1492 * @chip: The NAND chip
1493 *
1494 * This function sends a RESET command and waits for the NAND to be ready
1495 * before returning.
1496 * This function does not select/unselect the CS line.
1497 *
1498 * Returns 0 on success, a negative error code otherwise.
1499 */
1500int nand_reset_op(struct nand_chip *chip)
1501{
1502 struct mtd_info *mtd = nand_to_mtd(chip);
1503
1504 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1505
1506 return 0;
1507}
1508EXPORT_SYMBOL_GPL(nand_reset_op);
1509
1510/**
1511 * nand_read_data_op - Read data from the NAND
1512 * @chip: The NAND chip
1513 * @buf: buffer used to store the data
1514 * @len: length of the buffer
1515 * @force_8bit: force 8-bit bus access
1516 *
1517 * This function does a raw data read on the bus. Usually used after launching
1518 * another NAND operation like nand_read_page_op().
1519 * This function does not select/unselect the CS line.
1520 *
1521 * Returns 0 on success, a negative error code otherwise.
1522 */
1523int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len,
1524 bool force_8bit)
1525{
1526 struct mtd_info *mtd = nand_to_mtd(chip);
1527
1528 if (!len || !buf)
1529 return -EINVAL;
1530
1531 if (force_8bit) {
1532 u8 *p = buf;
1533 unsigned int i;
1534
1535 for (i = 0; i < len; i++)
1536 p[i] = chip->read_byte(mtd);
1537 } else {
1538 chip->read_buf(mtd, buf, len);
1539 }
1540
1541 return 0;
1542}
1543EXPORT_SYMBOL_GPL(nand_read_data_op);
1544
1545/**
1546 * nand_write_data_op - Write data from the NAND
1547 * @chip: The NAND chip
1548 * @buf: buffer containing the data to send on the bus
1549 * @len: length of the buffer
1550 * @force_8bit: force 8-bit bus access
1551 *
1552 * This function does a raw data write on the bus. Usually used after launching
1553 * another NAND operation like nand_write_page_begin_op().
1554 * This function does not select/unselect the CS line.
1555 *
1556 * Returns 0 on success, a negative error code otherwise.
1557 */
1558int nand_write_data_op(struct nand_chip *chip, const void *buf,
1559 unsigned int len, bool force_8bit)
1560{
1561 struct mtd_info *mtd = nand_to_mtd(chip);
1562
1563 if (!len || !buf)
1564 return -EINVAL;
1565
1566 if (force_8bit) {
1567 const u8 *p = buf;
1568 unsigned int i;
1569
1570 for (i = 0; i < len; i++)
1571 chip->write_byte(mtd, p[i]);
1572 } else {
1573 chip->write_buf(mtd, buf, len);
1574 }
1575
1576 return 0;
1577}
1578EXPORT_SYMBOL_GPL(nand_write_data_op);
1579
1580/**
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001581 * nand_reset - Reset and initialize a NAND device
1582 * @chip: The NAND chip
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001583 * @chipnr: Internal die id
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001584 *
1585 * Returns 0 for success or negative error code otherwise
1586 */
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001587int nand_reset(struct nand_chip *chip, int chipnr)
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001588{
1589 struct mtd_info *mtd = nand_to_mtd(chip);
Boris Brezillone509cba2017-11-22 02:38:19 +09001590 int ret;
1591
Boris Brezillon32935f42017-11-22 02:38:28 +09001592 ret = nand_reset_data_interface(chip, chipnr);
Boris Brezillone509cba2017-11-22 02:38:19 +09001593 if (ret)
1594 return ret;
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001595
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001596 /*
1597 * The CS line has to be released before we can apply the new NAND
1598 * interface settings, hence this weird ->select_chip() dance.
1599 */
1600 chip->select_chip(mtd, chipnr);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001601 ret = nand_reset_op(chip);
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001602 chip->select_chip(mtd, -1);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001603 if (ret)
1604 return ret;
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001605
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001606 chip->select_chip(mtd, chipnr);
Boris Brezillon32935f42017-11-22 02:38:28 +09001607 ret = nand_setup_data_interface(chip, chipnr);
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09001608 chip->select_chip(mtd, -1);
Boris Brezillone509cba2017-11-22 02:38:19 +09001609 if (ret)
1610 return ret;
1611
Sascha Hauer44ad3b92017-11-22 02:38:15 +09001612 return 0;
1613}
1614
1615/**
Scott Wood52ab7ce2016-05-30 13:57:58 -05001616 * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
1617 * @buf: buffer to test
1618 * @len: buffer length
1619 * @bitflips_threshold: maximum number of bitflips
1620 *
1621 * Check if a buffer contains only 0xff, which means the underlying region
1622 * has been erased and is ready to be programmed.
1623 * The bitflips_threshold specify the maximum number of bitflips before
1624 * considering the region is not erased.
1625 * Note: The logic of this function has been extracted from the memweight
1626 * implementation, except that nand_check_erased_buf function exit before
1627 * testing the whole buffer if the number of bitflips exceed the
1628 * bitflips_threshold value.
1629 *
1630 * Returns a positive number of bitflips less than or equal to
1631 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
1632 * threshold.
1633 */
1634static int nand_check_erased_buf(void *buf, int len, int bitflips_threshold)
1635{
1636 const unsigned char *bitmap = buf;
1637 int bitflips = 0;
1638 int weight;
1639
1640 for (; len && ((uintptr_t)bitmap) % sizeof(long);
1641 len--, bitmap++) {
1642 weight = hweight8(*bitmap);
1643 bitflips += BITS_PER_BYTE - weight;
1644 if (unlikely(bitflips > bitflips_threshold))
1645 return -EBADMSG;
1646 }
1647
1648 for (; len >= 4; len -= 4, bitmap += 4) {
1649 weight = hweight32(*((u32 *)bitmap));
1650 bitflips += 32 - weight;
1651 if (unlikely(bitflips > bitflips_threshold))
1652 return -EBADMSG;
1653 }
1654
1655 for (; len > 0; len--, bitmap++) {
1656 weight = hweight8(*bitmap);
1657 bitflips += BITS_PER_BYTE - weight;
1658 if (unlikely(bitflips > bitflips_threshold))
1659 return -EBADMSG;
1660 }
1661
1662 return bitflips;
1663}
1664
1665/**
1666 * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
1667 * 0xff data
1668 * @data: data buffer to test
1669 * @datalen: data length
1670 * @ecc: ECC buffer
1671 * @ecclen: ECC length
1672 * @extraoob: extra OOB buffer
1673 * @extraooblen: extra OOB length
1674 * @bitflips_threshold: maximum number of bitflips
1675 *
1676 * Check if a data buffer and its associated ECC and OOB data contains only
1677 * 0xff pattern, which means the underlying region has been erased and is
1678 * ready to be programmed.
1679 * The bitflips_threshold specify the maximum number of bitflips before
1680 * considering the region as not erased.
1681 *
1682 * Note:
1683 * 1/ ECC algorithms are working on pre-defined block sizes which are usually
1684 * different from the NAND page size. When fixing bitflips, ECC engines will
1685 * report the number of errors per chunk, and the NAND core infrastructure
1686 * expect you to return the maximum number of bitflips for the whole page.
1687 * This is why you should always use this function on a single chunk and
1688 * not on the whole page. After checking each chunk you should update your
1689 * max_bitflips value accordingly.
1690 * 2/ When checking for bitflips in erased pages you should not only check
1691 * the payload data but also their associated ECC data, because a user might
1692 * have programmed almost all bits to 1 but a few. In this case, we
1693 * shouldn't consider the chunk as erased, and checking ECC bytes prevent
1694 * this case.
1695 * 3/ The extraoob argument is optional, and should be used if some of your OOB
1696 * data are protected by the ECC engine.
1697 * It could also be used if you support subpages and want to attach some
1698 * extra OOB data to an ECC chunk.
1699 *
1700 * Returns a positive number of bitflips less than or equal to
1701 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
1702 * threshold. In case of success, the passed buffers are filled with 0xff.
1703 */
1704int nand_check_erased_ecc_chunk(void *data, int datalen,
1705 void *ecc, int ecclen,
1706 void *extraoob, int extraooblen,
1707 int bitflips_threshold)
1708{
1709 int data_bitflips = 0, ecc_bitflips = 0, extraoob_bitflips = 0;
1710
1711 data_bitflips = nand_check_erased_buf(data, datalen,
1712 bitflips_threshold);
1713 if (data_bitflips < 0)
1714 return data_bitflips;
1715
1716 bitflips_threshold -= data_bitflips;
1717
1718 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold);
1719 if (ecc_bitflips < 0)
1720 return ecc_bitflips;
1721
1722 bitflips_threshold -= ecc_bitflips;
1723
1724 extraoob_bitflips = nand_check_erased_buf(extraoob, extraooblen,
1725 bitflips_threshold);
1726 if (extraoob_bitflips < 0)
1727 return extraoob_bitflips;
1728
1729 if (data_bitflips)
1730 memset(data, 0xff, datalen);
1731
1732 if (ecc_bitflips)
1733 memset(ecc, 0xff, ecclen);
1734
1735 if (extraoob_bitflips)
1736 memset(extraoob, 0xff, extraooblen);
1737
1738 return data_bitflips + ecc_bitflips + extraoob_bitflips;
1739}
1740EXPORT_SYMBOL(nand_check_erased_ecc_chunk);
Heiko Schocherf5895d12014-06-24 10:10:04 +02001741
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001742/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00001743 * nand_read_page_raw - [INTERN] read raw page data without ecc
1744 * @mtd: mtd info structure
1745 * @chip: nand chip info structure
1746 * @buf: buffer to store read data
1747 * @oob_required: caller requires OOB data read to chip->oob_poi
1748 * @page: page number to read
David Brownellee86b8d2009-11-07 16:27:01 -05001749 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00001750 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001751 */
William Juul52c07962007-10-31 13:53:06 +01001752static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00001753 uint8_t *buf, int oob_required, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001754{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001755 int ret;
1756
1757 ret = nand_read_data_op(chip, buf, mtd->writesize, false);
1758 if (ret)
1759 return ret;
1760
1761 if (oob_required) {
1762 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize,
1763 false);
1764 if (ret)
1765 return ret;
1766 }
1767
William Juul52c07962007-10-31 13:53:06 +01001768 return 0;
1769}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001770
William Juul52c07962007-10-31 13:53:06 +01001771/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00001772 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
1773 * @mtd: mtd info structure
1774 * @chip: nand chip info structure
1775 * @buf: buffer to store read data
1776 * @oob_required: caller requires OOB data read to chip->oob_poi
1777 * @page: page number to read
David Brownellee86b8d2009-11-07 16:27:01 -05001778 *
1779 * We need a special oob layout and handling even when OOB isn't used.
1780 */
Christian Hitz13fc0e22011-10-12 09:32:01 +02001781static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
Sergey Lapin3a38a552013-01-14 03:46:50 +00001782 struct nand_chip *chip, uint8_t *buf,
1783 int oob_required, int page)
David Brownellee86b8d2009-11-07 16:27:01 -05001784{
1785 int eccsize = chip->ecc.size;
1786 int eccbytes = chip->ecc.bytes;
1787 uint8_t *oob = chip->oob_poi;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001788 int steps, size, ret;
David Brownellee86b8d2009-11-07 16:27:01 -05001789
1790 for (steps = chip->ecc.steps; steps > 0; steps--) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001791 ret = nand_read_data_op(chip, buf, eccsize, false);
1792 if (ret)
1793 return ret;
1794
David Brownellee86b8d2009-11-07 16:27:01 -05001795 buf += eccsize;
1796
1797 if (chip->ecc.prepad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001798 ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
1799 false);
1800 if (ret)
1801 return ret;
1802
David Brownellee86b8d2009-11-07 16:27:01 -05001803 oob += chip->ecc.prepad;
1804 }
1805
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001806 ret = nand_read_data_op(chip, oob, eccbytes, false);
1807 if (ret)
1808 return ret;
1809
David Brownellee86b8d2009-11-07 16:27:01 -05001810 oob += eccbytes;
1811
1812 if (chip->ecc.postpad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001813 ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
1814 false);
1815 if (ret)
1816 return ret;
1817
David Brownellee86b8d2009-11-07 16:27:01 -05001818 oob += chip->ecc.postpad;
1819 }
1820 }
1821
1822 size = mtd->oobsize - (oob - chip->oob_poi);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001823 if (size) {
1824 ret = nand_read_data_op(chip, oob, size, false);
1825 if (ret)
1826 return ret;
1827 }
David Brownellee86b8d2009-11-07 16:27:01 -05001828
1829 return 0;
1830}
1831
1832/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00001833 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
1834 * @mtd: mtd info structure
1835 * @chip: nand chip info structure
1836 * @buf: buffer to store read data
1837 * @oob_required: caller requires OOB data read to chip->oob_poi
1838 * @page: page number to read
William Juul52c07962007-10-31 13:53:06 +01001839 */
1840static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00001841 uint8_t *buf, int oob_required, int page)
William Juul52c07962007-10-31 13:53:06 +01001842{
1843 int i, eccsize = chip->ecc.size;
1844 int eccbytes = chip->ecc.bytes;
1845 int eccsteps = chip->ecc.steps;
1846 uint8_t *p = buf;
1847 uint8_t *ecc_calc = chip->buffers->ecccalc;
1848 uint8_t *ecc_code = chip->buffers->ecccode;
1849 uint32_t *eccpos = chip->ecc.layout->eccpos;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001850 unsigned int max_bitflips = 0;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001851
Sergey Lapin3a38a552013-01-14 03:46:50 +00001852 chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001853
William Juul52c07962007-10-31 13:53:06 +01001854 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1855 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001856
William Juul52c07962007-10-31 13:53:06 +01001857 for (i = 0; i < chip->ecc.total; i++)
1858 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001859
William Juul52c07962007-10-31 13:53:06 +01001860 eccsteps = chip->ecc.steps;
1861 p = buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001862
William Juul52c07962007-10-31 13:53:06 +01001863 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1864 int stat;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001865
William Juul52c07962007-10-31 13:53:06 +01001866 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Heiko Schocherf5895d12014-06-24 10:10:04 +02001867 if (stat < 0) {
William Juul52c07962007-10-31 13:53:06 +01001868 mtd->ecc_stats.failed++;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001869 } else {
William Juul52c07962007-10-31 13:53:06 +01001870 mtd->ecc_stats.corrected += stat;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001871 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1872 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001873 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02001874 return max_bitflips;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001875}
1876
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001877/**
Heiko Schocherf5895d12014-06-24 10:10:04 +02001878 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
Sergey Lapin3a38a552013-01-14 03:46:50 +00001879 * @mtd: mtd info structure
1880 * @chip: nand chip info structure
1881 * @data_offs: offset of requested data within the page
1882 * @readlen: data length
1883 * @bufpoi: buffer to store read data
Heiko Schocher081fe9e2014-07-15 16:08:43 +02001884 * @page: page number to read
Scott Wood3628f002008-10-24 16:20:43 -05001885 */
Christian Hitz13fc0e22011-10-12 09:32:01 +02001886static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
Heiko Schocher081fe9e2014-07-15 16:08:43 +02001887 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi,
1888 int page)
Scott Wood3628f002008-10-24 16:20:43 -05001889{
1890 int start_step, end_step, num_steps;
1891 uint32_t *eccpos = chip->ecc.layout->eccpos;
1892 uint8_t *p;
1893 int data_col_addr, i, gaps = 0;
1894 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
1895 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02001896 int index;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001897 unsigned int max_bitflips = 0;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001898 int ret;
Scott Wood3628f002008-10-24 16:20:43 -05001899
Sergey Lapin3a38a552013-01-14 03:46:50 +00001900 /* Column address within the page aligned to ECC size (256bytes) */
Scott Wood3628f002008-10-24 16:20:43 -05001901 start_step = data_offs / chip->ecc.size;
1902 end_step = (data_offs + readlen - 1) / chip->ecc.size;
1903 num_steps = end_step - start_step + 1;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02001904 index = start_step * chip->ecc.bytes;
Scott Wood3628f002008-10-24 16:20:43 -05001905
Sergey Lapin3a38a552013-01-14 03:46:50 +00001906 /* Data size aligned to ECC ecc.size */
Scott Wood3628f002008-10-24 16:20:43 -05001907 datafrag_len = num_steps * chip->ecc.size;
1908 eccfrag_len = num_steps * chip->ecc.bytes;
1909
1910 data_col_addr = start_step * chip->ecc.size;
1911 /* If we read not a page aligned data */
1912 if (data_col_addr != 0)
1913 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
1914
1915 p = bufpoi + data_col_addr;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001916 ret = nand_read_data_op(chip, p, datafrag_len, false);
1917 if (ret)
1918 return ret;
Scott Wood3628f002008-10-24 16:20:43 -05001919
Sergey Lapin3a38a552013-01-14 03:46:50 +00001920 /* Calculate ECC */
Scott Wood3628f002008-10-24 16:20:43 -05001921 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
1922 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
1923
Sergey Lapin3a38a552013-01-14 03:46:50 +00001924 /*
1925 * The performance is faster if we position offsets according to
1926 * ecc.pos. Let's make sure that there are no gaps in ECC positions.
1927 */
Scott Wood3628f002008-10-24 16:20:43 -05001928 for (i = 0; i < eccfrag_len - 1; i++) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05001929 if (eccpos[i + index] + 1 != eccpos[i + index + 1]) {
Scott Wood3628f002008-10-24 16:20:43 -05001930 gaps = 1;
1931 break;
1932 }
1933 }
1934 if (gaps) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001935 ret = nand_change_read_column_op(chip, mtd->writesize,
1936 chip->oob_poi, mtd->oobsize,
1937 false);
1938 if (ret)
1939 return ret;
Scott Wood3628f002008-10-24 16:20:43 -05001940 } else {
Sergey Lapin3a38a552013-01-14 03:46:50 +00001941 /*
1942 * Send the command to read the particular ECC bytes take care
1943 * about buswidth alignment in read_buf.
1944 */
Christian Hitzb8a6b372011-10-12 09:32:02 +02001945 aligned_pos = eccpos[index] & ~(busw - 1);
Scott Wood3628f002008-10-24 16:20:43 -05001946 aligned_len = eccfrag_len;
Christian Hitzb8a6b372011-10-12 09:32:02 +02001947 if (eccpos[index] & (busw - 1))
Scott Wood3628f002008-10-24 16:20:43 -05001948 aligned_len++;
Christian Hitzb8a6b372011-10-12 09:32:02 +02001949 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
Scott Wood3628f002008-10-24 16:20:43 -05001950 aligned_len++;
1951
Boris Brezillon16ee8f62019-03-15 15:14:32 +01001952 ret = nand_change_read_column_op(chip,
1953 mtd->writesize + aligned_pos,
1954 &chip->oob_poi[aligned_pos],
1955 aligned_len, false);
1956 if (ret)
1957 return ret;
Scott Wood3628f002008-10-24 16:20:43 -05001958 }
1959
1960 for (i = 0; i < eccfrag_len; i++)
Christian Hitzb8a6b372011-10-12 09:32:02 +02001961 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
Scott Wood3628f002008-10-24 16:20:43 -05001962
1963 p = bufpoi + data_col_addr;
1964 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
1965 int stat;
1966
Christian Hitzb8a6b372011-10-12 09:32:02 +02001967 stat = chip->ecc.correct(mtd, p,
1968 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
Scott Wood52ab7ce2016-05-30 13:57:58 -05001969 if (stat == -EBADMSG &&
1970 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
1971 /* check for empty pages with bitflips */
1972 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,
1973 &chip->buffers->ecccode[i],
1974 chip->ecc.bytes,
1975 NULL, 0,
1976 chip->ecc.strength);
1977 }
1978
Heiko Schocherf5895d12014-06-24 10:10:04 +02001979 if (stat < 0) {
Scott Wood3628f002008-10-24 16:20:43 -05001980 mtd->ecc_stats.failed++;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001981 } else {
Scott Wood3628f002008-10-24 16:20:43 -05001982 mtd->ecc_stats.corrected += stat;
Heiko Schocherf5895d12014-06-24 10:10:04 +02001983 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1984 }
Scott Wood3628f002008-10-24 16:20:43 -05001985 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02001986 return max_bitflips;
Scott Wood3628f002008-10-24 16:20:43 -05001987}
1988
1989/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00001990 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
1991 * @mtd: mtd info structure
1992 * @chip: nand chip info structure
1993 * @buf: buffer to store read data
1994 * @oob_required: caller requires OOB data read to chip->oob_poi
1995 * @page: page number to read
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001996 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00001997 * Not for syndrome calculating ECC controllers which need a special oob layout.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02001998 */
William Juul52c07962007-10-31 13:53:06 +01001999static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002000 uint8_t *buf, int oob_required, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002001{
William Juul52c07962007-10-31 13:53:06 +01002002 int i, eccsize = chip->ecc.size;
2003 int eccbytes = chip->ecc.bytes;
2004 int eccsteps = chip->ecc.steps;
2005 uint8_t *p = buf;
2006 uint8_t *ecc_calc = chip->buffers->ecccalc;
2007 uint8_t *ecc_code = chip->buffers->ecccode;
2008 uint32_t *eccpos = chip->ecc.layout->eccpos;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002009 unsigned int max_bitflips = 0;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002010 int ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002011
William Juul52c07962007-10-31 13:53:06 +01002012 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2013 chip->ecc.hwctl(mtd, NAND_ECC_READ);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002014
2015 ret = nand_read_data_op(chip, p, eccsize, false);
2016 if (ret)
2017 return ret;
2018
William Juul52c07962007-10-31 13:53:06 +01002019 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
2020 }
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002021
2022 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false);
2023 if (ret)
2024 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002025
William Juul52c07962007-10-31 13:53:06 +01002026 for (i = 0; i < chip->ecc.total; i++)
2027 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002028
William Juul52c07962007-10-31 13:53:06 +01002029 eccsteps = chip->ecc.steps;
2030 p = buf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002031
William Juul52c07962007-10-31 13:53:06 +01002032 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2033 int stat;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002034
William Juul52c07962007-10-31 13:53:06 +01002035 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Scott Wood52ab7ce2016-05-30 13:57:58 -05002036 if (stat == -EBADMSG &&
2037 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
2038 /* check for empty pages with bitflips */
2039 stat = nand_check_erased_ecc_chunk(p, eccsize,
2040 &ecc_code[i], eccbytes,
2041 NULL, 0,
2042 chip->ecc.strength);
2043 }
2044
Heiko Schocherf5895d12014-06-24 10:10:04 +02002045 if (stat < 0) {
William Juul52c07962007-10-31 13:53:06 +01002046 mtd->ecc_stats.failed++;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002047 } else {
William Juul52c07962007-10-31 13:53:06 +01002048 mtd->ecc_stats.corrected += stat;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002049 max_bitflips = max_t(unsigned int, max_bitflips, stat);
2050 }
William Juul52c07962007-10-31 13:53:06 +01002051 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002052 return max_bitflips;
William Juul52c07962007-10-31 13:53:06 +01002053}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002054
William Juul52c07962007-10-31 13:53:06 +01002055/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002056 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
2057 * @mtd: mtd info structure
2058 * @chip: nand chip info structure
2059 * @buf: buffer to store read data
2060 * @oob_required: caller requires OOB data read to chip->oob_poi
2061 * @page: page number to read
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002062 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002063 * Hardware ECC for large page chips, require OOB to be read first. For this
2064 * ECC mode, the write_page method is re-used from ECC_HW. These methods
2065 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
2066 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
2067 * the data area, by overwriting the NAND manufacturer bad block markings.
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002068 */
2069static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002070 struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002071{
2072 int i, eccsize = chip->ecc.size;
2073 int eccbytes = chip->ecc.bytes;
2074 int eccsteps = chip->ecc.steps;
2075 uint8_t *p = buf;
2076 uint8_t *ecc_code = chip->buffers->ecccode;
2077 uint32_t *eccpos = chip->ecc.layout->eccpos;
2078 uint8_t *ecc_calc = chip->buffers->ecccalc;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002079 unsigned int max_bitflips = 0;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002080 int ret;
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002081
2082 /* Read the OOB area first */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002083 ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
2084 if (ret)
2085 return ret;
2086
2087 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2088 if (ret)
2089 return ret;
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002090
2091 for (i = 0; i < chip->ecc.total; i++)
2092 ecc_code[i] = chip->oob_poi[eccpos[i]];
2093
2094 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2095 int stat;
2096
2097 chip->ecc.hwctl(mtd, NAND_ECC_READ);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002098
2099 ret = nand_read_data_op(chip, p, eccsize, false);
2100 if (ret)
2101 return ret;
2102
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002103 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
2104
2105 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
Scott Wood52ab7ce2016-05-30 13:57:58 -05002106 if (stat == -EBADMSG &&
2107 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
2108 /* check for empty pages with bitflips */
2109 stat = nand_check_erased_ecc_chunk(p, eccsize,
2110 &ecc_code[i], eccbytes,
2111 NULL, 0,
2112 chip->ecc.strength);
2113 }
2114
Heiko Schocherf5895d12014-06-24 10:10:04 +02002115 if (stat < 0) {
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002116 mtd->ecc_stats.failed++;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002117 } else {
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002118 mtd->ecc_stats.corrected += stat;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002119 max_bitflips = max_t(unsigned int, max_bitflips, stat);
2120 }
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002121 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002122 return max_bitflips;
Sandeep Paulrajdea40702009-08-10 13:27:56 -04002123}
2124
2125/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002126 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
2127 * @mtd: mtd info structure
2128 * @chip: nand chip info structure
2129 * @buf: buffer to store read data
2130 * @oob_required: caller requires OOB data read to chip->oob_poi
2131 * @page: page number to read
William Juul52c07962007-10-31 13:53:06 +01002132 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002133 * The hw generator calculates the error syndrome automatically. Therefore we
2134 * need a special oob layout and handling.
William Juul52c07962007-10-31 13:53:06 +01002135 */
2136static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002137 uint8_t *buf, int oob_required, int page)
William Juul52c07962007-10-31 13:53:06 +01002138{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002139 int ret, i, eccsize = chip->ecc.size;
William Juul52c07962007-10-31 13:53:06 +01002140 int eccbytes = chip->ecc.bytes;
2141 int eccsteps = chip->ecc.steps;
Scott Wood52ab7ce2016-05-30 13:57:58 -05002142 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
William Juul52c07962007-10-31 13:53:06 +01002143 uint8_t *p = buf;
2144 uint8_t *oob = chip->oob_poi;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002145 unsigned int max_bitflips = 0;
William Juul52c07962007-10-31 13:53:06 +01002146
2147 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2148 int stat;
2149
2150 chip->ecc.hwctl(mtd, NAND_ECC_READ);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002151
2152 ret = nand_read_data_op(chip, p, eccsize, false);
2153 if (ret)
2154 return ret;
William Juul52c07962007-10-31 13:53:06 +01002155
2156 if (chip->ecc.prepad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002157 ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
2158 false);
2159 if (ret)
2160 return ret;
2161
William Juul52c07962007-10-31 13:53:06 +01002162 oob += chip->ecc.prepad;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002163 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002164
William Juul52c07962007-10-31 13:53:06 +01002165 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002166
2167 ret = nand_read_data_op(chip, oob, eccbytes, false);
2168 if (ret)
2169 return ret;
2170
William Juul52c07962007-10-31 13:53:06 +01002171 stat = chip->ecc.correct(mtd, p, oob, NULL);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002172
William Juul52c07962007-10-31 13:53:06 +01002173 oob += eccbytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002174
William Juul52c07962007-10-31 13:53:06 +01002175 if (chip->ecc.postpad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002176 ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
2177 false);
2178 if (ret)
2179 return ret;
2180
William Juul52c07962007-10-31 13:53:06 +01002181 oob += chip->ecc.postpad;
2182 }
Scott Wood52ab7ce2016-05-30 13:57:58 -05002183
2184 if (stat == -EBADMSG &&
2185 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
2186 /* check for empty pages with bitflips */
2187 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,
2188 oob - eccpadbytes,
2189 eccpadbytes,
2190 NULL, 0,
2191 chip->ecc.strength);
2192 }
2193
2194 if (stat < 0) {
2195 mtd->ecc_stats.failed++;
2196 } else {
2197 mtd->ecc_stats.corrected += stat;
2198 max_bitflips = max_t(unsigned int, max_bitflips, stat);
2199 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002200 }
William Juul52c07962007-10-31 13:53:06 +01002201
2202 /* Calculate remaining oob bytes */
2203 i = mtd->oobsize - (oob - chip->oob_poi);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002204 if (i) {
2205 ret = nand_read_data_op(chip, oob, i, false);
2206 if (ret)
2207 return ret;
2208 }
William Juul52c07962007-10-31 13:53:06 +01002209
Heiko Schocherf5895d12014-06-24 10:10:04 +02002210 return max_bitflips;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002211}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002212
2213/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002214 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
2215 * @chip: nand chip structure
2216 * @oob: oob destination address
2217 * @ops: oob ops structure
2218 * @len: size of oob to transfer
William Juul52c07962007-10-31 13:53:06 +01002219 */
2220static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
2221 struct mtd_oob_ops *ops, size_t len)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002222{
Christian Hitz13fc0e22011-10-12 09:32:01 +02002223 switch (ops->mode) {
William Juul52c07962007-10-31 13:53:06 +01002224
Sergey Lapin3a38a552013-01-14 03:46:50 +00002225 case MTD_OPS_PLACE_OOB:
2226 case MTD_OPS_RAW:
William Juul52c07962007-10-31 13:53:06 +01002227 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
2228 return oob + len;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002229
Sergey Lapin3a38a552013-01-14 03:46:50 +00002230 case MTD_OPS_AUTO_OOB: {
William Juul52c07962007-10-31 13:53:06 +01002231 struct nand_oobfree *free = chip->ecc.layout->oobfree;
2232 uint32_t boffs = 0, roffs = ops->ooboffs;
2233 size_t bytes = 0;
2234
Christian Hitz13fc0e22011-10-12 09:32:01 +02002235 for (; free->length && len; free++, len -= bytes) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00002236 /* Read request not from offset 0? */
William Juul52c07962007-10-31 13:53:06 +01002237 if (unlikely(roffs)) {
2238 if (roffs >= free->length) {
2239 roffs -= free->length;
2240 continue;
2241 }
2242 boffs = free->offset + roffs;
2243 bytes = min_t(size_t, len,
2244 (free->length - roffs));
2245 roffs = 0;
2246 } else {
2247 bytes = min_t(size_t, len, free->length);
2248 boffs = free->offset;
2249 }
2250 memcpy(oob, chip->oob_poi + boffs, bytes);
2251 oob += bytes;
2252 }
2253 return oob;
2254 }
2255 default:
2256 BUG();
2257 }
2258 return NULL;
2259}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002260
2261/**
Heiko Schocherf5895d12014-06-24 10:10:04 +02002262 * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
2263 * @mtd: MTD device structure
2264 * @retry_mode: the retry mode to use
2265 *
2266 * Some vendors supply a special command to shift the Vt threshold, to be used
2267 * when there are too many bitflips in a page (i.e., ECC error). After setting
2268 * a new threshold, the host should retry reading the page.
2269 */
2270static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)
2271{
Scott Wood17fed142016-05-30 13:57:56 -05002272 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +02002273
2274 pr_debug("setting READ RETRY mode %d\n", retry_mode);
2275
2276 if (retry_mode >= chip->read_retries)
2277 return -EINVAL;
2278
2279 if (!chip->setup_read_retry)
2280 return -EOPNOTSUPP;
2281
2282 return chip->setup_read_retry(mtd, retry_mode);
2283}
2284
2285/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002286 * nand_do_read_ops - [INTERN] Read data with ECC
2287 * @mtd: MTD device structure
2288 * @from: offset to read from
2289 * @ops: oob ops structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002290 *
William Juul52c07962007-10-31 13:53:06 +01002291 * Internal function. Called with chip held.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002292 */
William Juul52c07962007-10-31 13:53:06 +01002293static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
2294 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002295{
Sergey Lapin3a38a552013-01-14 03:46:50 +00002296 int chipnr, page, realpage, col, bytes, aligned, oob_required;
Scott Wood17fed142016-05-30 13:57:56 -05002297 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +01002298 int ret = 0;
2299 uint32_t readlen = ops->len;
2300 uint32_t oobreadlen = ops->ooblen;
Scott Wood52ab7ce2016-05-30 13:57:58 -05002301 uint32_t max_oobsize = mtd_oobavail(mtd, ops);
Christian Hitzb8a6b372011-10-12 09:32:02 +02002302
William Juul52c07962007-10-31 13:53:06 +01002303 uint8_t *bufpoi, *oob, *buf;
Scott Wood3ea94ed2015-06-26 19:03:26 -05002304 int use_bufpoi;
Paul Burton700a76c2013-09-04 15:16:56 +01002305 unsigned int max_bitflips = 0;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002306 int retry_mode = 0;
2307 bool ecc_fail = false;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002308
William Juul52c07962007-10-31 13:53:06 +01002309 chipnr = (int)(from >> chip->chip_shift);
2310 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002311
William Juul52c07962007-10-31 13:53:06 +01002312 realpage = (int)(from >> chip->page_shift);
2313 page = realpage & chip->pagemask;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002314
William Juul52c07962007-10-31 13:53:06 +01002315 col = (int)(from & (mtd->writesize - 1));
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002316
William Juul52c07962007-10-31 13:53:06 +01002317 buf = ops->datbuf;
2318 oob = ops->oobbuf;
Sergey Lapin3a38a552013-01-14 03:46:50 +00002319 oob_required = oob ? 1 : 0;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002320
Christian Hitz13fc0e22011-10-12 09:32:01 +02002321 while (1) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02002322 unsigned int ecc_failures = mtd->ecc_stats.failed;
Scott Woodea95b642011-02-02 18:15:57 -06002323
Stefan Roese80877fa2022-09-02 14:10:46 +02002324 schedule();
William Juul52c07962007-10-31 13:53:06 +01002325 bytes = min(mtd->writesize - col, readlen);
2326 aligned = (bytes == mtd->writesize);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002327
Scott Wood3ea94ed2015-06-26 19:03:26 -05002328 if (!aligned)
2329 use_bufpoi = 1;
Masahiro Yamadab9c07b62017-11-22 02:38:27 +09002330 else if (chip->options & NAND_USE_BOUNCE_BUFFER)
2331 use_bufpoi = !IS_ALIGNED((unsigned long)buf,
2332 chip->buf_align);
Scott Wood3ea94ed2015-06-26 19:03:26 -05002333 else
2334 use_bufpoi = 0;
2335
Sergey Lapin3a38a552013-01-14 03:46:50 +00002336 /* Is the current page in the buffer? */
William Juul52c07962007-10-31 13:53:06 +01002337 if (realpage != chip->pagebuf || oob) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05002338 bufpoi = use_bufpoi ? chip->buffers->databuf : buf;
2339
2340 if (use_bufpoi && aligned)
2341 pr_debug("%s: using read bounce buffer for buf@%p\n",
2342 __func__, buf);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002343
Heiko Schocherf5895d12014-06-24 10:10:04 +02002344read_retry:
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002345 if (nand_standard_page_accessors(&chip->ecc)) {
2346 ret = nand_read_page_op(chip, page, 0, NULL, 0);
2347 if (ret)
2348 break;
2349 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002350
Paul Burton700a76c2013-09-04 15:16:56 +01002351 /*
2352 * Now read the page into the buffer. Absent an error,
2353 * the read methods return max bitflips per ecc step.
2354 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002355 if (unlikely(ops->mode == MTD_OPS_RAW))
2356 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
2357 oob_required,
2358 page);
Joe Hershberger7a38ffa2012-11-05 06:46:31 +00002359 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
Heiko Schocherf5895d12014-06-24 10:10:04 +02002360 !oob)
Christian Hitz13fc0e22011-10-12 09:32:01 +02002361 ret = chip->ecc.read_subpage(mtd, chip,
Heiko Schocher081fe9e2014-07-15 16:08:43 +02002362 col, bytes, bufpoi,
2363 page);
William Juul52c07962007-10-31 13:53:06 +01002364 else
Sandeep Paulraj883189e2009-08-10 13:27:46 -04002365 ret = chip->ecc.read_page(mtd, chip, bufpoi,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002366 oob_required, page);
2367 if (ret < 0) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05002368 if (use_bufpoi)
Sergey Lapin3a38a552013-01-14 03:46:50 +00002369 /* Invalidate page cache */
2370 chip->pagebuf = -1;
William Juul52c07962007-10-31 13:53:06 +01002371 break;
Sergey Lapin3a38a552013-01-14 03:46:50 +00002372 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002373
Paul Burton700a76c2013-09-04 15:16:56 +01002374 max_bitflips = max_t(unsigned int, max_bitflips, ret);
2375
William Juul52c07962007-10-31 13:53:06 +01002376 /* Transfer not aligned data */
Scott Wood3ea94ed2015-06-26 19:03:26 -05002377 if (use_bufpoi) {
Joe Hershberger7a38ffa2012-11-05 06:46:31 +00002378 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
Heiko Schocherf5895d12014-06-24 10:10:04 +02002379 !(mtd->ecc_stats.failed - ecc_failures) &&
Paul Burton700a76c2013-09-04 15:16:56 +01002380 (ops->mode != MTD_OPS_RAW)) {
Scott Wood3628f002008-10-24 16:20:43 -05002381 chip->pagebuf = realpage;
Paul Burton700a76c2013-09-04 15:16:56 +01002382 chip->pagebuf_bitflips = ret;
2383 } else {
Sergey Lapin3a38a552013-01-14 03:46:50 +00002384 /* Invalidate page cache */
2385 chip->pagebuf = -1;
Paul Burton700a76c2013-09-04 15:16:56 +01002386 }
William Juul52c07962007-10-31 13:53:06 +01002387 memcpy(buf, chip->buffers->databuf + col, bytes);
2388 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002389
William Juul52c07962007-10-31 13:53:06 +01002390 if (unlikely(oob)) {
Christian Hitzb8a6b372011-10-12 09:32:02 +02002391 int toread = min(oobreadlen, max_oobsize);
2392
2393 if (toread) {
2394 oob = nand_transfer_oob(chip,
2395 oob, ops, toread);
2396 oobreadlen -= toread;
2397 }
William Juul52c07962007-10-31 13:53:06 +01002398 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002399
2400 if (chip->options & NAND_NEED_READRDY) {
2401 /* Apply delay or wait for ready/busy pin */
2402 if (!chip->dev_ready)
2403 udelay(chip->chip_delay);
2404 else
2405 nand_wait_ready(mtd);
2406 }
2407
2408 if (mtd->ecc_stats.failed - ecc_failures) {
2409 if (retry_mode + 1 < chip->read_retries) {
2410 retry_mode++;
2411 ret = nand_setup_read_retry(mtd,
2412 retry_mode);
2413 if (ret < 0)
2414 break;
2415
2416 /* Reset failures; retry */
2417 mtd->ecc_stats.failed = ecc_failures;
2418 goto read_retry;
2419 } else {
2420 /* No more retry modes; real failure */
2421 ecc_fail = true;
2422 }
2423 }
2424
2425 buf += bytes;
William Juul52c07962007-10-31 13:53:06 +01002426 } else {
2427 memcpy(buf, chip->buffers->databuf + col, bytes);
2428 buf += bytes;
Paul Burton700a76c2013-09-04 15:16:56 +01002429 max_bitflips = max_t(unsigned int, max_bitflips,
2430 chip->pagebuf_bitflips);
William Juul52c07962007-10-31 13:53:06 +01002431 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002432
William Juul52c07962007-10-31 13:53:06 +01002433 readlen -= bytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002434
Heiko Schocherf5895d12014-06-24 10:10:04 +02002435 /* Reset to retry mode 0 */
2436 if (retry_mode) {
2437 ret = nand_setup_read_retry(mtd, 0);
2438 if (ret < 0)
2439 break;
2440 retry_mode = 0;
2441 }
2442
William Juul52c07962007-10-31 13:53:06 +01002443 if (!readlen)
2444 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002445
Sergey Lapin3a38a552013-01-14 03:46:50 +00002446 /* For subsequent reads align to page boundary */
William Juul52c07962007-10-31 13:53:06 +01002447 col = 0;
2448 /* Increment page address */
2449 realpage++;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002450
William Juul52c07962007-10-31 13:53:06 +01002451 page = realpage & chip->pagemask;
2452 /* Check, if we cross a chip boundary */
2453 if (!page) {
2454 chipnr++;
2455 chip->select_chip(mtd, -1);
2456 chip->select_chip(mtd, chipnr);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002457 }
William Juul52c07962007-10-31 13:53:06 +01002458 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002459 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002460
William Juul52c07962007-10-31 13:53:06 +01002461 ops->retlen = ops->len - (size_t) readlen;
2462 if (oob)
2463 ops->oobretlen = ops->ooblen - oobreadlen;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002464
Heiko Schocherf5895d12014-06-24 10:10:04 +02002465 if (ret < 0)
William Juul52c07962007-10-31 13:53:06 +01002466 return ret;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002467
Heiko Schocherf5895d12014-06-24 10:10:04 +02002468 if (ecc_fail)
William Juul52c07962007-10-31 13:53:06 +01002469 return -EBADMSG;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002470
Paul Burton700a76c2013-09-04 15:16:56 +01002471 return max_bitflips;
William Juul52c07962007-10-31 13:53:06 +01002472}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002473
William Juul52c07962007-10-31 13:53:06 +01002474/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002475 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
2476 * @mtd: mtd info structure
2477 * @chip: nand chip info structure
2478 * @page: page number to read
William Juul52c07962007-10-31 13:53:06 +01002479 */
2480static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002481 int page)
William Juul52c07962007-10-31 13:53:06 +01002482{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002483 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
William Juul52c07962007-10-31 13:53:06 +01002484}
2485
2486/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002487 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
William Juul52c07962007-10-31 13:53:06 +01002488 * with syndromes
Sergey Lapin3a38a552013-01-14 03:46:50 +00002489 * @mtd: mtd info structure
2490 * @chip: nand chip info structure
2491 * @page: page number to read
William Juul52c07962007-10-31 13:53:06 +01002492 */
2493static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Sergey Lapin3a38a552013-01-14 03:46:50 +00002494 int page)
William Juul52c07962007-10-31 13:53:06 +01002495{
William Juul52c07962007-10-31 13:53:06 +01002496 int length = mtd->oobsize;
2497 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
2498 int eccsize = chip->ecc.size;
Scott Wood3ea94ed2015-06-26 19:03:26 -05002499 uint8_t *bufpoi = chip->oob_poi;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002500 int i, toread, sndrnd = 0, pos, ret;
William Juul52c07962007-10-31 13:53:06 +01002501
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002502 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);
2503 if (ret)
2504 return ret;
2505
William Juul52c07962007-10-31 13:53:06 +01002506 for (i = 0; i < chip->ecc.steps; i++) {
2507 if (sndrnd) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002508 int ret;
2509
William Juul52c07962007-10-31 13:53:06 +01002510 pos = eccsize + i * (eccsize + chunk);
2511 if (mtd->writesize > 512)
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002512 ret = nand_change_read_column_op(chip, pos,
2513 NULL, 0,
2514 false);
William Juul52c07962007-10-31 13:53:06 +01002515 else
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002516 ret = nand_read_page_op(chip, page, pos, NULL,
2517 0);
2518
2519 if (ret)
2520 return ret;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002521 } else
William Juul52c07962007-10-31 13:53:06 +01002522 sndrnd = 1;
2523 toread = min_t(int, length, chunk);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002524
2525 ret = nand_read_data_op(chip, bufpoi, toread, false);
2526 if (ret)
2527 return ret;
2528
William Juul52c07962007-10-31 13:53:06 +01002529 bufpoi += toread;
2530 length -= toread;
2531 }
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002532 if (length > 0) {
2533 ret = nand_read_data_op(chip, bufpoi, length, false);
2534 if (ret)
2535 return ret;
2536 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002537
Sergey Lapin3a38a552013-01-14 03:46:50 +00002538 return 0;
William Juul52c07962007-10-31 13:53:06 +01002539}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002540
William Juul52c07962007-10-31 13:53:06 +01002541/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002542 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
2543 * @mtd: mtd info structure
2544 * @chip: nand chip info structure
2545 * @page: page number to write
William Juul52c07962007-10-31 13:53:06 +01002546 */
2547static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
2548 int page)
2549{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002550 return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
2551 mtd->oobsize);
William Juul52c07962007-10-31 13:53:06 +01002552}
2553
2554/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002555 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
2556 * with syndrome - only for large page flash
2557 * @mtd: mtd info structure
2558 * @chip: nand chip info structure
2559 * @page: page number to write
William Juul52c07962007-10-31 13:53:06 +01002560 */
2561static int nand_write_oob_syndrome(struct mtd_info *mtd,
2562 struct nand_chip *chip, int page)
2563{
2564 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
2565 int eccsize = chip->ecc.size, length = mtd->oobsize;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002566 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps;
William Juul52c07962007-10-31 13:53:06 +01002567 const uint8_t *bufpoi = chip->oob_poi;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002568
2569 /*
William Juul52c07962007-10-31 13:53:06 +01002570 * data-ecc-data-ecc ... ecc-oob
2571 * or
2572 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002573 */
William Juul52c07962007-10-31 13:53:06 +01002574 if (!chip->ecc.prepad && !chip->ecc.postpad) {
2575 pos = steps * (eccsize + chunk);
2576 steps = 0;
2577 } else
2578 pos = eccsize;
2579
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002580 ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0);
2581 if (ret)
2582 return ret;
2583
William Juul52c07962007-10-31 13:53:06 +01002584 for (i = 0; i < steps; i++) {
2585 if (sndcmd) {
2586 if (mtd->writesize <= 512) {
2587 uint32_t fill = 0xFFFFFFFF;
2588
2589 len = eccsize;
2590 while (len > 0) {
2591 int num = min_t(int, len, 4);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002592
2593 ret = nand_write_data_op(chip, &fill,
2594 num, false);
2595 if (ret)
2596 return ret;
2597
William Juul52c07962007-10-31 13:53:06 +01002598 len -= num;
2599 }
2600 } else {
2601 pos = eccsize + i * (eccsize + chunk);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002602 ret = nand_change_write_column_op(chip, pos,
2603 NULL, 0,
2604 false);
2605 if (ret)
2606 return ret;
William Juul52c07962007-10-31 13:53:06 +01002607 }
2608 } else
2609 sndcmd = 1;
2610 len = min_t(int, length, chunk);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002611
2612 ret = nand_write_data_op(chip, bufpoi, len, false);
2613 if (ret)
2614 return ret;
2615
William Juul52c07962007-10-31 13:53:06 +01002616 bufpoi += len;
2617 length -= len;
2618 }
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002619 if (length > 0) {
2620 ret = nand_write_data_op(chip, bufpoi, length, false);
2621 if (ret)
2622 return ret;
2623 }
William Juul52c07962007-10-31 13:53:06 +01002624
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002625 return nand_prog_page_end_op(chip);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002626}
2627
2628/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002629 * nand_do_read_oob - [INTERN] NAND read out-of-band
2630 * @mtd: MTD device structure
2631 * @from: offset to read from
2632 * @ops: oob operations description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002633 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002634 * NAND read out-of-band data from the spare area.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002635 */
William Juul52c07962007-10-31 13:53:06 +01002636static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
2637 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002638{
Sergey Lapin3a38a552013-01-14 03:46:50 +00002639 int page, realpage, chipnr;
Scott Wood17fed142016-05-30 13:57:56 -05002640 struct nand_chip *chip = mtd_to_nand(mtd);
Sergey Lapin3a38a552013-01-14 03:46:50 +00002641 struct mtd_ecc_stats stats;
William Juul52c07962007-10-31 13:53:06 +01002642 int readlen = ops->ooblen;
2643 int len;
2644 uint8_t *buf = ops->oobbuf;
Sergey Lapin3a38a552013-01-14 03:46:50 +00002645 int ret = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002646
Heiko Schocherf5895d12014-06-24 10:10:04 +02002647 pr_debug("%s: from = 0x%08Lx, len = %i\n",
Christian Hitz13fc0e22011-10-12 09:32:01 +02002648 __func__, (unsigned long long)from, readlen);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002649
Sergey Lapin3a38a552013-01-14 03:46:50 +00002650 stats = mtd->ecc_stats;
2651
Scott Wood52ab7ce2016-05-30 13:57:58 -05002652 len = mtd_oobavail(mtd, ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002653
William Juul52c07962007-10-31 13:53:06 +01002654 if (unlikely(ops->ooboffs >= len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02002655 pr_debug("%s: attempt to start read outside oob\n",
2656 __func__);
William Juul52c07962007-10-31 13:53:06 +01002657 return -EINVAL;
2658 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002659
2660 /* Do not allow reads past end of device */
William Juul52c07962007-10-31 13:53:06 +01002661 if (unlikely(from >= mtd->size ||
2662 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
2663 (from >> chip->page_shift)) * len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02002664 pr_debug("%s: attempt to read beyond end of device\n",
2665 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002666 return -EINVAL;
2667 }
2668
William Juul52c07962007-10-31 13:53:06 +01002669 chipnr = (int)(from >> chip->chip_shift);
2670 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002671
William Juul52c07962007-10-31 13:53:06 +01002672 /* Shift to get page */
2673 realpage = (int)(from >> chip->page_shift);
2674 page = realpage & chip->pagemask;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002675
Christian Hitz13fc0e22011-10-12 09:32:01 +02002676 while (1) {
Stefan Roese80877fa2022-09-02 14:10:46 +02002677 schedule();
Heiko Schocherf5895d12014-06-24 10:10:04 +02002678
Sergey Lapin3a38a552013-01-14 03:46:50 +00002679 if (ops->mode == MTD_OPS_RAW)
2680 ret = chip->ecc.read_oob_raw(mtd, chip, page);
2681 else
2682 ret = chip->ecc.read_oob(mtd, chip, page);
2683
2684 if (ret < 0)
2685 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002686
William Juul52c07962007-10-31 13:53:06 +01002687 len = min(len, readlen);
2688 buf = nand_transfer_oob(chip, buf, ops, len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002689
Heiko Schocherf5895d12014-06-24 10:10:04 +02002690 if (chip->options & NAND_NEED_READRDY) {
2691 /* Apply delay or wait for ready/busy pin */
2692 if (!chip->dev_ready)
2693 udelay(chip->chip_delay);
2694 else
2695 nand_wait_ready(mtd);
2696 }
2697
William Juul52c07962007-10-31 13:53:06 +01002698 readlen -= len;
2699 if (!readlen)
2700 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002701
William Juul52c07962007-10-31 13:53:06 +01002702 /* Increment page address */
2703 realpage++;
2704
2705 page = realpage & chip->pagemask;
2706 /* Check, if we cross a chip boundary */
2707 if (!page) {
2708 chipnr++;
2709 chip->select_chip(mtd, -1);
2710 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002711 }
William Juul52c07962007-10-31 13:53:06 +01002712 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02002713 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002714
Sergey Lapin3a38a552013-01-14 03:46:50 +00002715 ops->oobretlen = ops->ooblen - readlen;
2716
2717 if (ret < 0)
2718 return ret;
2719
2720 if (mtd->ecc_stats.failed - stats.failed)
2721 return -EBADMSG;
2722
2723 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002724}
2725
2726/**
William Juul52c07962007-10-31 13:53:06 +01002727 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
Sergey Lapin3a38a552013-01-14 03:46:50 +00002728 * @mtd: MTD device structure
2729 * @from: offset to read from
2730 * @ops: oob operation description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002731 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002732 * NAND read data and/or out-of-band data.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002733 */
William Juul52c07962007-10-31 13:53:06 +01002734static int nand_read_oob(struct mtd_info *mtd, loff_t from,
2735 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002736{
William Juul52c07962007-10-31 13:53:06 +01002737 int ret = -ENOTSUPP;
2738
2739 ops->retlen = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002740
2741 /* Do not allow reads past end of device */
William Juul52c07962007-10-31 13:53:06 +01002742 if (ops->datbuf && (from + ops->len) > mtd->size) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02002743 pr_debug("%s: attempt to read beyond end of device\n",
2744 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002745 return -EINVAL;
2746 }
2747
Heiko Schocherf5895d12014-06-24 10:10:04 +02002748 nand_get_device(mtd, FL_READING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002749
Christian Hitz13fc0e22011-10-12 09:32:01 +02002750 switch (ops->mode) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00002751 case MTD_OPS_PLACE_OOB:
2752 case MTD_OPS_AUTO_OOB:
2753 case MTD_OPS_RAW:
William Juul52c07962007-10-31 13:53:06 +01002754 break;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002755
William Juul52c07962007-10-31 13:53:06 +01002756 default:
2757 goto out;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002758 }
2759
William Juul52c07962007-10-31 13:53:06 +01002760 if (!ops->datbuf)
2761 ret = nand_do_read_oob(mtd, from, ops);
2762 else
2763 ret = nand_do_read_ops(mtd, from, ops);
2764
Christian Hitz13fc0e22011-10-12 09:32:01 +02002765out:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002766 nand_release_device(mtd);
William Juul52c07962007-10-31 13:53:06 +01002767 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002768}
2769
2770
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002771/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002772 * nand_write_page_raw - [INTERN] raw page write function
2773 * @mtd: mtd info structure
2774 * @chip: nand chip info structure
2775 * @buf: data buffer
2776 * @oob_required: must write chip->oob_poi to OOB
Scott Wood46e13102016-05-30 13:57:57 -05002777 * @page: page number to write
David Brownellee86b8d2009-11-07 16:27:01 -05002778 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00002779 * Not for syndrome calculating ECC controllers, which use a special oob layout.
William Juul52c07962007-10-31 13:53:06 +01002780 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002781static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Scott Wood52ab7ce2016-05-30 13:57:58 -05002782 const uint8_t *buf, int oob_required, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002783{
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002784 int ret;
2785
2786 ret = nand_write_data_op(chip, buf, mtd->writesize, false);
2787 if (ret)
2788 return ret;
2789
2790 if (oob_required) {
2791 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize,
2792 false);
2793 if (ret)
2794 return ret;
2795 }
Sergey Lapin3a38a552013-01-14 03:46:50 +00002796
2797 return 0;
William Juul52c07962007-10-31 13:53:06 +01002798}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002799
William Juul52c07962007-10-31 13:53:06 +01002800/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002801 * nand_write_page_raw_syndrome - [INTERN] raw page write function
2802 * @mtd: mtd info structure
2803 * @chip: nand chip info structure
2804 * @buf: data buffer
2805 * @oob_required: must write chip->oob_poi to OOB
Scott Wood52ab7ce2016-05-30 13:57:58 -05002806 * @page: page number to write
David Brownellee86b8d2009-11-07 16:27:01 -05002807 *
2808 * We need a special oob layout and handling even when ECC isn't checked.
2809 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002810static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
Christian Hitz13fc0e22011-10-12 09:32:01 +02002811 struct nand_chip *chip,
Scott Wood46e13102016-05-30 13:57:57 -05002812 const uint8_t *buf, int oob_required,
2813 int page)
David Brownellee86b8d2009-11-07 16:27:01 -05002814{
2815 int eccsize = chip->ecc.size;
2816 int eccbytes = chip->ecc.bytes;
2817 uint8_t *oob = chip->oob_poi;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002818 int steps, size, ret;
David Brownellee86b8d2009-11-07 16:27:01 -05002819
2820 for (steps = chip->ecc.steps; steps > 0; steps--) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002821 ret = nand_write_data_op(chip, buf, eccsize, false);
2822 if (ret)
2823 return ret;
2824
David Brownellee86b8d2009-11-07 16:27:01 -05002825 buf += eccsize;
2826
2827 if (chip->ecc.prepad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002828 ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
2829 false);
2830 if (ret)
2831 return ret;
2832
David Brownellee86b8d2009-11-07 16:27:01 -05002833 oob += chip->ecc.prepad;
2834 }
2835
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002836 ret = nand_write_data_op(chip, oob, eccbytes, false);
2837 if (ret)
2838 return ret;
2839
David Brownellee86b8d2009-11-07 16:27:01 -05002840 oob += eccbytes;
2841
2842 if (chip->ecc.postpad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002843 ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
2844 false);
2845 if (ret)
2846 return ret;
2847
David Brownellee86b8d2009-11-07 16:27:01 -05002848 oob += chip->ecc.postpad;
2849 }
2850 }
2851
2852 size = mtd->oobsize - (oob - chip->oob_poi);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002853 if (size) {
2854 ret = nand_write_data_op(chip, oob, size, false);
2855 if (ret)
2856 return ret;
2857 }
Sergey Lapin3a38a552013-01-14 03:46:50 +00002858
2859 return 0;
David Brownellee86b8d2009-11-07 16:27:01 -05002860}
2861/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002862 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
2863 * @mtd: mtd info structure
2864 * @chip: nand chip info structure
2865 * @buf: data buffer
2866 * @oob_required: must write chip->oob_poi to OOB
Scott Wood46e13102016-05-30 13:57:57 -05002867 * @page: page number to write
William Juul52c07962007-10-31 13:53:06 +01002868 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002869static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Scott Wood52ab7ce2016-05-30 13:57:58 -05002870 const uint8_t *buf, int oob_required,
2871 int page)
William Juul52c07962007-10-31 13:53:06 +01002872{
2873 int i, eccsize = chip->ecc.size;
2874 int eccbytes = chip->ecc.bytes;
2875 int eccsteps = chip->ecc.steps;
2876 uint8_t *ecc_calc = chip->buffers->ecccalc;
2877 const uint8_t *p = buf;
2878 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002879
Sergey Lapin3a38a552013-01-14 03:46:50 +00002880 /* Software ECC calculation */
William Juul52c07962007-10-31 13:53:06 +01002881 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
2882 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002883
William Juul52c07962007-10-31 13:53:06 +01002884 for (i = 0; i < chip->ecc.total; i++)
2885 chip->oob_poi[eccpos[i]] = ecc_calc[i];
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002886
Scott Wood46e13102016-05-30 13:57:57 -05002887 return chip->ecc.write_page_raw(mtd, chip, buf, 1, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002888}
2889
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002890/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002891 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
2892 * @mtd: mtd info structure
2893 * @chip: nand chip info structure
2894 * @buf: data buffer
2895 * @oob_required: must write chip->oob_poi to OOB
Scott Wood46e13102016-05-30 13:57:57 -05002896 * @page: page number to write
William Juul52c07962007-10-31 13:53:06 +01002897 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00002898static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Scott Wood46e13102016-05-30 13:57:57 -05002899 const uint8_t *buf, int oob_required,
2900 int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002901{
William Juul52c07962007-10-31 13:53:06 +01002902 int i, eccsize = chip->ecc.size;
2903 int eccbytes = chip->ecc.bytes;
2904 int eccsteps = chip->ecc.steps;
2905 uint8_t *ecc_calc = chip->buffers->ecccalc;
2906 const uint8_t *p = buf;
2907 uint32_t *eccpos = chip->ecc.layout->eccpos;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002908 int ret;
William Juul52c07962007-10-31 13:53:06 +01002909
2910 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2911 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002912
2913 ret = nand_write_data_op(chip, p, eccsize, false);
2914 if (ret)
2915 return ret;
2916
William Juul52c07962007-10-31 13:53:06 +01002917 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
2918 }
2919
2920 for (i = 0; i < chip->ecc.total; i++)
2921 chip->oob_poi[eccpos[i]] = ecc_calc[i];
2922
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002923 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
2924 if (ret)
2925 return ret;
Sergey Lapin3a38a552013-01-14 03:46:50 +00002926
2927 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002928}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02002929
Heiko Schocherf5895d12014-06-24 10:10:04 +02002930
2931/**
Scott Wood3ea94ed2015-06-26 19:03:26 -05002932 * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
Heiko Schocherf5895d12014-06-24 10:10:04 +02002933 * @mtd: mtd info structure
2934 * @chip: nand chip info structure
2935 * @offset: column address of subpage within the page
2936 * @data_len: data length
2937 * @buf: data buffer
2938 * @oob_required: must write chip->oob_poi to OOB
Scott Wood46e13102016-05-30 13:57:57 -05002939 * @page: page number to write
Heiko Schocherf5895d12014-06-24 10:10:04 +02002940 */
2941static int nand_write_subpage_hwecc(struct mtd_info *mtd,
2942 struct nand_chip *chip, uint32_t offset,
2943 uint32_t data_len, const uint8_t *buf,
Scott Wood46e13102016-05-30 13:57:57 -05002944 int oob_required, int page)
Heiko Schocherf5895d12014-06-24 10:10:04 +02002945{
2946 uint8_t *oob_buf = chip->oob_poi;
2947 uint8_t *ecc_calc = chip->buffers->ecccalc;
2948 int ecc_size = chip->ecc.size;
2949 int ecc_bytes = chip->ecc.bytes;
2950 int ecc_steps = chip->ecc.steps;
2951 uint32_t *eccpos = chip->ecc.layout->eccpos;
2952 uint32_t start_step = offset / ecc_size;
2953 uint32_t end_step = (offset + data_len - 1) / ecc_size;
2954 int oob_bytes = mtd->oobsize / ecc_steps;
2955 int step, i;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002956 int ret;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002957
2958 for (step = 0; step < ecc_steps; step++) {
2959 /* configure controller for WRITE access */
2960 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
2961
2962 /* write data (untouched subpages already masked by 0xFF) */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002963 ret = nand_write_data_op(chip, buf, ecc_size, false);
2964 if (ret)
2965 return ret;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002966
2967 /* mask ECC of un-touched subpages by padding 0xFF */
2968 if ((step < start_step) || (step > end_step))
2969 memset(ecc_calc, 0xff, ecc_bytes);
2970 else
2971 chip->ecc.calculate(mtd, buf, ecc_calc);
2972
2973 /* mask OOB of un-touched subpages by padding 0xFF */
2974 /* if oob_required, preserve OOB metadata of written subpage */
2975 if (!oob_required || (step < start_step) || (step > end_step))
2976 memset(oob_buf, 0xff, oob_bytes);
2977
2978 buf += ecc_size;
2979 ecc_calc += ecc_bytes;
2980 oob_buf += oob_bytes;
2981 }
2982
2983 /* copy calculated ECC for whole page to chip->buffer->oob */
2984 /* this include masked-value(0xFF) for unwritten subpages */
2985 ecc_calc = chip->buffers->ecccalc;
2986 for (i = 0; i < chip->ecc.total; i++)
2987 chip->oob_poi[eccpos[i]] = ecc_calc[i];
2988
2989 /* write OOB buffer to NAND device */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01002990 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
2991 if (ret)
2992 return ret;
Heiko Schocherf5895d12014-06-24 10:10:04 +02002993
2994 return 0;
2995}
2996
2997
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02002998/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00002999 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
3000 * @mtd: mtd info structure
3001 * @chip: nand chip info structure
3002 * @buf: data buffer
3003 * @oob_required: must write chip->oob_poi to OOB
Scott Wood52ab7ce2016-05-30 13:57:58 -05003004 * @page: page number to write
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003005 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003006 * The hw generator calculates the error syndrome automatically. Therefore we
3007 * need a special oob layout and handling.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003008 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00003009static int nand_write_page_syndrome(struct mtd_info *mtd,
3010 struct nand_chip *chip,
Scott Wood46e13102016-05-30 13:57:57 -05003011 const uint8_t *buf, int oob_required,
3012 int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003013{
William Juul52c07962007-10-31 13:53:06 +01003014 int i, eccsize = chip->ecc.size;
3015 int eccbytes = chip->ecc.bytes;
3016 int eccsteps = chip->ecc.steps;
3017 const uint8_t *p = buf;
3018 uint8_t *oob = chip->oob_poi;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003019 int ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003020
William Juul52c07962007-10-31 13:53:06 +01003021 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
William Juul52c07962007-10-31 13:53:06 +01003022 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003023
3024 ret = nand_write_data_op(chip, p, eccsize, false);
3025 if (ret)
3026 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003027
William Juul52c07962007-10-31 13:53:06 +01003028 if (chip->ecc.prepad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003029 ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
3030 false);
3031 if (ret)
3032 return ret;
3033
William Juul52c07962007-10-31 13:53:06 +01003034 oob += chip->ecc.prepad;
3035 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003036
William Juul52c07962007-10-31 13:53:06 +01003037 chip->ecc.calculate(mtd, p, oob);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003038
3039 ret = nand_write_data_op(chip, oob, eccbytes, false);
3040 if (ret)
3041 return ret;
3042
William Juul52c07962007-10-31 13:53:06 +01003043 oob += eccbytes;
3044
3045 if (chip->ecc.postpad) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003046 ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
3047 false);
3048 if (ret)
3049 return ret;
3050
William Juul52c07962007-10-31 13:53:06 +01003051 oob += chip->ecc.postpad;
3052 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003053 }
3054
William Juul52c07962007-10-31 13:53:06 +01003055 /* Calculate remaining oob bytes */
3056 i = mtd->oobsize - (oob - chip->oob_poi);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003057 if (i) {
3058 ret = nand_write_data_op(chip, oob, i, false);
3059 if (ret)
3060 return ret;
3061 }
Sergey Lapin3a38a552013-01-14 03:46:50 +00003062
3063 return 0;
William Juul52c07962007-10-31 13:53:06 +01003064}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003065
William Juul52c07962007-10-31 13:53:06 +01003066/**
3067 * nand_write_page - [REPLACEABLE] write one page
Sergey Lapin3a38a552013-01-14 03:46:50 +00003068 * @mtd: MTD device structure
3069 * @chip: NAND chip descriptor
Heiko Schocherf5895d12014-06-24 10:10:04 +02003070 * @offset: address offset within the page
3071 * @data_len: length of actual data to be written
Sergey Lapin3a38a552013-01-14 03:46:50 +00003072 * @buf: the data to write
3073 * @oob_required: must write chip->oob_poi to OOB
3074 * @page: page number to write
Sergey Lapin3a38a552013-01-14 03:46:50 +00003075 * @raw: use _raw version of write_page
William Juul52c07962007-10-31 13:53:06 +01003076 */
3077static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
Heiko Schocherf5895d12014-06-24 10:10:04 +02003078 uint32_t offset, int data_len, const uint8_t *buf,
Boris Brezillonb9bf43c2017-11-22 02:38:24 +09003079 int oob_required, int page, int raw)
William Juul52c07962007-10-31 13:53:06 +01003080{
Heiko Schocherf5895d12014-06-24 10:10:04 +02003081 int status, subpage;
3082
3083 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3084 chip->ecc.write_subpage)
3085 subpage = offset || (data_len < mtd->writesize);
3086 else
3087 subpage = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003088
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003089 if (nand_standard_page_accessors(&chip->ecc)) {
3090 status = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3091 if (status)
3092 return status;
3093 }
William Juul52c07962007-10-31 13:53:06 +01003094
3095 if (unlikely(raw))
Heiko Schocherf5895d12014-06-24 10:10:04 +02003096 status = chip->ecc.write_page_raw(mtd, chip, buf,
Scott Wood46e13102016-05-30 13:57:57 -05003097 oob_required, page);
Heiko Schocherf5895d12014-06-24 10:10:04 +02003098 else if (subpage)
3099 status = chip->ecc.write_subpage(mtd, chip, offset, data_len,
Scott Wood52ab7ce2016-05-30 13:57:58 -05003100 buf, oob_required, page);
William Juul52c07962007-10-31 13:53:06 +01003101 else
Scott Wood46e13102016-05-30 13:57:57 -05003102 status = chip->ecc.write_page(mtd, chip, buf, oob_required,
3103 page);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003104
3105 if (status < 0)
3106 return status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003107
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003108 if (nand_standard_page_accessors(&chip->ecc))
3109 return nand_prog_page_end_op(chip);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003110
William Juul52c07962007-10-31 13:53:06 +01003111 return 0;
3112}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003113
William Juul52c07962007-10-31 13:53:06 +01003114/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003115 * nand_fill_oob - [INTERN] Transfer client buffer to oob
3116 * @mtd: MTD device structure
3117 * @oob: oob data buffer
3118 * @len: oob data write length
3119 * @ops: oob ops structure
William Juul52c07962007-10-31 13:53:06 +01003120 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00003121static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
3122 struct mtd_oob_ops *ops)
William Juul52c07962007-10-31 13:53:06 +01003123{
Scott Wood17fed142016-05-30 13:57:56 -05003124 struct nand_chip *chip = mtd_to_nand(mtd);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003125
3126 /*
3127 * Initialise to all 0xFF, to avoid the possibility of left over OOB
3128 * data from a previous OOB read.
3129 */
3130 memset(chip->oob_poi, 0xff, mtd->oobsize);
3131
Christian Hitz13fc0e22011-10-12 09:32:01 +02003132 switch (ops->mode) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003133
Sergey Lapin3a38a552013-01-14 03:46:50 +00003134 case MTD_OPS_PLACE_OOB:
3135 case MTD_OPS_RAW:
William Juul52c07962007-10-31 13:53:06 +01003136 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
3137 return oob + len;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003138
Sergey Lapin3a38a552013-01-14 03:46:50 +00003139 case MTD_OPS_AUTO_OOB: {
William Juul52c07962007-10-31 13:53:06 +01003140 struct nand_oobfree *free = chip->ecc.layout->oobfree;
3141 uint32_t boffs = 0, woffs = ops->ooboffs;
3142 size_t bytes = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003143
Christian Hitz13fc0e22011-10-12 09:32:01 +02003144 for (; free->length && len; free++, len -= bytes) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00003145 /* Write request not from offset 0? */
William Juul52c07962007-10-31 13:53:06 +01003146 if (unlikely(woffs)) {
3147 if (woffs >= free->length) {
3148 woffs -= free->length;
3149 continue;
3150 }
3151 boffs = free->offset + woffs;
3152 bytes = min_t(size_t, len,
3153 (free->length - woffs));
3154 woffs = 0;
3155 } else {
3156 bytes = min_t(size_t, len, free->length);
3157 boffs = free->offset;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003158 }
William Juul52c07962007-10-31 13:53:06 +01003159 memcpy(chip->oob_poi + boffs, oob, bytes);
3160 oob += bytes;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003161 }
William Juul52c07962007-10-31 13:53:06 +01003162 return oob;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003163 }
William Juul52c07962007-10-31 13:53:06 +01003164 default:
3165 BUG();
3166 }
3167 return NULL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003168}
3169
Christian Hitzb8a6b372011-10-12 09:32:02 +02003170#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003171
3172/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003173 * nand_do_write_ops - [INTERN] NAND write with ECC
3174 * @mtd: MTD device structure
3175 * @to: offset to write to
3176 * @ops: oob operations description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003177 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003178 * NAND write with ECC.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003179 */
William Juul52c07962007-10-31 13:53:06 +01003180static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
3181 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003182{
Boris Brezillonb9bf43c2017-11-22 02:38:24 +09003183 int chipnr, realpage, page, column;
Scott Wood17fed142016-05-30 13:57:56 -05003184 struct nand_chip *chip = mtd_to_nand(mtd);
William Juul52c07962007-10-31 13:53:06 +01003185 uint32_t writelen = ops->len;
Christian Hitzb8a6b372011-10-12 09:32:02 +02003186
3187 uint32_t oobwritelen = ops->ooblen;
Scott Wood52ab7ce2016-05-30 13:57:58 -05003188 uint32_t oobmaxlen = mtd_oobavail(mtd, ops);
Christian Hitzb8a6b372011-10-12 09:32:02 +02003189
William Juul52c07962007-10-31 13:53:06 +01003190 uint8_t *oob = ops->oobbuf;
3191 uint8_t *buf = ops->datbuf;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003192 int ret;
Sergey Lapin3a38a552013-01-14 03:46:50 +00003193 int oob_required = oob ? 1 : 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003194
William Juul52c07962007-10-31 13:53:06 +01003195 ops->retlen = 0;
3196 if (!writelen)
3197 return 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003198
Heiko Schocherf5895d12014-06-24 10:10:04 +02003199 /* Reject writes, which are not page aligned */
3200 if (NOTALIGNED(to)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003201 pr_notice("%s: attempt to write non page aligned data\n",
3202 __func__);
William Juul52c07962007-10-31 13:53:06 +01003203 return -EINVAL;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003204 }
3205
3206 column = to & (mtd->writesize - 1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003207
William Juul52c07962007-10-31 13:53:06 +01003208 chipnr = (int)(to >> chip->chip_shift);
3209 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003210
3211 /* Check, if it is write protected */
William Juul52c07962007-10-31 13:53:06 +01003212 if (nand_check_wp(mtd)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003213 ret = -EIO;
3214 goto err_out;
William Juul52c07962007-10-31 13:53:06 +01003215 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003216
William Juul52c07962007-10-31 13:53:06 +01003217 realpage = (int)(to >> chip->page_shift);
3218 page = realpage & chip->pagemask;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003219
William Juul52c07962007-10-31 13:53:06 +01003220 /* Invalidate the page cache, when we write to the cached page */
Scott Wood3ea94ed2015-06-26 19:03:26 -05003221 if (to <= ((loff_t)chip->pagebuf << chip->page_shift) &&
3222 ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len))
William Juul52c07962007-10-31 13:53:06 +01003223 chip->pagebuf = -1;
3224
Christian Hitzb8a6b372011-10-12 09:32:02 +02003225 /* Don't allow multipage oob writes with offset */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003226 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
3227 ret = -EINVAL;
3228 goto err_out;
3229 }
Christian Hitzb8a6b372011-10-12 09:32:02 +02003230
Christian Hitz13fc0e22011-10-12 09:32:01 +02003231 while (1) {
William Juul52c07962007-10-31 13:53:06 +01003232 int bytes = mtd->writesize;
William Juul52c07962007-10-31 13:53:06 +01003233 uint8_t *wbuf = buf;
Scott Wood3ea94ed2015-06-26 19:03:26 -05003234 int use_bufpoi;
Hector Palaciose4fcdbb2016-07-18 09:37:41 +02003235 int part_pagewr = (column || writelen < mtd->writesize);
Scott Wood3ea94ed2015-06-26 19:03:26 -05003236
3237 if (part_pagewr)
3238 use_bufpoi = 1;
Masahiro Yamadab9c07b62017-11-22 02:38:27 +09003239 else if (chip->options & NAND_USE_BOUNCE_BUFFER)
3240 use_bufpoi = !IS_ALIGNED((unsigned long)buf,
3241 chip->buf_align);
Scott Wood3ea94ed2015-06-26 19:03:26 -05003242 else
3243 use_bufpoi = 0;
William Juul52c07962007-10-31 13:53:06 +01003244
Stefan Roese80877fa2022-09-02 14:10:46 +02003245 schedule();
Scott Wood3ea94ed2015-06-26 19:03:26 -05003246 /* Partial page write?, or need to use bounce buffer */
3247 if (use_bufpoi) {
3248 pr_debug("%s: using write bounce buffer for buf@%p\n",
3249 __func__, buf);
Scott Wood3ea94ed2015-06-26 19:03:26 -05003250 if (part_pagewr)
3251 bytes = min_t(int, bytes - column, writelen);
William Juul52c07962007-10-31 13:53:06 +01003252 chip->pagebuf = -1;
3253 memset(chip->buffers->databuf, 0xff, mtd->writesize);
3254 memcpy(&chip->buffers->databuf[column], buf, bytes);
3255 wbuf = chip->buffers->databuf;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02003256 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003257
Christian Hitzb8a6b372011-10-12 09:32:02 +02003258 if (unlikely(oob)) {
3259 size_t len = min(oobwritelen, oobmaxlen);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003260 oob = nand_fill_oob(mtd, oob, len, ops);
Christian Hitzb8a6b372011-10-12 09:32:02 +02003261 oobwritelen -= len;
Sergey Lapin3a38a552013-01-14 03:46:50 +00003262 } else {
3263 /* We still need to erase leftover OOB data */
3264 memset(chip->oob_poi, 0xff, mtd->oobsize);
Christian Hitzb8a6b372011-10-12 09:32:02 +02003265 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02003266 ret = chip->write_page(mtd, chip, column, bytes, wbuf,
Boris Brezillonb9bf43c2017-11-22 02:38:24 +09003267 oob_required, page,
Heiko Schocherf5895d12014-06-24 10:10:04 +02003268 (ops->mode == MTD_OPS_RAW));
William Juul52c07962007-10-31 13:53:06 +01003269 if (ret)
3270 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003271
William Juul52c07962007-10-31 13:53:06 +01003272 writelen -= bytes;
3273 if (!writelen)
3274 break;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003275
Heiko Schocherf5895d12014-06-24 10:10:04 +02003276 column = 0;
3277 buf += bytes;
3278 realpage++;
3279
3280 page = realpage & chip->pagemask;
3281 /* Check, if we cross a chip boundary */
3282 if (!page) {
3283 chipnr++;
3284 chip->select_chip(mtd, -1);
3285 chip->select_chip(mtd, chipnr);
3286 }
3287 }
3288
3289 ops->retlen = ops->len - writelen;
3290 if (unlikely(oob))
3291 ops->oobretlen = ops->ooblen;
3292
3293err_out:
3294 chip->select_chip(mtd, -1);
3295 return ret;
3296}
3297
3298/**
3299 * panic_nand_write - [MTD Interface] NAND write with ECC
3300 * @mtd: MTD device structure
3301 * @to: offset to write to
3302 * @len: number of bytes to write
3303 * @retlen: pointer to variable to store the number of written bytes
3304 * @buf: the data to write
3305 *
3306 * NAND write with ECC. Used when performing writes in interrupt context, this
3307 * may for example be called by mtdoops when writing an oops while in panic.
3308 */
3309static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
3310 size_t *retlen, const uint8_t *buf)
3311{
Scott Wood17fed142016-05-30 13:57:56 -05003312 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +02003313 struct mtd_oob_ops ops;
3314 int ret;
3315
3316 /* Wait for the device to get ready */
3317 panic_nand_wait(mtd, chip, 400);
3318
3319 /* Grab the device */
3320 panic_nand_get_device(chip, mtd, FL_WRITING);
3321
Scott Wood3ea94ed2015-06-26 19:03:26 -05003322 memset(&ops, 0, sizeof(ops));
Heiko Schocherf5895d12014-06-24 10:10:04 +02003323 ops.len = len;
3324 ops.datbuf = (uint8_t *)buf;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003325 ops.mode = MTD_OPS_PLACE_OOB;
William Juul52c07962007-10-31 13:53:06 +01003326
Heiko Schocherf5895d12014-06-24 10:10:04 +02003327 ret = nand_do_write_ops(mtd, to, &ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003328
Sergey Lapin3a38a552013-01-14 03:46:50 +00003329 *retlen = ops.retlen;
William Juul52c07962007-10-31 13:53:06 +01003330 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003331}
3332
3333/**
William Juul52c07962007-10-31 13:53:06 +01003334 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
Sergey Lapin3a38a552013-01-14 03:46:50 +00003335 * @mtd: MTD device structure
3336 * @to: offset to write to
3337 * @ops: oob operation description structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003338 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003339 * NAND write out-of-band.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003340 */
William Juul52c07962007-10-31 13:53:06 +01003341static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
3342 struct mtd_oob_ops *ops)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003343{
William Juul52c07962007-10-31 13:53:06 +01003344 int chipnr, page, status, len;
Scott Wood17fed142016-05-30 13:57:56 -05003345 struct nand_chip *chip = mtd_to_nand(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003346
Heiko Schocherf5895d12014-06-24 10:10:04 +02003347 pr_debug("%s: to = 0x%08x, len = %i\n",
Christian Hitz13fc0e22011-10-12 09:32:01 +02003348 __func__, (unsigned int)to, (int)ops->ooblen);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003349
Scott Wood52ab7ce2016-05-30 13:57:58 -05003350 len = mtd_oobavail(mtd, ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003351
3352 /* Do not allow write past end of page */
William Juul52c07962007-10-31 13:53:06 +01003353 if ((ops->ooboffs + ops->ooblen) > len) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003354 pr_debug("%s: attempt to write past end of page\n",
3355 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003356 return -EINVAL;
3357 }
3358
William Juul52c07962007-10-31 13:53:06 +01003359 if (unlikely(ops->ooboffs >= len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003360 pr_debug("%s: attempt to start write outside oob\n",
3361 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003362 return -EINVAL;
3363 }
3364
Christian Hitz13fc0e22011-10-12 09:32:01 +02003365 /* Do not allow write past end of device */
William Juul52c07962007-10-31 13:53:06 +01003366 if (unlikely(to >= mtd->size ||
3367 ops->ooboffs + ops->ooblen >
3368 ((mtd->size >> chip->page_shift) -
3369 (to >> chip->page_shift)) * len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003370 pr_debug("%s: attempt to write beyond end of device\n",
3371 __func__);
William Juul52c07962007-10-31 13:53:06 +01003372 return -EINVAL;
3373 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003374
William Juul52c07962007-10-31 13:53:06 +01003375 chipnr = (int)(to >> chip->chip_shift);
William Juul52c07962007-10-31 13:53:06 +01003376
3377 /*
3378 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
3379 * of my DiskOnChip 2000 test units) will clear the whole data page too
3380 * if we don't do this. I have no clue why, but I seem to have 'fixed'
3381 * it in the doc2000 driver in August 1999. dwmw2.
3382 */
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09003383 nand_reset(chip, chipnr);
3384
3385 chip->select_chip(mtd, chipnr);
3386
3387 /* Shift to get page */
3388 page = (int)(to >> chip->page_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003389
3390 /* Check, if it is write protected */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003391 if (nand_check_wp(mtd)) {
3392 chip->select_chip(mtd, -1);
William Juul52c07962007-10-31 13:53:06 +01003393 return -EROFS;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003394 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003395
William Juul52c07962007-10-31 13:53:06 +01003396 /* Invalidate the page cache, if we write to the cached page */
3397 if (page == chip->pagebuf)
3398 chip->pagebuf = -1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003399
Sergey Lapin3a38a552013-01-14 03:46:50 +00003400 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
3401
3402 if (ops->mode == MTD_OPS_RAW)
3403 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
3404 else
3405 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003406
Heiko Schocherf5895d12014-06-24 10:10:04 +02003407 chip->select_chip(mtd, -1);
3408
William Juul52c07962007-10-31 13:53:06 +01003409 if (status)
3410 return status;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003411
William Juul52c07962007-10-31 13:53:06 +01003412 ops->oobretlen = ops->ooblen;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003413
William Juul52c07962007-10-31 13:53:06 +01003414 return 0;
3415}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003416
William Juul52c07962007-10-31 13:53:06 +01003417/**
3418 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
Sergey Lapin3a38a552013-01-14 03:46:50 +00003419 * @mtd: MTD device structure
3420 * @to: offset to write to
3421 * @ops: oob operation description structure
William Juul52c07962007-10-31 13:53:06 +01003422 */
3423static int nand_write_oob(struct mtd_info *mtd, loff_t to,
3424 struct mtd_oob_ops *ops)
3425{
William Juul52c07962007-10-31 13:53:06 +01003426 int ret = -ENOTSUPP;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003427
William Juul52c07962007-10-31 13:53:06 +01003428 ops->retlen = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003429
William Juul52c07962007-10-31 13:53:06 +01003430 /* Do not allow writes past end of device */
3431 if (ops->datbuf && (to + ops->len) > mtd->size) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003432 pr_debug("%s: attempt to write beyond end of device\n",
3433 __func__);
William Juul52c07962007-10-31 13:53:06 +01003434 return -EINVAL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003435 }
William Juul52c07962007-10-31 13:53:06 +01003436
Heiko Schocherf5895d12014-06-24 10:10:04 +02003437 nand_get_device(mtd, FL_WRITING);
William Juul52c07962007-10-31 13:53:06 +01003438
Christian Hitz13fc0e22011-10-12 09:32:01 +02003439 switch (ops->mode) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00003440 case MTD_OPS_PLACE_OOB:
3441 case MTD_OPS_AUTO_OOB:
3442 case MTD_OPS_RAW:
William Juul52c07962007-10-31 13:53:06 +01003443 break;
3444
3445 default:
3446 goto out;
3447 }
3448
3449 if (!ops->datbuf)
3450 ret = nand_do_write_oob(mtd, to, ops);
3451 else
3452 ret = nand_do_write_ops(mtd, to, ops);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003453
Christian Hitz13fc0e22011-10-12 09:32:01 +02003454out:
William Juul52c07962007-10-31 13:53:06 +01003455 nand_release_device(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003456 return ret;
3457}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003458
3459/**
Scott Wood3ea94ed2015-06-26 19:03:26 -05003460 * single_erase - [GENERIC] NAND standard block erase command function
Sergey Lapin3a38a552013-01-14 03:46:50 +00003461 * @mtd: MTD device structure
3462 * @page: the page address of the block which will be erased
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003463 *
Scott Wood3ea94ed2015-06-26 19:03:26 -05003464 * Standard erase command for NAND chips. Returns NAND status.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003465 */
Scott Wood3ea94ed2015-06-26 19:03:26 -05003466static int single_erase(struct mtd_info *mtd, int page)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003467{
Scott Wood17fed142016-05-30 13:57:56 -05003468 struct nand_chip *chip = mtd_to_nand(mtd);
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003469 unsigned int eraseblock;
3470
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003471 /* Send commands to erase a block */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003472 eraseblock = page >> (chip->phys_erase_shift - chip->page_shift);
Scott Wood3ea94ed2015-06-26 19:03:26 -05003473
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003474 return nand_erase_op(chip, eraseblock);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003475}
3476
3477/**
3478 * nand_erase - [MTD Interface] erase block(s)
Sergey Lapin3a38a552013-01-14 03:46:50 +00003479 * @mtd: MTD device structure
3480 * @instr: erase instruction
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003481 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003482 * Erase one ore more blocks.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003483 */
William Juul52c07962007-10-31 13:53:06 +01003484static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003485{
William Juul52c07962007-10-31 13:53:06 +01003486 return nand_erase_nand(mtd, instr, 0);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003487}
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003488
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003489/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003490 * nand_erase_nand - [INTERN] erase block(s)
3491 * @mtd: MTD device structure
3492 * @instr: erase instruction
3493 * @allowbbt: allow erasing the bbt area
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003494 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003495 * Erase one ore more blocks.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003496 */
William Juul52c07962007-10-31 13:53:06 +01003497int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
3498 int allowbbt)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003499{
Sandeep Paulrajeab580c2009-10-30 13:51:23 -04003500 int page, status, pages_per_block, ret, chipnr;
Scott Wood17fed142016-05-30 13:57:56 -05003501 struct nand_chip *chip = mtd_to_nand(mtd);
Sandeep Paulrajeab580c2009-10-30 13:51:23 -04003502 loff_t len;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003503
Heiko Schocherf5895d12014-06-24 10:10:04 +02003504 pr_debug("%s: start = 0x%012llx, len = %llu\n",
3505 __func__, (unsigned long long)instr->addr,
3506 (unsigned long long)instr->len);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003507
Christian Hitzb8a6b372011-10-12 09:32:02 +02003508 if (check_offs_len(mtd, instr->addr, instr->len))
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003509 return -EINVAL;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003510
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003511 /* Grab the lock and see if the device is available */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003512 nand_get_device(mtd, FL_ERASING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003513
3514 /* Shift to get first page */
William Juul52c07962007-10-31 13:53:06 +01003515 page = (int)(instr->addr >> chip->page_shift);
3516 chipnr = (int)(instr->addr >> chip->chip_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003517
3518 /* Calculate pages in each block */
William Juul52c07962007-10-31 13:53:06 +01003519 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
William Juulb76ec382007-11-08 10:39:53 +01003520
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003521 /* Select the NAND device */
William Juul52c07962007-10-31 13:53:06 +01003522 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003523
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003524 /* Check, if it is write protected */
3525 if (nand_check_wp(mtd)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003526 pr_debug("%s: device is write protected!\n",
3527 __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003528 instr->state = MTD_ERASE_FAILED;
3529 goto erase_exit;
3530 }
3531
3532 /* Loop through the pages */
3533 len = instr->len;
3534
3535 instr->state = MTD_ERASING;
3536
3537 while (len) {
Stefan Roese80877fa2022-09-02 14:10:46 +02003538 schedule();
Heiko Schocherf5895d12014-06-24 10:10:04 +02003539
Sergey Lapin3a38a552013-01-14 03:46:50 +00003540 /* Check if we have a bad block, we do not erase bad blocks! */
Masahiro Yamadaf5a19022014-12-16 15:36:33 +09003541 if (!instr->scrub && nand_block_checkbad(mtd, ((loff_t) page) <<
Scott Wood52ab7ce2016-05-30 13:57:58 -05003542 chip->page_shift, allowbbt)) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00003543 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
Heiko Schocherf5895d12014-06-24 10:10:04 +02003544 __func__, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003545 instr->state = MTD_ERASE_FAILED;
Farhan Ali7c053192021-02-24 15:25:53 -08003546 instr->fail_addr =
3547 ((loff_t)page << chip->page_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003548 goto erase_exit;
3549 }
William Juul52c07962007-10-31 13:53:06 +01003550
3551 /*
3552 * Invalidate the page cache, if we erase the block which
Sergey Lapin3a38a552013-01-14 03:46:50 +00003553 * contains the current cached page.
William Juul52c07962007-10-31 13:53:06 +01003554 */
3555 if (page <= chip->pagebuf && chip->pagebuf <
3556 (page + pages_per_block))
3557 chip->pagebuf = -1;
3558
Scott Wood3ea94ed2015-06-26 19:03:26 -05003559 status = chip->erase(mtd, page & chip->pagemask);
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003560
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003561 /* See if block erase succeeded */
William Juul52c07962007-10-31 13:53:06 +01003562 if (status & NAND_STATUS_FAIL) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003563 pr_debug("%s: failed erase, page 0x%08x\n",
3564 __func__, page);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003565 instr->state = MTD_ERASE_FAILED;
Christian Hitz13fc0e22011-10-12 09:32:01 +02003566 instr->fail_addr =
3567 ((loff_t)page << chip->page_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003568 goto erase_exit;
3569 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003570
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003571 /* Increment page address and decrement length */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003572 len -= (1ULL << chip->phys_erase_shift);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003573 page += pages_per_block;
3574
3575 /* Check, if we cross a chip boundary */
William Juul52c07962007-10-31 13:53:06 +01003576 if (len && !(page & chip->pagemask)) {
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003577 chipnr++;
William Juul52c07962007-10-31 13:53:06 +01003578 chip->select_chip(mtd, -1);
3579 chip->select_chip(mtd, chipnr);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003580 }
3581 }
3582 instr->state = MTD_ERASE_DONE;
3583
Christian Hitz13fc0e22011-10-12 09:32:01 +02003584erase_exit:
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003585
3586 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003587
3588 /* Deselect and wake up anyone waiting on the device */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003589 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003590 nand_release_device(mtd);
3591
3592 /* Return more or less happy */
3593 return ret;
3594}
3595
3596/**
3597 * nand_sync - [MTD Interface] sync
Sergey Lapin3a38a552013-01-14 03:46:50 +00003598 * @mtd: MTD device structure
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003599 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00003600 * Sync is actually a wait for chip ready function.
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003601 */
William Juul52c07962007-10-31 13:53:06 +01003602static void nand_sync(struct mtd_info *mtd)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003603{
Heiko Schocherf5895d12014-06-24 10:10:04 +02003604 pr_debug("%s: called\n", __func__);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003605
3606 /* Grab the lock and see if the device is available */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003607 nand_get_device(mtd, FL_SYNCING);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003608 /* Release it and go back */
William Juul52c07962007-10-31 13:53:06 +01003609 nand_release_device(mtd);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003610}
3611
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003612/**
William Juul52c07962007-10-31 13:53:06 +01003613 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Sergey Lapin3a38a552013-01-14 03:46:50 +00003614 * @mtd: MTD device structure
3615 * @offs: offset relative to mtd start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003616 */
William Juul52c07962007-10-31 13:53:06 +01003617static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003618{
Scott Wood52ab7ce2016-05-30 13:57:58 -05003619 struct nand_chip *chip = mtd_to_nand(mtd);
3620 int chipnr = (int)(offs >> chip->chip_shift);
3621 int ret;
3622
3623 /* Select the NAND device */
3624 nand_get_device(mtd, FL_READING);
3625 chip->select_chip(mtd, chipnr);
3626
3627 ret = nand_block_checkbad(mtd, offs, 0);
3628
3629 chip->select_chip(mtd, -1);
3630 nand_release_device(mtd);
3631
3632 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003633}
3634
3635/**
William Juul52c07962007-10-31 13:53:06 +01003636 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Sergey Lapin3a38a552013-01-14 03:46:50 +00003637 * @mtd: MTD device structure
3638 * @ofs: offset relative to mtd start
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003639 */
William Juul52c07962007-10-31 13:53:06 +01003640static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003641{
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003642 int ret;
3643
Christian Hitzb8a6b372011-10-12 09:32:02 +02003644 ret = nand_block_isbad(mtd, ofs);
3645 if (ret) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00003646 /* If it was bad already, return success and do nothing */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003647 if (ret > 0)
3648 return 0;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02003649 return ret;
3650 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003651
Heiko Schocherf5895d12014-06-24 10:10:04 +02003652 return nand_block_markbad_lowlevel(mtd, ofs);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003653}
3654
Heiko Schocherf5895d12014-06-24 10:10:04 +02003655/**
Sergey Lapin3a38a552013-01-14 03:46:50 +00003656 * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
3657 * @mtd: MTD device structure
3658 * @chip: nand chip info structure
3659 * @addr: feature address.
3660 * @subfeature_param: the subfeature parameters, a four bytes array.
3661 */
3662static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
3663 int addr, uint8_t *subfeature_param)
3664{
Heiko Schocherf5895d12014-06-24 10:10:04 +02003665#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
3666 if (!chip->onfi_version ||
3667 !(le16_to_cpu(chip->onfi_params.opt_cmd)
3668 & ONFI_OPT_CMD_SET_GET_FEATURES))
Mylène Josserandc21946b2018-07-13 18:10:23 +02003669 return -ENOTSUPP;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003670#endif
Sergey Lapin3a38a552013-01-14 03:46:50 +00003671
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003672 return nand_set_features_op(chip, addr, subfeature_param);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003673}
3674
3675/**
3676 * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
3677 * @mtd: MTD device structure
3678 * @chip: nand chip info structure
3679 * @addr: feature address.
3680 * @subfeature_param: the subfeature parameters, a four bytes array.
William Juul52c07962007-10-31 13:53:06 +01003681 */
Sergey Lapin3a38a552013-01-14 03:46:50 +00003682static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
3683 int addr, uint8_t *subfeature_param)
3684{
Heiko Schocherf5895d12014-06-24 10:10:04 +02003685#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
3686 if (!chip->onfi_version ||
3687 !(le16_to_cpu(chip->onfi_params.opt_cmd)
3688 & ONFI_OPT_CMD_SET_GET_FEATURES))
Mylène Josserandc21946b2018-07-13 18:10:23 +02003689 return -ENOTSUPP;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003690#endif
Sergey Lapin3a38a552013-01-14 03:46:50 +00003691
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003692 return nand_get_features_op(chip, addr, subfeature_param);
Sergey Lapin3a38a552013-01-14 03:46:50 +00003693}
Heiko Schocherf5895d12014-06-24 10:10:04 +02003694
Sergey Lapin3a38a552013-01-14 03:46:50 +00003695/* Set default functions */
William Juul52c07962007-10-31 13:53:06 +01003696static void nand_set_defaults(struct nand_chip *chip, int busw)
3697{
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003698 /* check for proper chip_delay setup, set 20us if not */
William Juul52c07962007-10-31 13:53:06 +01003699 if (!chip->chip_delay)
3700 chip->chip_delay = 20;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003701
3702 /* check, if a user supplied command function given */
William Juul52c07962007-10-31 13:53:06 +01003703 if (chip->cmdfunc == NULL)
3704 chip->cmdfunc = nand_command;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003705
3706 /* check, if a user supplied wait function given */
William Juul52c07962007-10-31 13:53:06 +01003707 if (chip->waitfunc == NULL)
3708 chip->waitfunc = nand_wait;
3709
3710 if (!chip->select_chip)
3711 chip->select_chip = nand_select_chip;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003712
3713 /* set for ONFI nand */
3714 if (!chip->onfi_set_features)
3715 chip->onfi_set_features = nand_onfi_set_features;
3716 if (!chip->onfi_get_features)
3717 chip->onfi_get_features = nand_onfi_get_features;
3718
3719 /* If called twice, pointers that depend on busw may need to be reset */
3720 if (!chip->read_byte || chip->read_byte == nand_read_byte)
William Juul52c07962007-10-31 13:53:06 +01003721 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
3722 if (!chip->read_word)
3723 chip->read_word = nand_read_word;
3724 if (!chip->block_bad)
3725 chip->block_bad = nand_block_bad;
3726 if (!chip->block_markbad)
3727 chip->block_markbad = nand_default_block_markbad;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003728 if (!chip->write_buf || chip->write_buf == nand_write_buf)
William Juul52c07962007-10-31 13:53:06 +01003729 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003730 if (!chip->write_byte || chip->write_byte == nand_write_byte)
3731 chip->write_byte = busw ? nand_write_byte16 : nand_write_byte;
3732 if (!chip->read_buf || chip->read_buf == nand_read_buf)
William Juul52c07962007-10-31 13:53:06 +01003733 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
Roger Quadrosb590f612022-12-20 12:21:57 +02003734
3735#ifndef CONFIG_SPL_BUILD
William Juul52c07962007-10-31 13:53:06 +01003736 if (!chip->scan_bbt)
3737 chip->scan_bbt = nand_default_bbt;
Roger Quadrosb590f612022-12-20 12:21:57 +02003738#endif
Heiko Schocherf5895d12014-06-24 10:10:04 +02003739
3740 if (!chip->controller) {
William Juul52c07962007-10-31 13:53:06 +01003741 chip->controller = &chip->hwcontrol;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003742 spin_lock_init(&chip->controller->lock);
3743 init_waitqueue_head(&chip->controller->wq);
3744 }
3745
Masahiro Yamadab9c07b62017-11-22 02:38:27 +09003746 if (!chip->buf_align)
3747 chip->buf_align = 1;
William Juul52c07962007-10-31 13:53:06 +01003748}
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02003749
Sergey Lapin3a38a552013-01-14 03:46:50 +00003750/* Sanitize ONFI strings so we can safely print them */
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003751static void sanitize_string(char *s, size_t len)
3752{
3753 ssize_t i;
3754
Sergey Lapin3a38a552013-01-14 03:46:50 +00003755 /* Null terminate */
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003756 s[len - 1] = 0;
3757
Sergey Lapin3a38a552013-01-14 03:46:50 +00003758 /* Remove non printable chars */
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003759 for (i = 0; i < len - 1; i++) {
3760 if (s[i] < ' ' || s[i] > 127)
3761 s[i] = '?';
3762 }
3763
Sergey Lapin3a38a552013-01-14 03:46:50 +00003764 /* Remove trailing spaces */
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003765 strim(s);
3766}
3767
Florian Fainellic98a9352011-02-25 00:01:34 +00003768static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
3769{
3770 int i;
Florian Fainellic98a9352011-02-25 00:01:34 +00003771 while (len--) {
3772 crc ^= *p++ << 8;
3773 for (i = 0; i < 8; i++)
3774 crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
3775 }
3776
3777 return crc;
3778}
3779
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003780#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
Heiko Schocherf5895d12014-06-24 10:10:04 +02003781/* Parse the Extended Parameter Page. */
3782static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,
3783 struct nand_chip *chip, struct nand_onfi_params *p)
3784{
3785 struct onfi_ext_param_page *ep;
3786 struct onfi_ext_section *s;
3787 struct onfi_ext_ecc_info *ecc;
3788 uint8_t *cursor;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003789 int ret;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003790 int len;
3791 int i;
3792
3793 len = le16_to_cpu(p->ext_param_page_length) * 16;
3794 ep = kmalloc(len, GFP_KERNEL);
3795 if (!ep)
3796 return -ENOMEM;
3797
3798 /* Send our own NAND_CMD_PARAM. */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003799 ret = nand_read_param_page_op(chip, 0, NULL, 0);
3800 if (ret)
3801 goto ext_out;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003802
3803 /* Use the Change Read Column command to skip the ONFI param pages. */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003804 ret = nand_change_read_column_op(chip,
3805 sizeof(*p) * p->num_of_param_pages,
3806 ep, len, true);
3807 if (ret)
3808 goto ext_out;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003809
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003810 ret = -EINVAL;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003811 if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)
3812 != le16_to_cpu(ep->crc))) {
3813 pr_debug("fail in the CRC.\n");
3814 goto ext_out;
3815 }
3816
3817 /*
3818 * Check the signature.
3819 * Do not strictly follow the ONFI spec, maybe changed in future.
3820 */
Heiko Schocherf5895d12014-06-24 10:10:04 +02003821 if (strncmp((char *)ep->sig, "EPPS", 4)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003822 pr_debug("The signature is invalid.\n");
3823 goto ext_out;
3824 }
3825
3826 /* find the ECC section. */
3827 cursor = (uint8_t *)(ep + 1);
3828 for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) {
3829 s = ep->sections + i;
3830 if (s->type == ONFI_SECTION_TYPE_2)
3831 break;
3832 cursor += s->length * 16;
3833 }
3834 if (i == ONFI_EXT_SECTION_MAX) {
3835 pr_debug("We can not find the ECC section.\n");
3836 goto ext_out;
3837 }
3838
3839 /* get the info we want. */
3840 ecc = (struct onfi_ext_ecc_info *)cursor;
3841
3842 if (!ecc->codeword_size) {
3843 pr_debug("Invalid codeword size\n");
3844 goto ext_out;
3845 }
3846
3847 chip->ecc_strength_ds = ecc->ecc_bits;
3848 chip->ecc_step_ds = 1 << ecc->codeword_size;
3849 ret = 0;
3850
3851ext_out:
3852 kfree(ep);
3853 return ret;
3854}
3855
Florian Fainellic98a9352011-02-25 00:01:34 +00003856/*
Sergey Lapin3a38a552013-01-14 03:46:50 +00003857 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
Florian Fainellic98a9352011-02-25 00:01:34 +00003858 */
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02003859static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip)
Florian Fainellic98a9352011-02-25 00:01:34 +00003860{
3861 struct nand_onfi_params *p = &chip->onfi_params;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003862 char id[4];
3863 int i, ret, val;
Florian Fainellic98a9352011-02-25 00:01:34 +00003864
Sergey Lapin3a38a552013-01-14 03:46:50 +00003865 /* Try ONFI for unknown chip or LP */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003866 ret = nand_readid_op(chip, 0x20, id, sizeof(id));
3867 if (ret || strncmp(id, "ONFI", 4))
3868 return 0;
3869
3870 ret = nand_read_param_page_op(chip, 0, NULL, 0);
3871 if (ret)
Florian Fainellic98a9352011-02-25 00:01:34 +00003872 return 0;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003873
Florian Fainellic98a9352011-02-25 00:01:34 +00003874 for (i = 0; i < 3; i++) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003875 ret = nand_read_data_op(chip, p, sizeof(*p), true);
3876 if (ret)
3877 return 0;
3878
Florian Fainellic98a9352011-02-25 00:01:34 +00003879 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
Christian Hitz13fc0e22011-10-12 09:32:01 +02003880 le16_to_cpu(p->crc)) {
Florian Fainellic98a9352011-02-25 00:01:34 +00003881 break;
3882 }
3883 }
3884
Heiko Schocherf5895d12014-06-24 10:10:04 +02003885 if (i == 3) {
3886 pr_err("Could not find valid ONFI parameter page; aborting\n");
Florian Fainellic98a9352011-02-25 00:01:34 +00003887 return 0;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003888 }
Florian Fainellic98a9352011-02-25 00:01:34 +00003889
Sergey Lapin3a38a552013-01-14 03:46:50 +00003890 /* Check version */
Florian Fainellic98a9352011-02-25 00:01:34 +00003891 val = le16_to_cpu(p->revision);
Florian Fainelli3eb4fc62011-04-03 18:23:56 +02003892 if (val & (1 << 5))
3893 chip->onfi_version = 23;
3894 else if (val & (1 << 4))
Florian Fainellic98a9352011-02-25 00:01:34 +00003895 chip->onfi_version = 22;
3896 else if (val & (1 << 3))
3897 chip->onfi_version = 21;
3898 else if (val & (1 << 2))
3899 chip->onfi_version = 20;
Florian Fainelli3eb4fc62011-04-03 18:23:56 +02003900 else if (val & (1 << 1))
Florian Fainellic98a9352011-02-25 00:01:34 +00003901 chip->onfi_version = 10;
Florian Fainelli3eb4fc62011-04-03 18:23:56 +02003902
3903 if (!chip->onfi_version) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02003904 pr_info("unsupported ONFI version: %d\n", val);
Florian Fainelli3eb4fc62011-04-03 18:23:56 +02003905 return 0;
3906 }
Florian Fainellic98a9352011-02-25 00:01:34 +00003907
Christian Hitz6f1c9e02011-10-12 09:32:05 +02003908 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
3909 sanitize_string(p->model, sizeof(p->model));
Florian Fainellic98a9352011-02-25 00:01:34 +00003910 if (!mtd->name)
3911 mtd->name = p->model;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003912
Florian Fainellic98a9352011-02-25 00:01:34 +00003913 mtd->writesize = le32_to_cpu(p->byte_per_page);
Heiko Schocherf5895d12014-06-24 10:10:04 +02003914
3915 /*
3916 * pages_per_block and blocks_per_lun may not be a power-of-2 size
3917 * (don't ask me who thought of this...). MTD assumes that these
3918 * dimensions will be power-of-2, so just truncate the remaining area.
3919 */
3920 mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
3921 mtd->erasesize *= mtd->writesize;
3922
Florian Fainellic98a9352011-02-25 00:01:34 +00003923 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
Heiko Schocherf5895d12014-06-24 10:10:04 +02003924
3925 /* See erasesize comment */
3926 chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
Matthieu CASTETb20b6f22012-03-19 15:35:25 +01003927 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003928 chip->bits_per_cell = p->bits_per_cell;
3929
3930 if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS)
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02003931 chip->options |= NAND_BUSWIDTH_16;
Heiko Schocherf5895d12014-06-24 10:10:04 +02003932
3933 if (p->ecc_bits != 0xff) {
3934 chip->ecc_strength_ds = p->ecc_bits;
3935 chip->ecc_step_ds = 512;
3936 } else if (chip->onfi_version >= 21 &&
3937 (onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) {
3938
3939 /*
3940 * The nand_flash_detect_ext_param_page() uses the
3941 * Change Read Column command which maybe not supported
3942 * by the chip->cmdfunc. So try to update the chip->cmdfunc
3943 * now. We do not replace user supplied command function.
3944 */
3945 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
3946 chip->cmdfunc = nand_command_lp;
3947
3948 /* The Extended Parameter Page is supported since ONFI 2.1. */
3949 if (nand_flash_detect_ext_param_page(mtd, chip, p))
3950 pr_warn("Failed to detect ONFI extended param page\n");
3951 } else {
3952 pr_warn("Could not retrieve ONFI ECC requirements\n");
3953 }
3954
Florian Fainellic98a9352011-02-25 00:01:34 +00003955 return 1;
3956}
3957#else
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02003958static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip)
Florian Fainellic98a9352011-02-25 00:01:34 +00003959{
3960 return 0;
3961}
3962#endif
3963
William Juul52c07962007-10-31 13:53:06 +01003964/*
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003965 * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise.
3966 */
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02003967static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip)
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003968{
3969 struct nand_jedec_params *p = &chip->jedec_params;
3970 struct jedec_ecc_info *ecc;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003971 char id[5];
3972 int i, val, ret;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003973
3974 /* Try JEDEC for unknown chip or LP */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003975 ret = nand_readid_op(chip, 0x40, id, sizeof(id));
3976 if (ret || strncmp(id, "JEDEC", sizeof(id)))
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003977 return 0;
3978
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003979 ret = nand_read_param_page_op(chip, 0x40, NULL, 0);
3980 if (ret)
3981 return 0;
3982
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003983 for (i = 0; i < 3; i++) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01003984 ret = nand_read_data_op(chip, p, sizeof(*p), true);
3985 if (ret)
3986 return 0;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02003987
3988 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) ==
3989 le16_to_cpu(p->crc))
3990 break;
3991 }
3992
3993 if (i == 3) {
3994 pr_err("Could not find valid JEDEC parameter page; aborting\n");
3995 return 0;
3996 }
3997
3998 /* Check version */
3999 val = le16_to_cpu(p->revision);
4000 if (val & (1 << 2))
4001 chip->jedec_version = 10;
4002 else if (val & (1 << 1))
4003 chip->jedec_version = 1; /* vendor specific version */
4004
4005 if (!chip->jedec_version) {
4006 pr_info("unsupported JEDEC version: %d\n", val);
4007 return 0;
4008 }
4009
4010 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
4011 sanitize_string(p->model, sizeof(p->model));
4012 if (!mtd->name)
4013 mtd->name = p->model;
4014
4015 mtd->writesize = le32_to_cpu(p->byte_per_page);
4016
4017 /* Please reference to the comment for nand_flash_detect_onfi. */
4018 mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
4019 mtd->erasesize *= mtd->writesize;
4020
4021 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
4022
4023 /* Please reference to the comment for nand_flash_detect_onfi. */
4024 chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
4025 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
4026 chip->bits_per_cell = p->bits_per_cell;
4027
4028 if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS)
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004029 chip->options |= NAND_BUSWIDTH_16;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004030
4031 /* ECC info */
4032 ecc = &p->ecc_info[0];
4033
4034 if (ecc->codeword_size >= 9) {
4035 chip->ecc_strength_ds = ecc->ecc_bits;
4036 chip->ecc_step_ds = 1 << ecc->codeword_size;
4037 } else {
4038 pr_warn("Invalid codeword size\n");
4039 }
4040
4041 return 1;
4042}
4043
4044/*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004045 * nand_id_has_period - Check if an ID string has a given wraparound period
4046 * @id_data: the ID string
4047 * @arrlen: the length of the @id_data array
4048 * @period: the period of repitition
4049 *
4050 * Check if an ID string is repeated within a given sequence of bytes at
4051 * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
Heiko Schocherf5895d12014-06-24 10:10:04 +02004052 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
Sergey Lapin3a38a552013-01-14 03:46:50 +00004053 * if the repetition has a period of @period; otherwise, returns zero.
4054 */
4055static int nand_id_has_period(u8 *id_data, int arrlen, int period)
4056{
4057 int i, j;
4058 for (i = 0; i < period; i++)
4059 for (j = i + period; j < arrlen; j += period)
4060 if (id_data[i] != id_data[j])
4061 return 0;
4062 return 1;
4063}
4064
4065/*
4066 * nand_id_len - Get the length of an ID string returned by CMD_READID
4067 * @id_data: the ID string
4068 * @arrlen: the length of the @id_data array
4069
4070 * Returns the length of the ID string, according to known wraparound/trailing
4071 * zero patterns. If no pattern exists, returns the length of the array.
4072 */
4073static int nand_id_len(u8 *id_data, int arrlen)
4074{
4075 int last_nonzero, period;
4076
4077 /* Find last non-zero byte */
4078 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
4079 if (id_data[last_nonzero])
4080 break;
4081
4082 /* All zeros */
4083 if (last_nonzero < 0)
4084 return 0;
4085
4086 /* Calculate wraparound period */
4087 for (period = 1; period < arrlen; period++)
4088 if (nand_id_has_period(id_data, arrlen, period))
4089 break;
4090
4091 /* There's a repeated pattern */
4092 if (period < arrlen)
4093 return period;
4094
4095 /* There are trailing zeros */
4096 if (last_nonzero < arrlen - 1)
4097 return last_nonzero + 1;
4098
4099 /* No pattern detected */
4100 return arrlen;
4101}
4102
Heiko Schocherf5895d12014-06-24 10:10:04 +02004103/* Extract the bits of per cell from the 3rd byte of the extended ID */
4104static int nand_get_bits_per_cell(u8 cellinfo)
4105{
4106 int bits;
4107
4108 bits = cellinfo & NAND_CI_CELLTYPE_MSK;
4109 bits >>= NAND_CI_CELLTYPE_SHIFT;
4110 return bits + 1;
4111}
4112
Sergey Lapin3a38a552013-01-14 03:46:50 +00004113/*
4114 * Many new NAND share similar device ID codes, which represent the size of the
4115 * chip. The rest of the parameters must be decoded according to generic or
4116 * manufacturer-specific "extended ID" decoding patterns.
4117 */
Michael Trimarchi60f26dc2022-07-20 18:22:08 +02004118void nand_decode_ext_id(struct nand_chip *chip)
Sergey Lapin3a38a552013-01-14 03:46:50 +00004119{
Alexander Dahlaa124532024-03-20 10:02:09 +01004120 struct mtd_info *mtd = nand_to_mtd(chip);
Michael Trimarchi3ba671b2022-07-20 18:22:11 +02004121 int extid;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004122 /* The 3rd id byte holds MLC / multichip data */
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004123 chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
Sergey Lapin3a38a552013-01-14 03:46:50 +00004124 /* The 4th id byte is the important one */
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004125 extid = chip->id.data[3];
Sergey Lapin3a38a552013-01-14 03:46:50 +00004126
Michael Trimarchi3dc90602022-07-20 18:22:10 +02004127 /* Calc pagesize */
4128 mtd->writesize = 1024 << (extid & 0x03);
4129 extid >>= 2;
4130 /* Calc oobsize */
4131 mtd->oobsize = (8 << (extid & 0x01)) *
4132 (mtd->writesize >> 9);
4133 extid >>= 2;
4134 /* Calc blocksize. Blocksize is multiples of 64KiB */
4135 mtd->erasesize = (64 * 1024) << (extid & 0x03);
4136 extid >>= 2;
4137 /* Get buswidth information */
4138 /* Get buswidth information */
4139 if (extid & 0x1)
4140 chip->options |= NAND_BUSWIDTH_16;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004141}
Michael Trimarchi60f26dc2022-07-20 18:22:08 +02004142EXPORT_SYMBOL_GPL(nand_decode_ext_id);
Sergey Lapin3a38a552013-01-14 03:46:50 +00004143
Heiko Schocherf5895d12014-06-24 10:10:04 +02004144/*
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004145 * Manufacturer detection. Only used when the NAND is not ONFI or JEDEC
4146 * compliant and does not have a full-id or legacy-id entry in the nand_ids
4147 * table.
4148 */
Michael Trimarchi270c1532022-07-20 18:22:07 +02004149static void nand_manufacturer_detect(struct nand_chip *chip)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004150{
4151 /*
4152 * Try manufacturer detection if available and use
4153 * nand_decode_ext_id() otherwise.
4154 */
4155 if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&
Michael Trimarchi39c5bef2022-10-21 08:05:36 +02004156 chip->manufacturer.desc->ops->detect) {
4157 /* The 3rd id byte holds MLC / multichip data */
4158 chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004159 chip->manufacturer.desc->ops->detect(chip);
Michael Trimarchi39c5bef2022-10-21 08:05:36 +02004160 } else {
Michael Trimarchi270c1532022-07-20 18:22:07 +02004161 nand_decode_ext_id(chip);
Michael Trimarchi39c5bef2022-10-21 08:05:36 +02004162 }
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004163}
4164
4165/*
4166 * Manufacturer initialization. This function is called for all NANDs including
4167 * ONFI and JEDEC compliant ones.
4168 * Manufacturer drivers should put all their specific initialization code in
4169 * their ->init() hook.
4170 */
4171static int nand_manufacturer_init(struct nand_chip *chip)
4172{
4173 if (!chip->manufacturer.desc || !chip->manufacturer.desc->ops ||
4174 !chip->manufacturer.desc->ops->init)
4175 return 0;
4176
4177 return chip->manufacturer.desc->ops->init(chip);
4178}
4179
4180/*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004181 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
4182 * decodes a matching ID table entry and assigns the MTD size parameters for
4183 * the chip.
4184 */
Michael Trimarchi270c1532022-07-20 18:22:07 +02004185static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
Sergey Lapin3a38a552013-01-14 03:46:50 +00004186{
Alexander Dahlaa124532024-03-20 10:02:09 +01004187 struct mtd_info *mtd = nand_to_mtd(chip);
Sergey Lapin3a38a552013-01-14 03:46:50 +00004188
4189 mtd->erasesize = type->erasesize;
4190 mtd->writesize = type->pagesize;
4191 mtd->oobsize = mtd->writesize / 32;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004192
Heiko Schocherf5895d12014-06-24 10:10:04 +02004193 /* All legacy ID NAND are small-page, SLC */
4194 chip->bits_per_cell = 1;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004195}
4196
Heiko Schocherf5895d12014-06-24 10:10:04 +02004197/*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004198 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
4199 * heuristic patterns using various detected parameters (e.g., manufacturer,
4200 * page size, cell-type information).
4201 */
4202static void nand_decode_bbm_options(struct mtd_info *mtd,
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004203 struct nand_chip *chip)
Sergey Lapin3a38a552013-01-14 03:46:50 +00004204{
Sergey Lapin3a38a552013-01-14 03:46:50 +00004205 /* Set the bad block position */
4206 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
4207 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
4208 else
4209 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004210}
4211
Heiko Schocherf5895d12014-06-24 10:10:04 +02004212static inline bool is_full_id_nand(struct nand_flash_dev *type)
4213{
4214 return type->id_len;
4215}
4216
4217static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004218 struct nand_flash_dev *type)
Heiko Schocherf5895d12014-06-24 10:10:04 +02004219{
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004220 if (!strncmp((char *)type->id, (char *)chip->id.data, type->id_len)) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02004221 mtd->writesize = type->pagesize;
4222 mtd->erasesize = type->erasesize;
4223 mtd->oobsize = type->oobsize;
4224
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004225 chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004226 chip->chipsize = (uint64_t)type->chipsize << 20;
4227 chip->options |= type->options;
4228 chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);
4229 chip->ecc_step_ds = NAND_ECC_STEP(type);
Scott Wood3ea94ed2015-06-26 19:03:26 -05004230 chip->onfi_timing_mode_default =
4231 type->onfi_timing_mode_default;
Heiko Schocherf5895d12014-06-24 10:10:04 +02004232
Heiko Schocherf5895d12014-06-24 10:10:04 +02004233 if (!mtd->name)
4234 mtd->name = type->name;
4235
4236 return true;
4237 }
4238 return false;
4239}
4240
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004241/**
4242 * nand_get_manufacturer_desc - Get manufacturer information from the
4243 * manufacturer ID
4244 * @id: manufacturer ID
4245 *
4246 * Returns a nand_manufacturer_desc object if the manufacturer is defined
4247 * in the NAND manufacturers database, NULL otherwise.
4248 */
Michael Trimarchi25bb1792022-07-26 18:33:11 +02004249static const struct nand_manufacturer *nand_get_manufacturer_desc(u8 id)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004250{
4251 int i;
4252
4253 for (i = 0; nand_manuf_ids[i].id != 0x0; i++) {
4254 if (nand_manuf_ids[i].id == id)
4255 return &nand_manuf_ids[i];
4256 }
4257
4258 return NULL;
4259}
4260
Sergey Lapin3a38a552013-01-14 03:46:50 +00004261/*
4262 * Get the flash and manufacturer id and lookup if the type is supported.
William Juul52c07962007-10-31 13:53:06 +01004263 */
Michael Trimarchif20a6f02022-07-25 10:18:51 +02004264int nand_detect(struct nand_chip *chip, int *maf_id,
4265 int *dev_id, struct nand_flash_dev *type)
William Juul52c07962007-10-31 13:53:06 +01004266{
Alexander Dahlaa124532024-03-20 10:02:09 +01004267 struct mtd_info *mtd = nand_to_mtd(chip);
Michael Trimarchi25bb1792022-07-26 18:33:11 +02004268 const struct nand_manufacturer *manufacturer_desc;
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004269 int busw, ret;
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004270 u8 *id_data = chip->id.data;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004271
Karl Beldanb6322fc2008-09-15 16:08:03 +02004272 /*
4273 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
Sergey Lapin3a38a552013-01-14 03:46:50 +00004274 * after power-up.
Karl Beldanb6322fc2008-09-15 16:08:03 +02004275 */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004276 ret = nand_reset(chip, 0);
4277 if (ret)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004278 return ret;
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004279
4280 /* Select the device */
4281 chip->select_chip(mtd, 0);
Karl Beldanb6322fc2008-09-15 16:08:03 +02004282
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004283 /* Send the command for reading device ID */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004284 ret = nand_readid_op(chip, 0, id_data, 2);
4285 if (ret)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004286 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004287
4288 /* Read manufacturer and device IDs */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004289 *maf_id = id_data[0];
4290 *dev_id = id_data[1];
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004291
Sergey Lapin3a38a552013-01-14 03:46:50 +00004292 /*
4293 * Try again to make sure, as some systems the bus-hold or other
Scott Wood3628f002008-10-24 16:20:43 -05004294 * interface concerns can cause random data which looks like a
4295 * possibly credible NAND flash to appear. If the two results do
4296 * not match, ignore the device completely.
4297 */
4298
Sergey Lapin3a38a552013-01-14 03:46:50 +00004299 /* Read entire ID string */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004300 ret = nand_readid_op(chip, 0, id_data, 8);
4301 if (ret)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004302 return ret;
Scott Wood3628f002008-10-24 16:20:43 -05004303
Christian Hitzb8a6b372011-10-12 09:32:02 +02004304 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02004305 pr_info("second ID read did not match %02x,%02x against %02x,%02x\n",
Sergey Lapin3a38a552013-01-14 03:46:50 +00004306 *maf_id, *dev_id, id_data[0], id_data[1]);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004307 return -ENODEV;
Scott Wood3628f002008-10-24 16:20:43 -05004308 }
4309
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004310 chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data));
4311
4312 /* Try to identify manufacturer */
4313 manufacturer_desc = nand_get_manufacturer_desc(*maf_id);
4314 chip->manufacturer.desc = manufacturer_desc;
4315
Lei Wen75bde942011-01-06 09:48:18 +08004316 if (!type)
4317 type = nand_flash_ids;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004318
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004319 /*
4320 * Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic
4321 * override it.
4322 * This is required to make sure initial NAND bus width set by the
4323 * NAND controller driver is coherent with the real NAND bus width
4324 * (extracted by auto-detection code).
4325 */
4326 busw = chip->options & NAND_BUSWIDTH_16;
4327
4328 /*
4329 * The flag is only set (never cleared), reset it to its default value
4330 * before starting auto-detection.
4331 */
4332 chip->options &= ~NAND_BUSWIDTH_16;
4333
Heiko Schocherf5895d12014-06-24 10:10:04 +02004334 for (; type->name != NULL; type++) {
4335 if (is_full_id_nand(type)) {
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004336 if (find_full_id_nand(mtd, chip, type))
Heiko Schocherf5895d12014-06-24 10:10:04 +02004337 goto ident_done;
4338 } else if (*dev_id == type->dev_id) {
Scott Wood52ab7ce2016-05-30 13:57:58 -05004339 break;
Heiko Schocherf5895d12014-06-24 10:10:04 +02004340 }
4341 }
Lei Wen75bde942011-01-06 09:48:18 +08004342
Christian Hitzb8a6b372011-10-12 09:32:02 +02004343 chip->onfi_version = 0;
4344 if (!type->name || !type->pagesize) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05004345 /* Check if the chip is ONFI compliant */
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004346 if (nand_flash_detect_onfi(mtd, chip))
Christian Hitzb8a6b372011-10-12 09:32:02 +02004347 goto ident_done;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004348
4349 /* Check if the chip is JEDEC compliant */
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004350 if (nand_flash_detect_jedec(mtd, chip))
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004351 goto ident_done;
Florian Fainellid6191892010-06-12 20:59:25 +02004352 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004353
Christian Hitzb8a6b372011-10-12 09:32:02 +02004354 if (!type->name)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004355 return -ENODEV;
Christian Hitzb8a6b372011-10-12 09:32:02 +02004356
William Juul52c07962007-10-31 13:53:06 +01004357 if (!mtd->name)
4358 mtd->name = type->name;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004359
Sandeep Paulrajeab580c2009-10-30 13:51:23 -04004360 chip->chipsize = (uint64_t)type->chipsize << 20;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004361
Scott Wood52ab7ce2016-05-30 13:57:58 -05004362 if (!type->pagesize) {
Michael Trimarchi270c1532022-07-20 18:22:07 +02004363 nand_manufacturer_detect(chip);
Christian Hitzb8a6b372011-10-12 09:32:02 +02004364 } else {
Michael Trimarchi270c1532022-07-20 18:22:07 +02004365 nand_decode_id(chip, type);
Christian Hitzb8a6b372011-10-12 09:32:02 +02004366 }
Michael Trimarchidc7fdd62022-07-20 18:22:04 +02004367
Heiko Schocherf5895d12014-06-24 10:10:04 +02004368 /* Get chip options */
Marek Vasutfc417192012-08-30 13:39:38 +00004369 chip->options |= type->options;
Florian Fainellic98a9352011-02-25 00:01:34 +00004370
Christian Hitzb8a6b372011-10-12 09:32:02 +02004371ident_done:
4372
Heiko Schocherf5895d12014-06-24 10:10:04 +02004373 if (chip->options & NAND_BUSWIDTH_AUTO) {
4374 WARN_ON(chip->options & NAND_BUSWIDTH_16);
4375 chip->options |= busw;
4376 nand_set_defaults(chip, busw);
4377 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
4378 /*
4379 * Check, if buswidth is correct. Hardware drivers should set
4380 * chip correct!
4381 */
4382 pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
4383 *maf_id, *dev_id);
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004384 pr_info("%s %s\n", manufacturer_desc->name, mtd->name);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004385 pr_warn("bus width %d instead %d bit\n",
Sergey Lapin3a38a552013-01-14 03:46:50 +00004386 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
4387 busw ? 16 : 8);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004388 return -EINVAL;
William Juul52c07962007-10-31 13:53:06 +01004389 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004390
Michael Trimarchicd4d9042022-07-20 18:22:05 +02004391 nand_decode_bbm_options(mtd, chip);
Sergey Lapin3a38a552013-01-14 03:46:50 +00004392
William Juul52c07962007-10-31 13:53:06 +01004393 /* Calculate the address shift from the page size */
4394 chip->page_shift = ffs(mtd->writesize) - 1;
Sergey Lapin3a38a552013-01-14 03:46:50 +00004395 /* Convert chipsize to number of pages per chip -1 */
William Juul52c07962007-10-31 13:53:06 +01004396 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004397
William Juul52c07962007-10-31 13:53:06 +01004398 chip->bbt_erase_shift = chip->phys_erase_shift =
4399 ffs(mtd->erasesize) - 1;
Sandeep Paulrajeab580c2009-10-30 13:51:23 -04004400 if (chip->chipsize & 0xffffffff)
Sandeep Paulraj1bc877c2009-11-07 14:24:06 -05004401 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Christian Hitzb8a6b372011-10-12 09:32:02 +02004402 else {
4403 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
4404 chip->chip_shift += 32 - 1;
4405 }
4406
Masahiro Yamada984926b2017-11-22 02:38:31 +09004407 if (chip->chip_shift - chip->page_shift > 16)
4408 chip->options |= NAND_ROW_ADDR_3;
4409
Christian Hitzb8a6b372011-10-12 09:32:02 +02004410 chip->badblockbits = 8;
Scott Wood3ea94ed2015-06-26 19:03:26 -05004411 chip->erase = single_erase;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004412
Sergey Lapin3a38a552013-01-14 03:46:50 +00004413 /* Do not replace user supplied command function! */
William Juul52c07962007-10-31 13:53:06 +01004414 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
4415 chip->cmdfunc = nand_command_lp;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004416
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004417 ret = nand_manufacturer_init(chip);
4418 if (ret)
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004419 return ret;
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004420
Heiko Schocherf5895d12014-06-24 10:10:04 +02004421 pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
4422 *maf_id, *dev_id);
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004423
Christian Hitzb8a6b372011-10-12 09:32:02 +02004424#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004425 if (chip->onfi_version)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004426 pr_info("%s %s\n", manufacturer_desc->name,
4427 chip->onfi_params.model);
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004428 else if (chip->jedec_version)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004429 pr_info("%s %s\n", manufacturer_desc->name,
4430 chip->jedec_params.model);
Sean Andersone476f112023-11-04 16:37:40 -04004431 else if (manufacturer_desc)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004432 pr_info("%s %s\n", manufacturer_desc->name, type->name);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004433#else
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004434 if (chip->jedec_version)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004435 pr_info("%s %s\n", manufacturer_desc->name,
4436 chip->jedec_params.model);
Sean Andersone476f112023-11-04 16:37:40 -04004437 else if (manufacturer_desc)
Michael Trimarchi4a26e1d2022-07-20 18:22:06 +02004438 pr_info("%s %s\n", manufacturer_desc->name, type->name);
Christian Hitzb8a6b372011-10-12 09:32:02 +02004439#endif
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004440
Scott Wood3ea94ed2015-06-26 19:03:26 -05004441 pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
Heiko Schocherf5895d12014-06-24 10:10:04 +02004442 (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC",
Scott Wood3ea94ed2015-06-26 19:03:26 -05004443 mtd->erasesize >> 10, mtd->writesize, mtd->oobsize);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004444 return 0;
William Juul52c07962007-10-31 13:53:06 +01004445}
Michael Trimarchif20a6f02022-07-25 10:18:51 +02004446EXPORT_SYMBOL(nand_detect);
William Juul52c07962007-10-31 13:53:06 +01004447
Brian Norrisba6463d2016-06-15 21:09:22 +02004448#if CONFIG_IS_ENABLED(OF_CONTROL)
Brian Norrisba6463d2016-06-15 21:09:22 +02004449
Patrice Chotardbc77af52021-09-13 16:25:53 +02004450static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
Brian Norrisba6463d2016-06-15 21:09:22 +02004451{
4452 int ret, ecc_mode = -1, ecc_strength, ecc_step;
Linus Walleij4e8611a2023-04-07 15:40:05 +02004453 int ecc_algo = NAND_ECC_UNKNOWN;
Brian Norrisba6463d2016-06-15 21:09:22 +02004454 const char *str;
4455
Patrice Chotardbc77af52021-09-13 16:25:53 +02004456 ret = ofnode_read_s32_default(node, "nand-bus-width", -1);
Brian Norrisba6463d2016-06-15 21:09:22 +02004457 if (ret == 16)
4458 chip->options |= NAND_BUSWIDTH_16;
4459
Patrice Chotardbc77af52021-09-13 16:25:53 +02004460 if (ofnode_read_bool(node, "nand-on-flash-bbt"))
Brian Norrisba6463d2016-06-15 21:09:22 +02004461 chip->bbt_options |= NAND_BBT_USE_FLASH;
4462
Patrice Chotardbc77af52021-09-13 16:25:53 +02004463 str = ofnode_read_string(node, "nand-ecc-mode");
Brian Norrisba6463d2016-06-15 21:09:22 +02004464 if (str) {
4465 if (!strcmp(str, "none"))
4466 ecc_mode = NAND_ECC_NONE;
4467 else if (!strcmp(str, "soft"))
4468 ecc_mode = NAND_ECC_SOFT;
4469 else if (!strcmp(str, "hw"))
4470 ecc_mode = NAND_ECC_HW;
4471 else if (!strcmp(str, "hw_syndrome"))
4472 ecc_mode = NAND_ECC_HW_SYNDROME;
4473 else if (!strcmp(str, "hw_oob_first"))
4474 ecc_mode = NAND_ECC_HW_OOB_FIRST;
4475 else if (!strcmp(str, "soft_bch"))
4476 ecc_mode = NAND_ECC_SOFT_BCH;
4477 }
4478
Linus Walleij4e8611a2023-04-07 15:40:05 +02004479 str = ofnode_read_string(node, "nand-ecc-algo");
4480 if (str) {
4481 /*
4482 * If we are in NAND_ECC_SOFT mode, just alter the
4483 * soft mode to BCH here. No change of algorithm.
4484 */
4485 if (ecc_mode == NAND_ECC_SOFT) {
4486 if (!strcmp(str, "bch"))
4487 ecc_mode = NAND_ECC_SOFT_BCH;
4488 } else {
4489 if (!strcmp(str, "bch")) {
4490 ecc_algo = NAND_ECC_BCH;
4491 } else if (!strcmp(str, "hamming")) {
4492 ecc_algo = NAND_ECC_HAMMING;
4493 }
4494 }
Pali Rohár44acf8a2022-04-04 18:17:21 +02004495 }
4496
Patrice Chotardbc77af52021-09-13 16:25:53 +02004497 ecc_strength = ofnode_read_s32_default(node,
4498 "nand-ecc-strength", -1);
4499 ecc_step = ofnode_read_s32_default(node,
4500 "nand-ecc-step-size", -1);
Brian Norrisba6463d2016-06-15 21:09:22 +02004501
4502 if ((ecc_step >= 0 && !(ecc_strength >= 0)) ||
4503 (!(ecc_step >= 0) && ecc_strength >= 0)) {
4504 pr_err("must set both strength and step size in DT\n");
4505 return -EINVAL;
4506 }
4507
Linus Walleij4e8611a2023-04-07 15:40:05 +02004508 /*
4509 * Chip drivers may have assigned default algorithms here,
4510 * onlt override it if we have found something explicitly
4511 * specified in the device tree.
4512 */
4513 if (ecc_algo != NAND_ECC_UNKNOWN)
4514 chip->ecc.algo = ecc_algo;
4515
Brian Norrisba6463d2016-06-15 21:09:22 +02004516 if (ecc_mode >= 0)
4517 chip->ecc.mode = ecc_mode;
4518
4519 if (ecc_strength >= 0)
4520 chip->ecc.strength = ecc_strength;
4521
4522 if (ecc_step > 0)
4523 chip->ecc.size = ecc_step;
4524
Patrice Chotardbc77af52021-09-13 16:25:53 +02004525 if (ofnode_read_bool(node, "nand-ecc-maximize"))
Boris Brezillonf1a54b02017-11-22 02:38:13 +09004526 chip->ecc.options |= NAND_ECC_MAXIMIZE;
4527
Brian Norrisba6463d2016-06-15 21:09:22 +02004528 return 0;
4529}
4530#else
Patrice Chotardbc77af52021-09-13 16:25:53 +02004531static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
Brian Norrisba6463d2016-06-15 21:09:22 +02004532{
4533 return 0;
4534}
4535#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
4536
William Juul52c07962007-10-31 13:53:06 +01004537/**
4538 * nand_scan_ident - [NAND Interface] Scan for the NAND device
Sergey Lapin3a38a552013-01-14 03:46:50 +00004539 * @mtd: MTD device structure
4540 * @maxchips: number of chips to scan for
4541 * @table: alternative NAND ID table
William Juul52c07962007-10-31 13:53:06 +01004542 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00004543 * This is the first phase of the normal nand_scan() function. It reads the
4544 * flash ID and sets up MTD fields accordingly.
William Juul52c07962007-10-31 13:53:06 +01004545 *
William Juul52c07962007-10-31 13:53:06 +01004546 */
Lei Wen75bde942011-01-06 09:48:18 +08004547int nand_scan_ident(struct mtd_info *mtd, int maxchips,
Heiko Schocherf5895d12014-06-24 10:10:04 +02004548 struct nand_flash_dev *table)
William Juul52c07962007-10-31 13:53:06 +01004549{
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004550 int i, nand_maf_id, nand_dev_id;
Scott Wood17fed142016-05-30 13:57:56 -05004551 struct nand_chip *chip = mtd_to_nand(mtd);
Brian Norrisba6463d2016-06-15 21:09:22 +02004552 int ret;
4553
Patrice Chotardbc77af52021-09-13 16:25:53 +02004554 if (ofnode_valid(chip->flash_node)) {
Brian Norrisba6463d2016-06-15 21:09:22 +02004555 ret = nand_dt_init(mtd, chip, chip->flash_node);
4556 if (ret)
4557 return ret;
4558 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004559
William Juul52c07962007-10-31 13:53:06 +01004560 /* Set the default functions */
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004561 nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16);
William Juul52c07962007-10-31 13:53:06 +01004562
4563 /* Read the flash type */
Michael Trimarchif20a6f02022-07-25 10:18:51 +02004564 ret = nand_detect(chip, &nand_maf_id, &nand_dev_id, table);
William Juul52c07962007-10-31 13:53:06 +01004565
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004566 if (ret) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02004567 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
4568 pr_warn("No NAND device found\n");
William Juul52c07962007-10-31 13:53:06 +01004569 chip->select_chip(mtd, -1);
Michael Trimarchi4d4862d92022-07-25 10:06:06 +02004570 return ret;
William Juul52c07962007-10-31 13:53:06 +01004571 }
4572
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004573 /* Initialize the ->data_interface field. */
Boris Brezillone509cba2017-11-22 02:38:19 +09004574 ret = nand_init_data_interface(chip);
4575 if (ret)
4576 return ret;
4577
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004578 /*
4579 * Setup the data interface correctly on the chip and controller side.
4580 * This explicit call to nand_setup_data_interface() is only required
4581 * for the first die, because nand_reset() has been called before
4582 * ->data_interface and ->default_onfi_timing_mode were set.
4583 * For the other dies, nand_reset() will automatically switch to the
4584 * best mode for us.
4585 */
Boris Brezillon32935f42017-11-22 02:38:28 +09004586 ret = nand_setup_data_interface(chip, 0);
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004587 if (ret)
4588 return ret;
4589
Heiko Schocherf5895d12014-06-24 10:10:04 +02004590 chip->select_chip(mtd, -1);
4591
William Juul52c07962007-10-31 13:53:06 +01004592 /* Check for a chip array */
4593 for (i = 1; i < maxchips; i++) {
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004594 u8 id[2];
4595
Michael Trimarchif20a6f02022-07-25 10:18:51 +02004596 /* See comment in nand_detect for reset */
Boris Brezillon7ec6dc52017-11-22 02:38:20 +09004597 nand_reset(chip, i);
4598
4599 chip->select_chip(mtd, i);
William Juul52c07962007-10-31 13:53:06 +01004600 /* Send the command for reading device ID */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004601 nand_readid_op(chip, 0, id, sizeof(id));
4602
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004603 /* Read manufacturer and device IDs */
Boris Brezillon16ee8f62019-03-15 15:14:32 +01004604 if (nand_maf_id != id[0] || nand_dev_id != id[1]) {
Heiko Schocherf5895d12014-06-24 10:10:04 +02004605 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004606 break;
Heiko Schocherf5895d12014-06-24 10:10:04 +02004607 }
4608 chip->select_chip(mtd, -1);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004609 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02004610
Wolfgang Grandeggerb325d7e2009-02-11 18:38:20 +01004611#ifdef DEBUG
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004612 if (i > 1)
Heiko Schocherf5895d12014-06-24 10:10:04 +02004613 pr_info("%d chips detected\n", i);
Wolfgang Grandeggerb325d7e2009-02-11 18:38:20 +01004614#endif
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004615
William Juul52c07962007-10-31 13:53:06 +01004616 /* Store the number of chips and calc total size for mtd */
4617 chip->numchips = i;
4618 mtd->size = i * chip->chipsize;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004619
William Juul52c07962007-10-31 13:53:06 +01004620 return 0;
4621}
Heiko Schocherf5895d12014-06-24 10:10:04 +02004622EXPORT_SYMBOL(nand_scan_ident);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004623
Masahiro Yamada820eb482017-11-22 02:38:29 +09004624/**
4625 * nand_check_ecc_caps - check the sanity of preset ECC settings
4626 * @chip: nand chip info structure
4627 * @caps: ECC caps info structure
4628 * @oobavail: OOB size that the ECC engine can use
4629 *
4630 * When ECC step size and strength are already set, check if they are supported
4631 * by the controller and the calculated ECC bytes fit within the chip's OOB.
4632 * On success, the calculated ECC bytes is set.
4633 */
4634int nand_check_ecc_caps(struct nand_chip *chip,
4635 const struct nand_ecc_caps *caps, int oobavail)
4636{
4637 struct mtd_info *mtd = nand_to_mtd(chip);
4638 const struct nand_ecc_step_info *stepinfo;
4639 int preset_step = chip->ecc.size;
4640 int preset_strength = chip->ecc.strength;
4641 int nsteps, ecc_bytes;
4642 int i, j;
4643
4644 if (WARN_ON(oobavail < 0))
4645 return -EINVAL;
4646
4647 if (!preset_step || !preset_strength)
4648 return -ENODATA;
4649
4650 nsteps = mtd->writesize / preset_step;
4651
4652 for (i = 0; i < caps->nstepinfos; i++) {
4653 stepinfo = &caps->stepinfos[i];
4654
4655 if (stepinfo->stepsize != preset_step)
4656 continue;
4657
4658 for (j = 0; j < stepinfo->nstrengths; j++) {
4659 if (stepinfo->strengths[j] != preset_strength)
4660 continue;
4661
4662 ecc_bytes = caps->calc_ecc_bytes(preset_step,
4663 preset_strength);
4664 if (WARN_ON_ONCE(ecc_bytes < 0))
4665 return ecc_bytes;
4666
4667 if (ecc_bytes * nsteps > oobavail) {
4668 pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB",
4669 preset_step, preset_strength);
4670 return -ENOSPC;
4671 }
4672
4673 chip->ecc.bytes = ecc_bytes;
4674
4675 return 0;
4676 }
4677 }
4678
4679 pr_err("ECC (step, strength) = (%d, %d) not supported on this controller",
4680 preset_step, preset_strength);
4681
4682 return -ENOTSUPP;
4683}
4684EXPORT_SYMBOL_GPL(nand_check_ecc_caps);
4685
4686/**
4687 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
4688 * @chip: nand chip info structure
4689 * @caps: ECC engine caps info structure
4690 * @oobavail: OOB size that the ECC engine can use
4691 *
4692 * If a chip's ECC requirement is provided, try to meet it with the least
4693 * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
4694 * On success, the chosen ECC settings are set.
4695 */
4696int nand_match_ecc_req(struct nand_chip *chip,
4697 const struct nand_ecc_caps *caps, int oobavail)
4698{
4699 struct mtd_info *mtd = nand_to_mtd(chip);
4700 const struct nand_ecc_step_info *stepinfo;
4701 int req_step = chip->ecc_step_ds;
4702 int req_strength = chip->ecc_strength_ds;
4703 int req_corr, step_size, strength, nsteps, ecc_bytes, ecc_bytes_total;
4704 int best_step, best_strength, best_ecc_bytes;
4705 int best_ecc_bytes_total = INT_MAX;
4706 int i, j;
4707
4708 if (WARN_ON(oobavail < 0))
4709 return -EINVAL;
4710
4711 /* No information provided by the NAND chip */
4712 if (!req_step || !req_strength)
4713 return -ENOTSUPP;
4714
4715 /* number of correctable bits the chip requires in a page */
4716 req_corr = mtd->writesize / req_step * req_strength;
4717
4718 for (i = 0; i < caps->nstepinfos; i++) {
4719 stepinfo = &caps->stepinfos[i];
4720 step_size = stepinfo->stepsize;
4721
4722 for (j = 0; j < stepinfo->nstrengths; j++) {
4723 strength = stepinfo->strengths[j];
4724
4725 /*
4726 * If both step size and strength are smaller than the
4727 * chip's requirement, it is not easy to compare the
4728 * resulted reliability.
4729 */
4730 if (step_size < req_step && strength < req_strength)
4731 continue;
4732
4733 if (mtd->writesize % step_size)
4734 continue;
4735
4736 nsteps = mtd->writesize / step_size;
4737
4738 ecc_bytes = caps->calc_ecc_bytes(step_size, strength);
4739 if (WARN_ON_ONCE(ecc_bytes < 0))
4740 continue;
4741 ecc_bytes_total = ecc_bytes * nsteps;
4742
4743 if (ecc_bytes_total > oobavail ||
4744 strength * nsteps < req_corr)
4745 continue;
4746
4747 /*
4748 * We assume the best is to meet the chip's requrement
4749 * with the least number of ECC bytes.
4750 */
4751 if (ecc_bytes_total < best_ecc_bytes_total) {
4752 best_ecc_bytes_total = ecc_bytes_total;
4753 best_step = step_size;
4754 best_strength = strength;
4755 best_ecc_bytes = ecc_bytes;
4756 }
4757 }
4758 }
4759
4760 if (best_ecc_bytes_total == INT_MAX)
4761 return -ENOTSUPP;
4762
4763 chip->ecc.size = best_step;
4764 chip->ecc.strength = best_strength;
4765 chip->ecc.bytes = best_ecc_bytes;
4766
4767 return 0;
4768}
4769EXPORT_SYMBOL_GPL(nand_match_ecc_req);
4770
4771/**
4772 * nand_maximize_ecc - choose the max ECC strength available
4773 * @chip: nand chip info structure
4774 * @caps: ECC engine caps info structure
4775 * @oobavail: OOB size that the ECC engine can use
4776 *
4777 * Choose the max ECC strength that is supported on the controller, and can fit
4778 * within the chip's OOB. On success, the chosen ECC settings are set.
4779 */
4780int nand_maximize_ecc(struct nand_chip *chip,
4781 const struct nand_ecc_caps *caps, int oobavail)
4782{
4783 struct mtd_info *mtd = nand_to_mtd(chip);
4784 const struct nand_ecc_step_info *stepinfo;
4785 int step_size, strength, nsteps, ecc_bytes, corr;
4786 int best_corr = 0;
4787 int best_step = 0;
4788 int best_strength, best_ecc_bytes;
4789 int i, j;
4790
4791 if (WARN_ON(oobavail < 0))
4792 return -EINVAL;
4793
4794 for (i = 0; i < caps->nstepinfos; i++) {
4795 stepinfo = &caps->stepinfos[i];
4796 step_size = stepinfo->stepsize;
4797
4798 /* If chip->ecc.size is already set, respect it */
4799 if (chip->ecc.size && step_size != chip->ecc.size)
4800 continue;
4801
4802 for (j = 0; j < stepinfo->nstrengths; j++) {
4803 strength = stepinfo->strengths[j];
4804
4805 if (mtd->writesize % step_size)
4806 continue;
4807
4808 nsteps = mtd->writesize / step_size;
4809
4810 ecc_bytes = caps->calc_ecc_bytes(step_size, strength);
4811 if (WARN_ON_ONCE(ecc_bytes < 0))
4812 continue;
4813
4814 if (ecc_bytes * nsteps > oobavail)
4815 continue;
4816
4817 corr = strength * nsteps;
4818
4819 /*
4820 * If the number of correctable bits is the same,
4821 * bigger step_size has more reliability.
4822 */
4823 if (corr > best_corr ||
4824 (corr == best_corr && step_size > best_step)) {
4825 best_corr = corr;
4826 best_step = step_size;
4827 best_strength = strength;
4828 best_ecc_bytes = ecc_bytes;
4829 }
4830 }
4831 }
4832
4833 if (!best_corr)
4834 return -ENOTSUPP;
4835
4836 chip->ecc.size = best_step;
4837 chip->ecc.strength = best_strength;
4838 chip->ecc.bytes = best_ecc_bytes;
4839
4840 return 0;
4841}
4842EXPORT_SYMBOL_GPL(nand_maximize_ecc);
4843
Scott Wood3ea94ed2015-06-26 19:03:26 -05004844/*
4845 * Check if the chip configuration meet the datasheet requirements.
4846
4847 * If our configuration corrects A bits per B bytes and the minimum
4848 * required correction level is X bits per Y bytes, then we must ensure
4849 * both of the following are true:
4850 *
4851 * (1) A / B >= X / Y
4852 * (2) A >= X
4853 *
4854 * Requirement (1) ensures we can correct for the required bitflip density.
4855 * Requirement (2) ensures we can correct even when all bitflips are clumped
4856 * in the same sector.
4857 */
4858static bool nand_ecc_strength_good(struct mtd_info *mtd)
4859{
Scott Wood17fed142016-05-30 13:57:56 -05004860 struct nand_chip *chip = mtd_to_nand(mtd);
Scott Wood3ea94ed2015-06-26 19:03:26 -05004861 struct nand_ecc_ctrl *ecc = &chip->ecc;
4862 int corr, ds_corr;
4863
4864 if (ecc->size == 0 || chip->ecc_step_ds == 0)
4865 /* Not enough information */
4866 return true;
4867
4868 /*
4869 * We get the number of corrected bits per page to compare
4870 * the correction density.
4871 */
4872 corr = (mtd->writesize * ecc->strength) / ecc->size;
4873 ds_corr = (mtd->writesize * chip->ecc_strength_ds) / chip->ecc_step_ds;
4874
4875 return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds;
4876}
William Juul52c07962007-10-31 13:53:06 +01004877
Marc Gonzalezc3a29852017-11-22 02:38:22 +09004878static bool invalid_ecc_page_accessors(struct nand_chip *chip)
4879{
4880 struct nand_ecc_ctrl *ecc = &chip->ecc;
4881
4882 if (nand_standard_page_accessors(ecc))
4883 return false;
4884
4885 /*
4886 * NAND_ECC_CUSTOM_PAGE_ACCESS flag is set, make sure the NAND
4887 * controller driver implements all the page accessors because
4888 * default helpers are not suitable when the core does not
4889 * send the READ0/PAGEPROG commands.
4890 */
4891 return (!ecc->read_page || !ecc->write_page ||
4892 !ecc->read_page_raw || !ecc->write_page_raw ||
4893 (NAND_HAS_SUBPAGE_READ(chip) && !ecc->read_subpage) ||
4894 (NAND_HAS_SUBPAGE_WRITE(chip) && !ecc->write_subpage &&
4895 ecc->hwctl && ecc->calculate));
4896}
4897
William Juul52c07962007-10-31 13:53:06 +01004898/**
4899 * nand_scan_tail - [NAND Interface] Scan for the NAND device
Sergey Lapin3a38a552013-01-14 03:46:50 +00004900 * @mtd: MTD device structure
William Juul52c07962007-10-31 13:53:06 +01004901 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00004902 * This is the second phase of the normal nand_scan() function. It fills out
4903 * all the uninitialized function pointers with the defaults and scans for a
4904 * bad block table if appropriate.
William Juul52c07962007-10-31 13:53:06 +01004905 */
4906int nand_scan_tail(struct mtd_info *mtd)
4907{
4908 int i;
Scott Wood17fed142016-05-30 13:57:56 -05004909 struct nand_chip *chip = mtd_to_nand(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004910 struct nand_ecc_ctrl *ecc = &chip->ecc;
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004911 struct nand_buffers *nbuf;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004912
Sergey Lapin3a38a552013-01-14 03:46:50 +00004913 /* New bad blocks should be marked in OOB, flash-based BBT, or both */
4914 BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
4915 !(chip->bbt_options & NAND_BBT_USE_FLASH));
4916
Marc Gonzalezc3a29852017-11-22 02:38:22 +09004917 if (invalid_ecc_page_accessors(chip)) {
4918 pr_err("Invalid ECC page accessors setup\n");
4919 return -EINVAL;
4920 }
4921
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004922 if (!(chip->options & NAND_OWN_BUFFERS)) {
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004923 nbuf = kzalloc(sizeof(struct nand_buffers), GFP_KERNEL);
Heiko Schocher081fe9e2014-07-15 16:08:43 +02004924 chip->buffers = nbuf;
4925 } else {
4926 if (!chip->buffers)
4927 return -ENOMEM;
4928 }
William Juul52c07962007-10-31 13:53:06 +01004929
4930 /* Set the internal oob buffer location, just after the page data */
4931 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
4932
4933 /*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004934 * If no default placement scheme is given, select an appropriate one.
William Juul52c07962007-10-31 13:53:06 +01004935 */
Heiko Schocherf5895d12014-06-24 10:10:04 +02004936 if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004937 switch (mtd->oobsize) {
Gregory CLEMENTe5b96312019-04-17 11:22:05 +02004938#ifndef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004939 case 8:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004940 ecc->layout = &nand_oob_8;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004941 break;
4942 case 16:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004943 ecc->layout = &nand_oob_16;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004944 break;
4945 case 64:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004946 ecc->layout = &nand_oob_64;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004947 break;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02004948 case 128:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004949 ecc->layout = &nand_oob_128;
Sergei Poselenov04fbaa02008-06-06 15:42:43 +02004950 break;
Stefan Agnerbd186142018-12-06 14:57:09 +01004951#endif
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004952 default:
Sergey Lapin3a38a552013-01-14 03:46:50 +00004953 pr_warn("No oob scheme defined for oobsize %d\n",
4954 mtd->oobsize);
Heiko Schocherf5895d12014-06-24 10:10:04 +02004955 BUG();
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004956 }
4957 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004958
William Juul52c07962007-10-31 13:53:06 +01004959 if (!chip->write_page)
4960 chip->write_page = nand_write_page;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004961
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02004962 /*
Sergey Lapin3a38a552013-01-14 03:46:50 +00004963 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
William Juul52c07962007-10-31 13:53:06 +01004964 * selected and we have 256 byte pagesize fallback to software ECC
4965 */
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004966
Heiko Schocherf5895d12014-06-24 10:10:04 +02004967 switch (ecc->mode) {
Sandeep Paulrajdea40702009-08-10 13:27:56 -04004968 case NAND_ECC_HW_OOB_FIRST:
4969 /* Similar to NAND_ECC_HW, but a separate read_page handle */
Heiko Schocherf5895d12014-06-24 10:10:04 +02004970 if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05004971 pr_warn("No ECC functions supplied; hardware ECC not possible\n");
Sandeep Paulrajdea40702009-08-10 13:27:56 -04004972 BUG();
4973 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02004974 if (!ecc->read_page)
4975 ecc->read_page = nand_read_page_hwecc_oob_first;
Sandeep Paulrajdea40702009-08-10 13:27:56 -04004976
William Juul52c07962007-10-31 13:53:06 +01004977 case NAND_ECC_HW:
Sergey Lapin3a38a552013-01-14 03:46:50 +00004978 /* Use standard hwecc read page function? */
Heiko Schocherf5895d12014-06-24 10:10:04 +02004979 if (!ecc->read_page)
4980 ecc->read_page = nand_read_page_hwecc;
4981 if (!ecc->write_page)
4982 ecc->write_page = nand_write_page_hwecc;
4983 if (!ecc->read_page_raw)
4984 ecc->read_page_raw = nand_read_page_raw;
4985 if (!ecc->write_page_raw)
4986 ecc->write_page_raw = nand_write_page_raw;
4987 if (!ecc->read_oob)
4988 ecc->read_oob = nand_read_oob_std;
4989 if (!ecc->write_oob)
4990 ecc->write_oob = nand_write_oob_std;
4991 if (!ecc->read_subpage)
4992 ecc->read_subpage = nand_read_subpage;
Scott Wood52ab7ce2016-05-30 13:57:58 -05004993 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate)
Heiko Schocherf5895d12014-06-24 10:10:04 +02004994 ecc->write_subpage = nand_write_subpage_hwecc;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02004995
William Juul52c07962007-10-31 13:53:06 +01004996 case NAND_ECC_HW_SYNDROME:
Heiko Schocherf5895d12014-06-24 10:10:04 +02004997 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&
4998 (!ecc->read_page ||
4999 ecc->read_page == nand_read_page_hwecc ||
5000 !ecc->write_page ||
5001 ecc->write_page == nand_write_page_hwecc)) {
Scott Wood3ea94ed2015-06-26 19:03:26 -05005002 pr_warn("No ECC functions supplied; hardware ECC not possible\n");
William Juul52c07962007-10-31 13:53:06 +01005003 BUG();
5004 }
Sergey Lapin3a38a552013-01-14 03:46:50 +00005005 /* Use standard syndrome read/write page function? */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005006 if (!ecc->read_page)
5007 ecc->read_page = nand_read_page_syndrome;
5008 if (!ecc->write_page)
5009 ecc->write_page = nand_write_page_syndrome;
5010 if (!ecc->read_page_raw)
5011 ecc->read_page_raw = nand_read_page_raw_syndrome;
5012 if (!ecc->write_page_raw)
5013 ecc->write_page_raw = nand_write_page_raw_syndrome;
5014 if (!ecc->read_oob)
5015 ecc->read_oob = nand_read_oob_syndrome;
5016 if (!ecc->write_oob)
5017 ecc->write_oob = nand_write_oob_syndrome;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005018
Heiko Schocherf5895d12014-06-24 10:10:04 +02005019 if (mtd->writesize >= ecc->size) {
5020 if (!ecc->strength) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00005021 pr_warn("Driver must set ecc.strength when using hardware ECC\n");
5022 BUG();
5023 }
William Juul52c07962007-10-31 13:53:06 +01005024 break;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005025 }
Scott Wood3ea94ed2015-06-26 19:03:26 -05005026 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
5027 ecc->size, mtd->writesize);
Heiko Schocherf5895d12014-06-24 10:10:04 +02005028 ecc->mode = NAND_ECC_SOFT;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005029
William Juul52c07962007-10-31 13:53:06 +01005030 case NAND_ECC_SOFT:
Heiko Schocherf5895d12014-06-24 10:10:04 +02005031 ecc->calculate = nand_calculate_ecc;
5032 ecc->correct = nand_correct_data;
5033 ecc->read_page = nand_read_page_swecc;
5034 ecc->read_subpage = nand_read_subpage;
5035 ecc->write_page = nand_write_page_swecc;
5036 ecc->read_page_raw = nand_read_page_raw;
5037 ecc->write_page_raw = nand_write_page_raw;
5038 ecc->read_oob = nand_read_oob_std;
5039 ecc->write_oob = nand_write_oob_std;
5040 if (!ecc->size)
5041 ecc->size = 256;
5042 ecc->bytes = 3;
5043 ecc->strength = 1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005044 break;
5045
Christian Hitz55f7bca2011-10-12 09:31:59 +02005046 case NAND_ECC_SOFT_BCH:
5047 if (!mtd_nand_has_bch()) {
Heiko Schocher081fe9e2014-07-15 16:08:43 +02005048 pr_warn("CONFIG_MTD_NAND_ECC_BCH not enabled\n");
Heiko Schocherf5895d12014-06-24 10:10:04 +02005049 BUG();
Christian Hitz55f7bca2011-10-12 09:31:59 +02005050 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02005051 ecc->calculate = nand_bch_calculate_ecc;
5052 ecc->correct = nand_bch_correct_data;
5053 ecc->read_page = nand_read_page_swecc;
5054 ecc->read_subpage = nand_read_subpage;
5055 ecc->write_page = nand_write_page_swecc;
5056 ecc->read_page_raw = nand_read_page_raw;
5057 ecc->write_page_raw = nand_write_page_raw;
5058 ecc->read_oob = nand_read_oob_std;
5059 ecc->write_oob = nand_write_oob_std;
Christian Hitz55f7bca2011-10-12 09:31:59 +02005060 /*
Scott Wood3ea94ed2015-06-26 19:03:26 -05005061 * Board driver should supply ecc.size and ecc.strength values
5062 * to select how many bits are correctable. Otherwise, default
5063 * to 4 bits for large page devices.
Christian Hitz55f7bca2011-10-12 09:31:59 +02005064 */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005065 if (!ecc->size && (mtd->oobsize >= 64)) {
5066 ecc->size = 512;
Scott Wood3ea94ed2015-06-26 19:03:26 -05005067 ecc->strength = 4;
Christian Hitz55f7bca2011-10-12 09:31:59 +02005068 }
Scott Wood3ea94ed2015-06-26 19:03:26 -05005069
5070 /* See nand_bch_init() for details. */
Scott Wood52ab7ce2016-05-30 13:57:58 -05005071 ecc->bytes = 0;
5072 ecc->priv = nand_bch_init(mtd);
Heiko Schocherf5895d12014-06-24 10:10:04 +02005073 if (!ecc->priv) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00005074 pr_warn("BCH ECC initialization failed!\n");
Heiko Schocherf5895d12014-06-24 10:10:04 +02005075 BUG();
5076 }
Christian Hitz55f7bca2011-10-12 09:31:59 +02005077 break;
5078
William Juul52c07962007-10-31 13:53:06 +01005079 case NAND_ECC_NONE:
Scott Wood3ea94ed2015-06-26 19:03:26 -05005080 pr_warn("NAND_ECC_NONE selected by board driver. This is not recommended!\n");
Heiko Schocherf5895d12014-06-24 10:10:04 +02005081 ecc->read_page = nand_read_page_raw;
5082 ecc->write_page = nand_write_page_raw;
5083 ecc->read_oob = nand_read_oob_std;
5084 ecc->read_page_raw = nand_read_page_raw;
5085 ecc->write_page_raw = nand_write_page_raw;
5086 ecc->write_oob = nand_write_oob_std;
5087 ecc->size = mtd->writesize;
5088 ecc->bytes = 0;
5089 ecc->strength = 0;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005090 break;
5091
5092 default:
Heiko Schocherf5895d12014-06-24 10:10:04 +02005093 pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode);
William Juul52c07962007-10-31 13:53:06 +01005094 BUG();
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005095 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005096
Sergey Lapin3a38a552013-01-14 03:46:50 +00005097 /* For many systems, the standard OOB write also works for raw */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005098 if (!ecc->read_oob_raw)
5099 ecc->read_oob_raw = ecc->read_oob;
5100 if (!ecc->write_oob_raw)
5101 ecc->write_oob_raw = ecc->write_oob;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005102
William Juul52c07962007-10-31 13:53:06 +01005103 /*
5104 * The number of bytes available for a client to place data into
Sergey Lapin3a38a552013-01-14 03:46:50 +00005105 * the out of band area.
William Juul52c07962007-10-31 13:53:06 +01005106 */
Scott Wood52ab7ce2016-05-30 13:57:58 -05005107 mtd->oobavail = 0;
5108 if (ecc->layout) {
5109 for (i = 0; ecc->layout->oobfree[i].length; i++)
5110 mtd->oobavail += ecc->layout->oobfree[i].length;
5111 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005112
Scott Wood3ea94ed2015-06-26 19:03:26 -05005113 /* ECC sanity check: warn if it's too weak */
5114 if (!nand_ecc_strength_good(mtd))
5115 pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n",
5116 mtd->name);
5117
William Juul52c07962007-10-31 13:53:06 +01005118 /*
5119 * Set the number of read / write steps for one page depending on ECC
Sergey Lapin3a38a552013-01-14 03:46:50 +00005120 * mode.
William Juul52c07962007-10-31 13:53:06 +01005121 */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005122 ecc->steps = mtd->writesize / ecc->size;
5123 if (ecc->steps * ecc->size != mtd->writesize) {
Sergey Lapin3a38a552013-01-14 03:46:50 +00005124 pr_warn("Invalid ECC parameters\n");
William Juul52c07962007-10-31 13:53:06 +01005125 BUG();
5126 }
Heiko Schocherf5895d12014-06-24 10:10:04 +02005127 ecc->total = ecc->steps * ecc->bytes;
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02005128
Sergey Lapin3a38a552013-01-14 03:46:50 +00005129 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005130 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
5131 switch (ecc->steps) {
William Juul52c07962007-10-31 13:53:06 +01005132 case 2:
5133 mtd->subpage_sft = 1;
5134 break;
5135 case 4:
5136 case 8:
Sandeep Paulrajfd9874d2009-11-07 14:24:34 -05005137 case 16:
William Juul52c07962007-10-31 13:53:06 +01005138 mtd->subpage_sft = 2;
5139 break;
5140 }
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005141 }
William Juul52c07962007-10-31 13:53:06 +01005142 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005143
William Juul52c07962007-10-31 13:53:06 +01005144 /* Initialize state */
5145 chip->state = FL_READY;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005146
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005147 /* Invalidate the pagebuffer reference */
William Juul52c07962007-10-31 13:53:06 +01005148 chip->pagebuf = -1;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005149
Joe Hershberger7a38ffa2012-11-05 06:46:31 +00005150 /* Large page NAND with SOFT_ECC should support subpage reads */
Scott Wood3ea94ed2015-06-26 19:03:26 -05005151 switch (ecc->mode) {
5152 case NAND_ECC_SOFT:
5153 case NAND_ECC_SOFT_BCH:
5154 if (chip->page_shift > 9)
5155 chip->options |= NAND_SUBPAGE_READ;
5156 break;
5157
5158 default:
5159 break;
5160 }
Joe Hershberger7a38ffa2012-11-05 06:46:31 +00005161
Patrice Chotardbee32872022-03-21 09:13:36 +01005162 mtd->flash_node = chip->flash_node;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005163 /* Fill in remaining MTD driver data */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005164 mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH;
Christian Hitzb8a6b372011-10-12 09:32:02 +02005165 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
5166 MTD_CAP_NANDFLASH;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005167 mtd->_erase = nand_erase;
Heiko Schocherf5895d12014-06-24 10:10:04 +02005168 mtd->_panic_write = panic_nand_write;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005169 mtd->_read_oob = nand_read_oob;
5170 mtd->_write_oob = nand_write_oob;
5171 mtd->_sync = nand_sync;
5172 mtd->_lock = NULL;
5173 mtd->_unlock = NULL;
Ezequiel Garciafc9d57c2014-05-21 19:06:12 -03005174 mtd->_block_isreserved = nand_block_isreserved;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005175 mtd->_block_isbad = nand_block_isbad;
5176 mtd->_block_markbad = nand_block_markbad;
Heiko Schocherf5895d12014-06-24 10:10:04 +02005177 mtd->writebufsize = mtd->writesize;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005178
Sergey Lapin3a38a552013-01-14 03:46:50 +00005179 /* propagate ecc info to mtd_info */
Heiko Schocherf5895d12014-06-24 10:10:04 +02005180 mtd->ecclayout = ecc->layout;
5181 mtd->ecc_strength = ecc->strength;
5182 mtd->ecc_step_size = ecc->size;
Sergey Lapin3a38a552013-01-14 03:46:50 +00005183 /*
5184 * Initialize bitflip_threshold to its default prior scan_bbt() call.
5185 * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
5186 * properly set.
5187 */
5188 if (!mtd->bitflip_threshold)
Scott Wood3ea94ed2015-06-26 19:03:26 -05005189 mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);
William Juul52c07962007-10-31 13:53:06 +01005190
Rostislav Lisovydc17bdc2014-10-22 13:40:44 +02005191 return 0;
William Juul52c07962007-10-31 13:53:06 +01005192}
Heiko Schocherf5895d12014-06-24 10:10:04 +02005193EXPORT_SYMBOL(nand_scan_tail);
5194
William Juul52c07962007-10-31 13:53:06 +01005195/**
5196 * nand_scan - [NAND Interface] Scan for the NAND device
Sergey Lapin3a38a552013-01-14 03:46:50 +00005197 * @mtd: MTD device structure
5198 * @maxchips: number of chips to scan for
William Juul52c07962007-10-31 13:53:06 +01005199 *
Sergey Lapin3a38a552013-01-14 03:46:50 +00005200 * This fills out all the uninitialized function pointers with the defaults.
5201 * The flash ID is read and the mtd/chip structures are filled with the
Scott Wood52ab7ce2016-05-30 13:57:58 -05005202 * appropriate values.
William Juul52c07962007-10-31 13:53:06 +01005203 */
5204int nand_scan(struct mtd_info *mtd, int maxchips)
5205{
5206 int ret;
5207
Lei Wen75bde942011-01-06 09:48:18 +08005208 ret = nand_scan_ident(mtd, maxchips, NULL);
William Juul52c07962007-10-31 13:53:06 +01005209 if (!ret)
5210 ret = nand_scan_tail(mtd);
5211 return ret;
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005212}
Heiko Schocherf5895d12014-06-24 10:10:04 +02005213EXPORT_SYMBOL(nand_scan);
Wolfgang Denk2f9b7e42005-08-17 12:55:25 +02005214
Heiko Schocherf5895d12014-06-24 10:10:04 +02005215MODULE_LICENSE("GPL");
5216MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
5217MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
5218MODULE_DESCRIPTION("Generic NAND flash driver code");