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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Akshay Saraswata42e55a2013-03-20 21:00:56 +00002/*
3 * Advanced Crypto Engine - SHA Firmware
4 * Copyright (c) 2012 Samsung Electronics
Akshay Saraswata42e55a2013-03-20 21:00:56 +00005 */
Tom Rini130e1d82024-05-01 19:30:39 -06006
7#include <config.h>
Przemyslaw Marczak8d28e1b2014-03-25 10:58:21 +01008#include "ace_sha.h"
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Simon Glass274e0b02020-05-10 11:39:56 -060010#include <rand.h>
Tom Rini130e1d82024-05-01 19:30:39 -060011#include <linux/string.h>
Przemyslaw Marczak8d28e1b2014-03-25 10:58:21 +010012
13#ifdef CONFIG_SHA_HW_ACCEL
Jeroen Hofsteebfe88fe2014-06-12 22:27:12 +020014#include <u-boot/sha256.h>
15#include <u-boot/sha1.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090016#include <linux/errno.h>
Akshay Saraswata42e55a2013-03-20 21:00:56 +000017
18/* SHA1 value for the message of zero length */
19static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = {
20 0xDA, 0x39, 0xA3, 0xEE, 0x5E, 0x6B, 0x4B, 0x0D,
21 0x32, 0x55, 0xBF, 0xFF, 0x95, 0x60, 0x18, 0x90,
22 0xAF, 0xD8, 0x07, 0x09};
23
24/* SHA256 value for the message of zero length */
25static const unsigned char sha256_digest_emptymsg[SHA256_SUM_LEN] = {
26 0xE3, 0xB0, 0xC4, 0x42, 0x98, 0xFC, 0x1C, 0x14,
27 0x9A, 0xFB, 0xF4, 0xC8, 0x99, 0x6F, 0xB9, 0x24,
28 0x27, 0xAE, 0x41, 0xE4, 0x64, 0x9B, 0x93, 0x4C,
29 0xA4, 0x95, 0x99, 0x1B, 0x78, 0x52, 0xB8, 0x55};
30
31int ace_sha_hash_digest(const unsigned char *pbuf, unsigned int buf_len,
32 unsigned char *pout, unsigned int hash_type)
33{
34 unsigned int i, reg, len;
35 unsigned int *pdigest;
36 struct exynos_ace_sfr *ace_sha_reg =
37 (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
38
39 if (buf_len == 0) {
40 /* ACE H/W cannot compute hash value for empty string */
41 if (hash_type == ACE_SHA_TYPE_SHA1)
42 memcpy(pout, sha1_digest_emptymsg, SHA1_SUM_LEN);
43 else
44 memcpy(pout, sha256_digest_emptymsg, SHA256_SUM_LEN);
45 return 0;
46 }
47
48 /* Flush HRDMA */
49 writel(ACE_FC_HRDMACFLUSH_ON, &ace_sha_reg->fc_hrdmac);
50 writel(ACE_FC_HRDMACFLUSH_OFF, &ace_sha_reg->fc_hrdmac);
51
52 /* Set byte swap of data in */
53 writel(ACE_HASH_SWAPDI_ON | ACE_HASH_SWAPDO_ON | ACE_HASH_SWAPIV_ON,
54 &ace_sha_reg->hash_byteswap);
55
56 /* Select Hash input mux as external source */
57 reg = readl(&ace_sha_reg->fc_fifoctrl);
58 reg = (reg & ~ACE_FC_SELHASH_MASK) | ACE_FC_SELHASH_EXOUT;
59 writel(reg, &ace_sha_reg->fc_fifoctrl);
60
61 /* Set Hash as SHA1 or SHA256 and start Hash engine */
62 reg = (hash_type == ACE_SHA_TYPE_SHA1) ?
63 ACE_HASH_ENGSEL_SHA1HASH : ACE_HASH_ENGSEL_SHA256HASH;
64 reg |= ACE_HASH_STARTBIT_ON;
65 writel(reg, &ace_sha_reg->hash_control);
66
67 /* Enable FIFO mode */
68 writel(ACE_HASH_FIFO_ON, &ace_sha_reg->hash_fifo_mode);
69
70 /* Set message length */
71 writel(buf_len, &ace_sha_reg->hash_msgsize_low);
72 writel(0, &ace_sha_reg->hash_msgsize_high);
73
74 /* Set HRDMA */
75 writel((unsigned int)pbuf, &ace_sha_reg->fc_hrdmas);
76 writel(buf_len, &ace_sha_reg->fc_hrdmal);
77
78 while ((readl(&ace_sha_reg->hash_status) & ACE_HASH_MSGDONE_MASK) ==
79 ACE_HASH_MSGDONE_OFF) {
80 /*
81 * PRNG error bit goes HIGH if a PRNG request occurs without
82 * a complete seed setup. We are using this bit to check h/w
83 * fault because proper setup is not expected in that case.
84 */
85 if ((readl(&ace_sha_reg->hash_status)
86 & ACE_HASH_PRNGERROR_MASK) == ACE_HASH_PRNGERROR_ON)
87 return -EBUSY;
88 }
89
90 /* Clear MSG_DONE bit */
91 writel(ACE_HASH_MSGDONE_ON, &ace_sha_reg->hash_status);
92
93 /* Read hash result */
94 pdigest = (unsigned int *)pout;
95 len = (hash_type == ACE_SHA_TYPE_SHA1) ? SHA1_SUM_LEN : SHA256_SUM_LEN;
96
97 for (i = 0; i < len / 4; i++)
98 pdigest[i] = readl(&ace_sha_reg->hash_result[i]);
99
100 /* Clear HRDMA pending bit */
101 writel(ACE_FC_HRDMA, &ace_sha_reg->fc_intpend);
102
103 return 0;
104}
105
106void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,
107 unsigned char *pout, unsigned int chunk_size)
108{
109 if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA256))
110 debug("ACE was not setup properly or it is faulty\n");
111}
112
113void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
114 unsigned char *pout, unsigned int chunk_size)
115{
116 if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1))
117 debug("ACE was not setup properly or it is faulty\n");
118}
Przemyslaw Marczak8d28e1b2014-03-25 10:58:21 +0100119#endif /* CONFIG_SHA_HW_ACCEL */
120
121#ifdef CONFIG_LIB_HW_RAND
122static unsigned int seed_done;
123
124void srand(unsigned int seed)
125{
126 struct exynos_ace_sfr *reg =
127 (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
128 int i, status;
129
130 /* Seed data */
131 for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
132 writel(seed << i, &reg->hash_seed[i]);
133
134 /* Wait for seed setup done */
135 while (1) {
136 status = readl(&reg->hash_status);
137 if ((status & ACE_HASH_SEEDSETTING_MASK) ||
138 (status & ACE_HASH_PRNGERROR_MASK))
139 break;
140 }
141
142 seed_done = 1;
143}
144
145unsigned int rand(void)
146{
147 struct exynos_ace_sfr *reg =
148 (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
149 int i, status;
150 unsigned int seed = (unsigned int)&status;
151 unsigned int ret = 0;
152
153 if (!seed_done)
154 srand(seed);
155
156 /* Start PRNG */
157 writel(ACE_HASH_ENGSEL_PRNG | ACE_HASH_STARTBIT_ON, &reg->hash_control);
158
159 /* Wait for PRNG done */
160 while (1) {
161 status = readl(&reg->hash_status);
162 if (status & ACE_HASH_PRNGDONE_MASK)
163 break;
164 if (status & ACE_HASH_PRNGERROR_MASK) {
165 seed_done = 0;
166 return 0;
167 }
168 }
169
170 /* Clear Done IRQ */
171 writel(ACE_HASH_PRNGDONE_MASK, &reg->hash_status);
172
173 /* Read a PRNG result */
174 for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
175 ret += readl(&reg->hash_prng[i]);
176
177 seed_done = 0;
178 return ret;
179}
180
181unsigned int rand_r(unsigned int *seedp)
182{
183 srand(*seedp);
184
185 return rand();
186}
187#endif /* CONFIG_LIB_HW_RAND */