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Simon Glass6eb4e3c2020-02-06 09:54:53 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 Google LLC
4 * Written by Simon Glass <sjg@chromium.org>
5 */
6
Simon Glass6eb4e3c2020-02-06 09:54:53 -07007#include <dm.h>
8#include <clk-uclass.h>
9#include <dt-bindings/clock/intel-clock.h>
10
11static ulong intel_clk_get_rate(struct clk *clk)
12{
Simon Glass6eb4e3c2020-02-06 09:54:53 -070013 switch (clk->id) {
14 case CLK_I2C:
15 /* Hard-coded to 133MHz on current platforms */
16 return 133333333;
17 default:
18 return -ENODEV;
19 }
Simon Glass6eb4e3c2020-02-06 09:54:53 -070020}
21
22static struct clk_ops intel_clk_ops = {
23 .get_rate = intel_clk_get_rate,
24};
25
26static const struct udevice_id intel_clk_ids[] = {
27 { .compatible = "intel,apl-clk" },
28 { }
29};
30
Simon Glass6646c572021-01-21 13:57:12 -070031U_BOOT_DRIVER(intel_apl_clk) = {
32 .name = "intel_apl_clk",
Simon Glass6eb4e3c2020-02-06 09:54:53 -070033 .id = UCLASS_CLK,
34 .of_match = intel_clk_ids,
35 .ops = &intel_clk_ops,
36};