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Heinrich Schuchardtf7d6b072018-12-26 17:20:35 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * The 'exception' command can be used for testing exception handling.
4 *
5 * Copyright (c) 2018, Heinrich Schuchardt <xypron.glpk@gmx.de>
6 */
7
Heinrich Schuchardtf7d6b072018-12-26 17:20:35 +01008#include <command.h>
Andre Przywaraddda5d82022-02-11 11:29:34 +00009#include <linux/bitops.h>
Heinrich Schuchardtf7d6b072018-12-26 17:20:35 +010010
Simon Glassed38aef2020-05-10 11:40:03 -060011static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
12 char *const argv[])
Heinrich Schuchardtf7d6b072018-12-26 17:20:35 +010013{
14 /*
Andre Przywaraddda5d82022-02-11 11:29:34 +000015 * Instructions starting with the upper 16 bits all 0 are permanently
16 * undefined. The lower 16 bits can be used for some kind of immediate.
17 * --- ARMv8 ARM (ARM DDI 0487G.a C6.2.339: "UDF")
Heinrich Schuchardtf7d6b072018-12-26 17:20:35 +010018 */
Andre Przywaraddda5d82022-02-11 11:29:34 +000019 asm volatile (".word 0x00001234\n");
20
Heinrich Schuchardtf7d6b072018-12-26 17:20:35 +010021 return CMD_RET_FAILURE;
22}
23
Andre Przywaraddda5d82022-02-11 11:29:34 +000024/*
25 * The ID_AA64MMFR2_EL1 register name is only know to binutils for ARMv8.2
26 * and later architecture revisions. However the register is valid regardless
27 * of binutils architecture support or the core the code is running on, so
28 * just use the generic encoding.
29 */
30#define ID_AA64MMFR2_EL1 "S3_0_C0_C7_2"
31
32static int do_unaligned(struct cmd_tbl *cmdtp, int flag, int argc,
33 char *const argv[])
34{
35 uint64_t reg;
36
37 /*
38 * The unaligned LDAR access below is only guaranteed to generate an
39 * alignment fault on cores not implementing FEAT_LSE2. To avoid false
40 * negatives, check this condition before we exectute LDAR.
41 */
42 asm ("mrs %0, "ID_AA64MMFR2_EL1"\n" : "=r" (reg));
43 if (reg & GENMASK(35, 32)) {
44 printf("unaligned access check only supported on pre-v8.4 cores\n");
45 return CMD_RET_FAILURE;
46 }
47
48 /*
49 * The load acquire instruction requires the data source to be
50 * naturally aligned, and will fault even if strict alignment fault
51 * checking is disabled (but only without FEAT_LSE2).
52 * --- ARMv8 ARM (ARM DDI 0487G.a B2.5.2: "Alignment of data accesses")
53 */
54 asm volatile (
55 "mov x1, sp\n\t"
56 "orr x1, x1, #3\n\t"
57 "ldar x0, [x1]\n"
58 ::: "x0", "x1" );
59
60 return CMD_RET_FAILURE;
61}
62
63static int do_breakpoint(struct cmd_tbl *cmdtp, int flag, int argc,
64 char *const argv[])
65{
66 asm volatile ("brk #123\n");
67
68 return CMD_RET_FAILURE;
69}
70
Simon Glassed38aef2020-05-10 11:40:03 -060071static struct cmd_tbl cmd_sub[] = {
Andre Przywaraddda5d82022-02-11 11:29:34 +000072 U_BOOT_CMD_MKENT(breakpoint, CONFIG_SYS_MAXARGS, 1, do_breakpoint,
73 "", ""),
74 U_BOOT_CMD_MKENT(unaligned, CONFIG_SYS_MAXARGS, 1, do_unaligned,
75 "", ""),
Heinrich Schuchardtf7d6b072018-12-26 17:20:35 +010076 U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined,
77 "", ""),
78};
79
80static char exception_help_text[] =
81 "<ex>\n"
82 " The following exceptions are available:\n"
Andre Przywaraddda5d82022-02-11 11:29:34 +000083 " breakpoint - breakpoint instruction exception\n"
84 " unaligned - unaligned LDAR data abort\n"
85 " undefined - undefined instruction exception\n"
Heinrich Schuchardtf7d6b072018-12-26 17:20:35 +010086 ;
87
88#include <exception.h>